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Searched refs:DISABLE_INTS (Results 1 – 25 of 223) sorted by relevance

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/ThreadX-v6.3.0/ports/cortex_a9/gnu/src/
Dtx_thread_fiq_nesting_end.S27 DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts define
29 DISABLE_INTS = 0x80 // Disable IRQ interrupts define
98 ORR r0, r0, #DISABLE_INTS // Build disable interrupt value
Dtx_thread_irq_nesting_end.S27 DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts define
29 DISABLE_INTS = 0x80 // Disable IRQ interrupts define
98 ORR r0, r0, #DISABLE_INTS // Build disable interrupt value
/ThreadX-v6.3.0/ports_arch/ARMv7-A/threadx/common/src/
Dtx_thread_fiq_nesting_end.S27 DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts define
29 DISABLE_INTS = 0x80 // Disable IRQ interrupts define
98 ORR r0, r0, #DISABLE_INTS // Build disable interrupt value
Dtx_thread_irq_nesting_end.S27 DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts define
29 DISABLE_INTS = 0x80 // Disable IRQ interrupts define
98 ORR r0, r0, #DISABLE_INTS // Build disable interrupt value
/ThreadX-v6.3.0/ports/cortex_a8/ac6/src/
Dtx_thread_fiq_nesting_end.S27 DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts define
29 DISABLE_INTS = 0x80 // Disable IRQ interrupts define
98 ORR r0, r0, #DISABLE_INTS // Build disable interrupt value
Dtx_thread_irq_nesting_end.S27 DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts define
29 DISABLE_INTS = 0x80 // Disable IRQ interrupts define
98 ORR r0, r0, #DISABLE_INTS // Build disable interrupt value
/ThreadX-v6.3.0/ports/cortex_a8/gnu/src/
Dtx_thread_fiq_nesting_end.S27 DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts define
29 DISABLE_INTS = 0x80 // Disable IRQ interrupts define
98 ORR r0, r0, #DISABLE_INTS // Build disable interrupt value
Dtx_thread_irq_nesting_end.S27 DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts define
29 DISABLE_INTS = 0x80 // Disable IRQ interrupts define
98 ORR r0, r0, #DISABLE_INTS // Build disable interrupt value
/ThreadX-v6.3.0/ports/cortex_a9/ac6/src/
Dtx_thread_fiq_nesting_end.S27 DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts define
29 DISABLE_INTS = 0x80 // Disable IRQ interrupts define
98 ORR r0, r0, #DISABLE_INTS // Build disable interrupt value
Dtx_thread_irq_nesting_end.S27 DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts define
29 DISABLE_INTS = 0x80 // Disable IRQ interrupts define
98 ORR r0, r0, #DISABLE_INTS // Build disable interrupt value
/ThreadX-v6.3.0/ports/cortex_a12/ac6/src/
Dtx_thread_fiq_nesting_end.S27 DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts define
29 DISABLE_INTS = 0x80 // Disable IRQ interrupts define
98 ORR r0, r0, #DISABLE_INTS // Build disable interrupt value
Dtx_thread_irq_nesting_end.S27 DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts define
29 DISABLE_INTS = 0x80 // Disable IRQ interrupts define
98 ORR r0, r0, #DISABLE_INTS // Build disable interrupt value
/ThreadX-v6.3.0/ports/cortex_a12/gnu/src/
Dtx_thread_fiq_nesting_end.S27 DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts define
29 DISABLE_INTS = 0x80 // Disable IRQ interrupts define
98 ORR r0, r0, #DISABLE_INTS // Build disable interrupt value
Dtx_thread_irq_nesting_end.S27 DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts define
29 DISABLE_INTS = 0x80 // Disable IRQ interrupts define
98 ORR r0, r0, #DISABLE_INTS // Build disable interrupt value
/ThreadX-v6.3.0/ports/cortex_a15/ac6/src/
Dtx_thread_fiq_nesting_end.S27 DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts define
29 DISABLE_INTS = 0x80 // Disable IRQ interrupts define
98 ORR r0, r0, #DISABLE_INTS // Build disable interrupt value
Dtx_thread_irq_nesting_end.S27 DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts define
29 DISABLE_INTS = 0x80 // Disable IRQ interrupts define
98 ORR r0, r0, #DISABLE_INTS // Build disable interrupt value
/ThreadX-v6.3.0/ports/cortex_a15/gnu/src/
Dtx_thread_fiq_nesting_end.S27 DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts define
29 DISABLE_INTS = 0x80 // Disable IRQ interrupts define
98 ORR r0, r0, #DISABLE_INTS // Build disable interrupt value
Dtx_thread_irq_nesting_end.S27 DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts define
29 DISABLE_INTS = 0x80 // Disable IRQ interrupts define
98 ORR r0, r0, #DISABLE_INTS // Build disable interrupt value
/ThreadX-v6.3.0/ports/cortex_a7/ac6/src/
Dtx_thread_fiq_nesting_end.S27 DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts define
29 DISABLE_INTS = 0x80 // Disable IRQ interrupts define
98 ORR r0, r0, #DISABLE_INTS // Build disable interrupt value
Dtx_thread_irq_nesting_end.S27 DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts define
29 DISABLE_INTS = 0x80 // Disable IRQ interrupts define
98 ORR r0, r0, #DISABLE_INTS // Build disable interrupt value
/ThreadX-v6.3.0/ports/cortex_a17/gnu/src/
Dtx_thread_fiq_nesting_end.S27 DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts define
29 DISABLE_INTS = 0x80 // Disable IRQ interrupts define
98 ORR r0, r0, #DISABLE_INTS // Build disable interrupt value
/ThreadX-v6.3.0/ports/cortex_a7/gnu/src/
Dtx_thread_fiq_nesting_end.S27 DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts define
29 DISABLE_INTS = 0x80 // Disable IRQ interrupts define
98 ORR r0, r0, #DISABLE_INTS // Build disable interrupt value
Dtx_thread_irq_nesting_end.S27 DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts define
29 DISABLE_INTS = 0x80 // Disable IRQ interrupts define
98 ORR r0, r0, #DISABLE_INTS // Build disable interrupt value
/ThreadX-v6.3.0/ports/cortex_a5/ac6/src/
Dtx_thread_fiq_nesting_end.S27 DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts define
29 DISABLE_INTS = 0x80 // Disable IRQ interrupts define
98 ORR r0, r0, #DISABLE_INTS // Build disable interrupt value
Dtx_thread_irq_nesting_end.S27 DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts define
29 DISABLE_INTS = 0x80 // Disable IRQ interrupts define
98 ORR r0, r0, #DISABLE_INTS // Build disable interrupt value

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