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/ThreadX-v6.3.0/ports_smp/cortex_a7_smp/ac5/src/
Dtx_thread_smp_initialize_wait.s95 LSL r10, r10, #2 ; Build offset to array indexes
100 LDR r3, =_tx_thread_system_state ; Build address of system state variable
101 ADD r3, r3, r10 ; Build index into the system state array
102 LDR r2, =0xF0F0F0F0 ; Build TX_INITIALIZE_IN_PROGRESS flag
110 LDR r2, =_tx_thread_smp_release_cores_flag ; Build address of release cores flag
121 LDR r3, =_tx_thread_system_state ; Build address of system state variable
122 ADD r3, r3, r10 ; Build index into the system state array
123 MOV r0, #0 ; Build clear value
128 … LDR r3, =_tx_thread_system_state ; Build address of system state variable of logical 0
Dtx_thread_schedule.s102 LSL r12, r10, #2 ; Build offset to array indexes
105 ADD r1, r1, r12 ; Build offset to execute ptr for this core
129 MOV r2, #172 ; Build offset to the lock
149 MOV r3, #0 ; Build clear value
163 MOV r3, #0 ; Build clear value for the lock
171 ADD r2, r2, r12 ; Build index into the current thread array
186 MOV r1, #0 ; Build clear value
211 ADD r2, r2, r12 ; Build index into the time-slice array
276 LSL r1, r1, #2 ; Build offset to array indexes
277 LDR r0, =_tx_thread_current_ptr ; Build current thread pointer address
[all …]
/ThreadX-v6.3.0/ports_smp/cortex_a7_smp/gnu/src/
Dtx_thread_smp_initialize_wait.S97 LSL r10, r10, #2 @ Build offset to array indexes
102 LDR r3, =_tx_thread_system_state @ Build address of system state variable
103 ADD r3, r3, r10 @ Build index into the system state array
104 LDR r2, =0xF0F0F0F0 @ Build TX_INITIALIZE_IN_PROGRESS flag
112 LDR r2, =_tx_thread_smp_release_cores_flag @ Build address of release cores flag
123 LDR r3, =_tx_thread_system_state @ Build address of system state variable
124 ADD r3, r3, r10 @ Build index into the system state array
125 MOV r0, #0 @ Build clear value
130 … LDR r3, =_tx_thread_system_state @ Build address of system state variable of logical 0
/ThreadX-v6.3.0/ports_smp/cortex_a9_smp/ac5/src/
Dtx_thread_smp_initialize_wait.s95 LSL r10, r10, #2 ; Build offset to array indexes
100 LDR r3, =_tx_thread_system_state ; Build address of system state variable
101 ADD r3, r3, r10 ; Build index into the system state array
102 LDR r2, =0xF0F0F0F0 ; Build TX_INITIALIZE_IN_PROGRESS flag
110 LDR r2, =_tx_thread_smp_release_cores_flag ; Build address of release cores flag
121 LDR r3, =_tx_thread_system_state ; Build address of system state variable
122 ADD r3, r3, r10 ; Build index into the system state array
123 MOV r0, #0 ; Build clear value
128 … LDR r3, =_tx_thread_system_state ; Build address of system state variable of logical 0
Dtx_thread_schedule.s102 LSL r12, r10, #2 ; Build offset to array indexes
105 ADD r1, r1, r12 ; Build offset to execute ptr for this core
129 MOV r2, #172 ; Build offset to the lock
149 MOV r3, #0 ; Build clear value
163 MOV r3, #0 ; Build clear value for the lock
171 ADD r2, r2, r12 ; Build index into the current thread array
186 MOV r1, #0 ; Build clear value
211 ADD r2, r2, r12 ; Build index into the time-slice array
276 LSL r1, r1, #2 ; Build offset to array indexes
277 LDR r0, =_tx_thread_current_ptr ; Build current thread pointer address
[all …]
/ThreadX-v6.3.0/ports_smp/cortex_a9_smp/gnu/src/
Dtx_thread_smp_initialize_wait.S97 LSL r10, r10, #2 @ Build offset to array indexes
102 LDR r3, =_tx_thread_system_state @ Build address of system state variable
103 ADD r3, r3, r10 @ Build index into the system state array
104 LDR r2, =0xF0F0F0F0 @ Build TX_INITIALIZE_IN_PROGRESS flag
112 LDR r2, =_tx_thread_smp_release_cores_flag @ Build address of release cores flag
123 LDR r3, =_tx_thread_system_state @ Build address of system state variable
124 ADD r3, r3, r10 @ Build index into the system state array
125 MOV r0, #0 @ Build clear value
130 … LDR r3, =_tx_thread_system_state @ Build address of system state variable of logical 0
Dtx_thread_schedule.S104 LSL r12, r10, #2 @ Build offset to array indexes
107 ADD r1, r1, r12 @ Build offset to execute ptr for this core
131 MOV r2, #172 @ Build offset to the lock
151 MOV r3, #0 @ Build clear value
165 MOV r3, #0 @ Build clear value for the lock
173 ADD r2, r2, r12 @ Build index into the current thread array
188 MOV r1, #0 @ Build clear value
213 ADD r2, r2, r12 @ Build index into the time-slice array
278 LSL r1, r1, #2 @ Build offset to array indexes
279 LDR r0, =_tx_thread_current_ptr @ Build current thread pointer address
[all …]
/ThreadX-v6.3.0/ports_smp/cortex_a5_smp/ac5/src/
Dtx_thread_smp_initialize_wait.s95 LSL r10, r10, #2 ; Build offset to array indexes
100 LDR r3, =_tx_thread_system_state ; Build address of system state variable
101 ADD r3, r3, r10 ; Build index into the system state array
102 LDR r2, =0xF0F0F0F0 ; Build TX_INITIALIZE_IN_PROGRESS flag
110 LDR r2, =_tx_thread_smp_release_cores_flag ; Build address of release cores flag
121 LDR r3, =_tx_thread_system_state ; Build address of system state variable
122 ADD r3, r3, r10 ; Build index into the system state array
123 MOV r0, #0 ; Build clear value
128 … LDR r3, =_tx_thread_system_state ; Build address of system state variable of logical 0
Dtx_thread_schedule.s102 LSL r12, r10, #2 ; Build offset to array indexes
105 ADD r1, r1, r12 ; Build offset to execute ptr for this core
130 MOV r2, #172 ; Build offset to the lock
150 MOV r3, #0 ; Build clear value
164 MOV r3, #0 ; Build clear value for the lock
172 ADD r2, r2, r12 ; Build index into the current thread array
187 MOV r1, #0 ; Build clear value
211 ADD r2, r2, r12 ; Build index into the time-slice array
276 LSL r1, r1, #2 ; Build offset to array indexes
277 LDR r0, =_tx_thread_current_ptr ; Build current thread pointer address
[all …]
/ThreadX-v6.3.0/ports_smp/cortex_a5_smp/gnu/src/
Dtx_thread_smp_initialize_wait.S97 LSL r10, r10, #2 @ Build offset to array indexes
102 LDR r3, =_tx_thread_system_state @ Build address of system state variable
103 ADD r3, r3, r10 @ Build index into the system state array
104 LDR r2, =0xF0F0F0F0 @ Build TX_INITIALIZE_IN_PROGRESS flag
112 LDR r2, =_tx_thread_smp_release_cores_flag @ Build address of release cores flag
123 LDR r3, =_tx_thread_system_state @ Build address of system state variable
124 ADD r3, r3, r10 @ Build index into the system state array
125 MOV r0, #0 @ Build clear value
130 … LDR r3, =_tx_thread_system_state @ Build address of system state variable of logical 0
Dtx_thread_schedule.S104 LSL r12, r10, #2 @ Build offset to array indexes
107 ADD r1, r1, r12 @ Build offset to execute ptr for this core
132 MOV r2, #172 @ Build offset to the lock
152 MOV r3, #0 @ Build clear value
166 MOV r3, #0 @ Build clear value for the lock
174 ADD r2, r2, r12 @ Build index into the current thread array
189 MOV r1, #0 @ Build clear value
213 ADD r2, r2, r12 @ Build index into the time-slice array
278 LSL r1, r1, #2 @ Build offset to array indexes
279 LDR r0, =_tx_thread_current_ptr @ Build current thread pointer address
[all …]
/ThreadX-v6.3.0/ports/cortex_m0/ac6/example_build/sample_threadx/
Dtx_initialize_low_level.S90 LDR r0, =_tx_initialize_unused_memory @ Build address of unused memory pointer
91 LDR r1, =Image$$ARM_LIB_STACKHEAP$$ZI$$Limit @ Build first free address
97 @ LDR r0, =0xE0001000 @ Build address of DWT register
105 LDR r0, =0xE000E000 @ Build address of NVIC registers
107 ADD r0, r0, r2 @ Build vector base register
113 LDR r0, =_tx_thread_system_stack_ptr @ Build address of system stack pointer
120 LDR r0, =0xE000E000 @ Build address of NVIC registers
123 LDR r1, =0x7 @ Build SysTick Control Enable Value
129 LDR r0, =0xE000E000 @ Build address of NVIC registers
134 LDR r0, =0xE000E000 @ Build address of NVIC registers
[all …]
/ThreadX-v6.3.0/ports/cortex_m0/iar/example_build/
Dtx_initialize_low_level.s99 LDR r2, =_tx_initialize_unused_memory ; Build address of unused memory pointer
104 ; LDR r0, =0xE0001000 ; Build address of DWT register
112 LDR r0, =0xE000E000 ; Build address of NVIC registers
114 ADD r0, r0, r2 ; Build vector base register
120 LDR r0, =_tx_thread_system_stack_ptr ; Build address of system stack pointer
127 LDR r0, =0xE000E000 ; Build address of NVIC registers
130 MOVS r1, #0x7 ; Build SysTick Control Enable Value
136 LDR r0, =0xE000E000 ; Build address of NVIC registers
142 LDR r0, =0xE000E000 ; Build address of NVIC registers
149 LDR r0, =0xE000E000 ; Build address of NVIC registers
/ThreadX-v6.3.0/ports_smp/mips32_interaptiv_smp/gnu/src/
Dtx_thread_smp_initialize_wait.S82 la $8, _tx_thread_smp_release_cores_flag # Build address of release cores flag
94 sll $8, $8, 2 # Build index based on VPE number
98 la $9, _tx_thread_system_state # Build address of system state variable
107 ori $8, $8, INITIAL_SR # Build initial SR
111 …la $8, _tx_thread_system_state # Build address of system state variable of logical VP…
/ThreadX-v6.3.0/ports/c667x/ccs/src/
Dtx_timer_interrupt.asm109 MVKL _tx_timer_system_clock,A0 ; Build address of system clock
112 MVKL _tx_timer_time_slice,A3 ; Build address of time slice
135 MVKL _tx_timer_expired_time_slice,A0 ; Build address of expired flag
152 MVKL _tx_timer_current_ptr,A2 ; Build address of current timer pointer
155 MVKL _tx_timer_expired,A3 ; Build address of expired flag
167 MVKL 1,A4 ; Build expired flag
182 MVKL _tx_timer_list_end,A3 ; Build timer list end address
185 MVKL _tx_timer_list_start,A3 ; Build timer list start address
208 MVKL _tx_timer_expired_time_slice,A3 ; Build time-slice expired flag
211 MVKL _tx_timer_expired,A0 ; Build timer expired flag
[all …]
/ThreadX-v6.3.0/ports/win32/vs_2019/example_build/
Dazure_rtos.sln21 {7342DEEF-AB3F-00D5-9EDB-2829CD277B76}.Debug|Win32.Build.0 = Debug|Win32
24 {7342DEEF-AB3F-00D5-9EDB-2829CD277B76}.Release|Win32.Build.0 = Release|Win32
27 {7342DEEF-AB3F-00D5-9EDB-2829CD277B76}.Template|Win32.Build.0 = Release|Win32
29 {7342DEEF-AB3F-00D5-9EDB-2829CD277B76}.Template|x64.Build.0 = Release|Win32
31 {51907112-62DA-98D6-7897-5A2FD48B99C3}.Debug|Win32.Build.0 = Debug|Win32
34 {51907112-62DA-98D6-7897-5A2FD48B99C3}.Release|Win32.Build.0 = Release|Win32
37 {51907112-62DA-98D6-7897-5A2FD48B99C3}.Template|Win32.Build.0 = Template|Win32
/ThreadX-v6.3.0/ports/cortex_m0/ac5/example_build/
Dtx_initialize_low_level.s142 LDR r0, =_tx_initialize_unused_memory ; Build address of unused memory pointer
143 LDR r1, =|Image$$ZI$$Limit| ; Build first free address
149 LDR r0, =0xE000ED08 ; Build address of NVIC registers
155 ; LDR r0, =0xE0001000 ; Build address of DWT register
163 LDR r0, =0xE000E000 ; Build address of NVIC registers
165 ADD r0, r0, r2 ; Build vector base register
171 LDR r0, =_tx_thread_system_stack_ptr ; Build address of system stack pointer
178 LDR r0, =0xE000E000 ; Build address of NVIC registers
181 MOVS r1, #0x7 ; Build SysTick Control Enable Value
187 LDR r0, =0xE000E000 ; Build address of NVIC registers
[all …]
/ThreadX-v6.3.0/ports/cortex_m0/keil/example_build/
Dtx_initialize_low_level.s142 LDR r0, =_tx_initialize_unused_memory ; Build address of unused memory pointer
143 LDR r1, =|Image$$ZI$$Limit| ; Build first free address
149 LDR r0, =0xE000ED08 ; Build address of NVIC registers
155 ; LDR r0, =0xE0001000 ; Build address of DWT register
163 LDR r0, =0xE000E000 ; Build address of NVIC registers
165 ADD r0, r0, r2 ; Build vector base register
171 LDR r0, =_tx_thread_system_stack_ptr ; Build address of system stack pointer
178 LDR r0, =0xE000E000 ; Build address of NVIC registers
181 MOVS r1, #0x7 ; Build SysTick Control Enable Value
187 LDR r0, =0xE000E000 ; Build address of NVIC registers
[all …]
/ThreadX-v6.3.0/ports/cortex_m0/gnu/example_build/
Dtx_initialize_low_level.S106 LDR r0, =_tx_initialize_unused_memory @ Build address of unused memory pointer
107 LDR r1, =__RAM_segment_used_end__ @ Build first free address
113 @ LDR r0, =0xE0001000 @ Build address of DWT register
121 LDR r0, =0xE000E000 @ Build address of NVIC registers
123 ADD r0, r0, r2 @ Build vector base register
129 LDR r0, =_tx_thread_system_stack_ptr @ Build address of system stack pointer
136 LDR r0, =0xE000E000 @ Build address of NVIC registers
/ThreadX-v6.3.0/ports_module/cortex_m3/gnu/example_build/
Dtx_initialize_low_level.S94 LDR r0, =_tx_initialize_unused_memory @ Build address of unused memory pointer
95 LDR r1, =__RAM_segment_used_end__ @ Build first free address
100 MOV r0, #0xE000E000 @ Build address of NVIC registers
105 LDR r0, =_tx_thread_system_stack_ptr @ Build address of system stack pointer
111 LDR r0, =0xE0001000 @ Build address of DWT register
117 MOV r0, #0xE000E000 @ Build address of NVIC registers
120 MOV r1, #0x7 @ Build SysTick Control Enable Value
/ThreadX-v6.3.0/ports/cortex_m0/ac5/src/
Dtx_thread_schedule.s96 MOVS r0, #0 ; Build value for TX_FALSE
97 LDR r2, =_tx_thread_preempt_disable ; Build address of preempt disable flag
141 LDR r0, =_tx_thread_current_ptr ; Build current thread pointer address
142 LDR r2, =_tx_thread_execute_ptr ; Build execute thread pointer address
143 MOVS r3, #0 ; Build NULL value
170 LDR r4, =_tx_timer_time_slice ; Build address of time-slice variable
181 MOVS r5, #0 ; Build clear value
204 LDR r4, =_tx_timer_time_slice ; Build address of time-slice variable
/ThreadX-v6.3.0/ports/cortex_m0/ac6/src/
Dtx_thread_schedule.S102 MOVS r0, #0 @ Build value for TX_FALSE
103 LDR r2, =_tx_thread_preempt_disable @ Build address of preempt disable flag
154 LDR r0, =_tx_thread_current_ptr @ Build current thread pointer address
155 LDR r2, =_tx_thread_execute_ptr @ Build execute thread pointer address
156 MOVS r3, #0 @ Build NULL value
183 LDR r4, =_tx_timer_time_slice @ Build address of time-slice variable
194 MOVS r5, #0 @ Build clear value
217 LDR r4, =_tx_timer_time_slice @ Build address of time-slice variable
/ThreadX-v6.3.0/ports/cortex_m0/gnu/src/
Dtx_thread_schedule.S102 MOVS r0, #0 @ Build value for TX_FALSE
103 LDR r2, =_tx_thread_preempt_disable @ Build address of preempt disable flag
154 LDR r0, =_tx_thread_current_ptr @ Build current thread pointer address
155 LDR r2, =_tx_thread_execute_ptr @ Build execute thread pointer address
156 MOVS r3, #0 @ Build NULL value
183 LDR r4, =_tx_timer_time_slice @ Build address of time-slice variable
194 MOVS r5, #0 @ Build clear value
217 LDR r4, =_tx_timer_time_slice @ Build address of time-slice variable
/ThreadX-v6.3.0/ports/cortex_m0/iar/src/
Dtx_thread_schedule.s94 MOVS r0, #0 ; Build value for TX_FALSE
95 LDR r2, =_tx_thread_preempt_disable ; Build address of preempt disable flag
138 LDR r0, =_tx_thread_current_ptr ; Build current thread pointer address
139 LDR r2, =_tx_thread_execute_ptr ; Build execute thread pointer address
140 MOVS r3, #0 ; Build NULL value
167 LDR r4, =_tx_timer_time_slice ; Build address of time-slice variable
178 MOVS r5, #0 ; Build clear value
202 LDR r4, =_tx_timer_time_slice ; Build address of time-slice variable
/ThreadX-v6.3.0/ports/cortex_m0/keil/src/
Dtx_thread_schedule.s96 MOVS r0, #0 ; Build value for TX_FALSE
97 LDR r2, =_tx_thread_preempt_disable ; Build address of preempt disable flag
141 LDR r0, =_tx_thread_current_ptr ; Build current thread pointer address
142 LDR r2, =_tx_thread_execute_ptr ; Build execute thread pointer address
143 MOVS r3, #0 ; Build NULL value
170 LDR r4, =_tx_timer_time_slice ; Build address of time-slice variable
181 MOVS r5, #0 ; Build clear value
205 LDR r4, =_tx_timer_time_slice ; Build address of time-slice variable

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