| /ThreadX-v6.2.1/ports_smp/mips32_interaptiv_smp/green/example_build/ |
| D | probe_interaptiv_3c2v4t.cfg | 1 set trace_clock_source normal
2 set adapter auto [pdtrace]
3 set clock 10 MHz
4 set use_rtck off
5 set use_swd off
6 set logic_high 2.5
7 set target interaptiv.4 mips_vpe interaptiv.4 mips_vpe interaptiv.4 mips_vpe mips_cm
8 set checker on
9 set power_detect on
10 set rst_pulse 200 ms
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| /ThreadX-v6.2.1/cmake/ |
| D | linux.cmake | 1 set(CMAKE_SYSTEM_NAME Linux)
2 set(CMAKE_SYSTEM_PROCESSOR x86_64)
4 set(CMAKE_C_COMPILER gcc)
5 set(CMAKE_CXX_COMPILER g++)
6 set(AS as)
7 set(AR ar)
8 set(OBJCOPY objcopy)
9 set(OBJDUMP objdump)
10 set(SIZE size)
12 set(THREADX_ARCH "linux")
[all …]
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| D | win32.cmake | 1 set(CMAKE_SYSTEM_NAME Windows)
2 set(CMAKE_SYSTEM_PROCESSOR x86_64)
4 set(THREADX_ARCH "win32")
5 set(THREADX_TOOLCHAIN "vs_2019")
7 set(WIN32_FLAGS "")
9 set(CMAKE_C_FLAGS "${WIN32_FLAGS} " CACHE INTERNAL "c compiler flags")
10 set(CMAKE_CXX_FLAGS "${WIN32_FLAGS} -fno-rtti -fno-exceptions" CACHE INTERNAL "cxx compiler flags")
11 set(CMAKE_ASM_FLAGS "${WIN32_FLAGS} -x assembler-with-cpp" CACHE INTERNAL "asm compiler flags")
12 set(CMAKE_EXE_LINKER_FLAGS "${WIN32_FLAGS} ${LD_FLAGS}" CACHE INTERNAL "exe link flags")
14 # this makes the test compiles use static library option so that we don't need to pre-set linker fl…
[all …]
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| D | cortex_m0.cmake | 2 set(CMAKE_SYSTEM_NAME Generic)
3 set(CMAKE_SYSTEM_PROCESSOR cortex-m0)
5 set(THREADX_ARCH "cortex_m0")
6 set(THREADX_TOOLCHAIN "gnu")
8 set(MCPU_FLAGS "-mthumb -mcpu=cortex-m0")
9 set(VFP_FLAGS "")
10 set(SPEC_FLAGS "--specs=nosys.specs")
11 # set(LD_FLAGS "-nostartfiles")
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| D | cortex_m3.cmake | 2 set(CMAKE_SYSTEM_NAME Generic)
3 set(CMAKE_SYSTEM_PROCESSOR cortex-m3)
5 set(THREADX_ARCH "cortex_m3")
6 set(THREADX_TOOLCHAIN "gnu")
8 set(MCPU_FLAGS "-mthumb -mcpu=cortex-m3")
9 set(VFP_FLAGS "")
10 set(SPEC_FLAGS "--specs=nosys.specs")
11 # set(LD_FLAGS "-nostartfiles")
|
| D | cortex_m4.cmake | 2 set(CMAKE_SYSTEM_NAME Generic)
3 set(CMAKE_SYSTEM_PROCESSOR cortex-m4)
5 set(THREADX_ARCH "cortex_m4")
6 set(THREADX_TOOLCHAIN "gnu")
8 set(MCPU_FLAGS "-mthumb -mcpu=cortex-m4")
9 set(VFP_FLAGS "")
10 set(SPEC_FLAGS "--specs=nosys.specs")
11 # set(LD_FLAGS "-nostartfiles")
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| D | cortex_m7.cmake | 2 set(CMAKE_SYSTEM_NAME Generic)
3 set(CMAKE_SYSTEM_PROCESSOR cortex-m7)
5 set(THREADX_ARCH "cortex_m7")
6 set(THREADX_TOOLCHAIN "gnu")
8 set(MCPU_FLAGS "-mthumb -mcpu=cortex-m7")
9 set(VFP_FLAGS "")
10 set(SPEC_FLAGS "--specs=nosys.specs")
11 # set(LD_FLAGS "-nostartfiles")
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| D | arm-none-eabi.cmake | 2 set(CMAKE_C_COMPILER arm-none-eabi-gcc)
3 set(CMAKE_CXX_COMPILER arm-none-eabi-g++)
4 set(AS arm-none-eabi-as)
5 set(AR arm-none-eabi-ar)
6 set(OBJCOPY arm-none-eabi-objcopy)
7 set(OBJDUMP arm-none-eabi-objdump)
8 set(SIZE arm-none-eabi-size)
10 set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
11 set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
12 set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
[all …]
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| /ThreadX-v6.2.1/utility/rtos_compatibility_layers/posix/ |
| D | px_sig_wait.c | 74 int sigwait(const sigset_t *set, int *sig) in sigwait() argument
113 …nals.signal_mask.signal_set & base_thread -> signals.signal_pending.signal_set & set -> signal_set; in sigwait()
125 changed_mask = saved_mask & ~(set -> signal_set); in sigwait()
128 pthread_sigmask(SIG_UNBLOCK, set, &original_set); in sigwait()
149 if (base_thread -> signals.signal_mask.signal_set & set -> signal_set) in sigwait()
158 changed_mask = saved_mask & ~(set -> signal_set); in sigwait()
165 …status = tx_event_flags_get(&(base_thread -> signals.signal_event_flags), (ULONG) set -> signal_s… in sigwait()
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| D | signal.h | 107 int sigwait(const sigset_t *set, int *sig);
108 int sigemptyset(sigset_t *set);
109 int sigaddset(sigset_t *set, int signo);
110 int sigfillset(sigset_t *set);
111 int sigdelset(sigset_t *set, int signo);
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| D | px_sig_emptyset.c | 68 int sigemptyset(sigset_t *set) in sigemptyset() argument
72 if (!set) in sigemptyset()
81 set -> signal_set = 0; in sigemptyset()
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| D | px_sig_fillset.c | 69 int sigfillset(sigset_t *set) in sigfillset() argument
73 if (!set) in sigfillset()
82 set -> signal_set = 0xFFFFFFFF; in sigfillset()
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| D | px_sig_delset.c | 70 int sigdelset(sigset_t *set, int signo) in sigdelset() argument
83 set -> signal_set = set -> signal_set & ~(((unsigned long) 1) << signo); in sigdelset()
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| D | px_sig_addset.c | 70 int sigaddset(sigset_t *set, int signo) in sigaddset() argument
83 set -> signal_set = set -> signal_set | (((ULONG) 1) << signo); in sigaddset()
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| /ThreadX-v6.2.1/ports/c667x/ccs/src/ |
| D | tx_thread_stack_build.asm | 32 FP .set A15
33 DP .set B14
34 SP .set B15
35 ADDRESS_MSK .set 0xFFFFFFF0
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| D | tx_thread_interrupt_control.asm | 32 FP .set A15
33 DP .set B14
34 SP .set B15
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| /ThreadX-v6.2.1/ports/c667x/ccs/example_build/sample_threadx_c6678evm/ |
| D | tx_initialize_low_level.asm | 35 SP .set B15
36 ADDRESS_MSK .set 0xFFFFFFF0 ; Ensure 16-byte alignment
|
| /ThreadX-v6.2.1/ports/c667x/ccs/example_build/sample_threadx_ta6678fmc/ |
| D | tx_initialize_low_level.asm | 35 SP .set B15
36 ADDRESS_MSK .set 0xFFFFFFF0 ; Ensure 16-byte alignment
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| /ThreadX-v6.2.1/ |
| D | CMakeLists.txt | 22 set(CUSTOM_INC_DIR ${CMAKE_CURRENT_BINARY_DIR}/custom_inc)
49 set(TX_USER_FILE ${CMAKE_CURRENT_LIST_DIR}/common/inc/tx_user_sample.h)
61 set(CPACK_SOURCE_GENERATOR "ZIP")
62 set(CPACK_SOURCE_IGNORE_FILES
71 set(CPACK_VERBATIM_VARIABLES YES)
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| /ThreadX-v6.2.1/ports_smp/mips32_interaptiv_smp/gnu/example_build/ |
| D | init_cpc.S | 52 .set noreorder // Don't allow the assembler to reorder instructions.
53 .set noat // Don't allow the assembler to use r1(at) for synthetic instr.
|
| D | join_domain.S | 52 .set noreorder // Don't allow the assembler to reorder instructions.
53 .set noat // Don't allow the assembler to use r1(at) for synthetic instr.
|
| D | init_gpr.S | 51 .set noreorder // Don't allow the assembler to reorder instructions.
52 .set noat // Don't allow the assembler to use r1(at) for synthetic instr.
|
| D | init_tlb.S | 51 .set noreorder // Don't allow the assembler to reorder instructions.
52 .set noat // Don't allow the assembler to use r1(at) for synthetic instr.
|
| /ThreadX-v6.2.1/ports_smp/cortex_a5x_smp/green/example_build/sample_threadx/ |
| D | tx_boot.a64 | 112 // set cores 1-3 in reset state
120 // set reset vector for cores 0-3
166 // set vector table base address
174 // set stack pointer for current core
184 // set SCR_EL3
188 // set CPUACTLR_EL1
192 // set the generic timer frequency
257 ubfx w7, w1, #13, #15 // w7 = max set number, right aligned
258 lsl w7, w7, w2 // w7 = max set number, aligned to position in DC operand
259 lsl w17, w8, w2 // w17 = amount to decrement set number per iteration
[all …]
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| /ThreadX-v6.2.1/ports_smp/mips32_interaptiv_smp/gnu/src/ |
| D | tx_thread_interrupt_control.S | 29 .set noreorder
80 lui $9, SET_SR_MASK_U # Build set SR mask
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