| /ThreadX-v6.2.1/ports/xtensa/xcc/src/ |
| D | xtensa_intr.c | 59 xt_exc_handler xt_set_exception_handler(uint32_t n, xt_exc_handler f) in xt_set_exception_handler() argument
69 if (f != NULL) { in xt_set_exception_handler()
70 _xt_exception_table[n] = f; in xt_set_exception_handler()
119 xt_handler xt_set_interrupt_handler(uint32_t n, xt_handler f, void * arg) in xt_set_interrupt_handler() argument
141 if (f != NULL) { in xt_set_interrupt_handler()
142 entry->handler = f; in xt_set_interrupt_handler()
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| D | xtensa_coproc_handler.S | 233 bnez a15, 1f
236 beqz a15, 2f
287 bbci.l a11, 0, 2f // CP 0 not enabled
295 bbci.l a11, 1, 2f // CP 1 not enabled
303 bbci.l a11, 2, 2f
311 bbci.l a11, 3, 2f
319 bbci.l a11, 4, 2f
327 bbci.l a11, 5, 2f
335 bbci.l a11, 6, 2f
343 bbci.l a11, 7, 2f
[all …]
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| D | xtensa_vectors.S | 146 beqz a2, 9f /* nothing to do */
174 beqz a4, 2f
177 beqz a2, 9f
181 beqz a6, 9f
217 beq a3, a4, 7f /* if timer interrupt then skip table */
237 j 8f
265 j 8f
607 beqz a4, 1f
715 bne a3, a0, 1f
717 beqz a0, 1f /* { */
[all …]
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| D | tx_timer_interrupt.S | 93 beqz a2, 1f
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| D | xtensa_vectors_xea3.S | 208 j 1f // make room for literals
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| D | xtensa_context.S | 421 bne a2, a7, 2f /* if (coproc_sa_base == owner) */
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| /ThreadX-v6.2.1/ports/xtensa/xcc/inc/ |
| D | xtensa_api.h | 60 extern xt_exc_handler xt_set_exception_handler(uint32_t n, xt_exc_handler f);
72 extern xt_handler xt_set_interrupt_handler(uint32_t n, xt_handler f, void * arg);
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| D | xtensa_context.h | 512 beqz a2, 1f
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| /ThreadX-v6.2.1/ports/cortex_r4/ac6/src/ |
| D | tx_thread_fiq_nesting_start.S | 94 CPSIE f // Enable FIQ interrupts
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| /ThreadX-v6.2.1/ports_module/cortex_r4/ac6/module_manager/src/ |
| D | tx_thread_fiq_nesting_start.S | 94 CPSIE f // Enable FIQ interrupts
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| /ThreadX-v6.2.1/ports_smp/mips32_interaptiv_smp/gnu/example_build/ |
| D | init_vpe1.S | 121 bnez v1, 2f // Bind spare a3_TC's to VPElast
192 beqz a3_TC, 1f
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| /ThreadX-v6.2.1/ports_smp/arc_hs_smp/metaware/example_build/sample_threadx/ |
| D | crt1cl.s | 54 mov.f r0, __xcheck
68 sub.f 0, r2, 0
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| /ThreadX-v6.2.1/ports/arc_hs/metaware/src/ |
| D | tx_thread_context_fast_restore.s | 120 sub.f 0, r0, 0 ; Set condition codes
291 sub.f 0, r4, r5 ; Set condition codes
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| D | tx_thread_context_restore.s | 159 sub.f 0, r0, 0 ; Set condition codes
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| /ThreadX-v6.2.1/common_smp/inc/ |
| D | tx_trace.h | 63 #define TX_TRACE_IN_LINE_INSERT(i,a,b,c,d,f) argument
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| /ThreadX-v6.2.1/common/inc/ |
| D | tx_trace.h | 63 #define TX_TRACE_IN_LINE_INSERT(i,a,b,c,d,f) argument
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| /ThreadX-v6.2.1/ports_smp/mips32_interaptiv_smp/green/example_build/ |
| D | init_vpe1.mip | 121 bnez v1, 2f // Bind spare a3_TC's to VPElast
192 beqz a3_TC, 1f
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| /ThreadX-v6.2.1/ports/arc_em/metaware/src/ |
| D | tx_thread_context_restore.s | 165 sub.f 0, r0, 0 ; Set condition codes
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| /ThreadX-v6.2.1/ports_smp/arc_hs_smp/metaware/src/ |
| D | tx_thread_context_restore.s | 168 sub.f 0, r0, 0 ; Set condition codes
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