1 2 /**************************************************************************/ 3 /* Copyright (c) Cadence Design Systems, Inc. */ 4 /* */ 5 /* Permission is hereby granted, free of charge, to any person obtaining */ 6 /* a copy of this software and associated documentation files (the */ 7 /* "Software"), to deal in the Software without restriction, including */ 8 /* without limitation the rights to use, copy, modify, merge, publish, */ 9 /* distribute, sublicense, and/or sell copies of the Software, and to */ 10 /* permit persons to whom the Software is furnished to do so, subject to */ 11 /* the following conditions: */ 12 /* */ 13 /* The above copyright notice and this permission notice shall be */ 14 /* included in all copies or substantial portions of the Software. */ 15 /* */ 16 /* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, */ 17 /* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF */ 18 /* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. */ 19 /* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY */ 20 /* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, */ 21 /* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE */ 22 /* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ 23 /**************************************************************************/ 24 25 /************************************************************************** 26 27 RTOS-SPECIFIC INFORMATION FOR XTENSA RTOS ASSEMBLER SOURCES 28 29 This header is the primary glue between generic Xtensa RTOS support 30 sources and a specific RTOS port for Xtensa. It contains definitions 31 and macros for use primarily by Xtensa assembly coded source files. 32 33 Macros in this header map callouts from generic Xtensa files to specific 34 RTOS functions. It may also be included in C source files. 35 36 Xtensa RTOS ports support all RTOS-compatible configurations of the Xtensa 37 architecture, using the Xtensa hardware abstraction layer (HAL) to deal 38 with configuration specifics. 39 40 Should be included by all Xtensa generic and RTOS port-specific sources. 41 42 ***************************************************************************/ 43 44 #ifndef XTENSA_RTOS_H 45 #define XTENSA_RTOS_H 46 47 #ifdef __ASSEMBLER__ 48 #include <xtensa/coreasm.h> 49 #else 50 #include <stdint.h> 51 #include <xtensa/config/core.h> 52 #endif 53 54 #include <xtensa/corebits.h> 55 #include <xtensa/config/system.h> 56 #include <xtensa/simcall.h> 57 58 /* 59 Include any RTOS specific definitions that are needed by this header. 60 */ 61 #include "tx_user.h" 62 63 /* 64 Name of RTOS (for messages). 65 */ 66 #define XT_RTOS_NAME ThreadX 67 68 /* 69 Check some Xtensa configuration requirements and report error if not met. 70 Error messages can be customize to the RTOS port. 71 */ 72 73 #if !XCHAL_HAVE_XEA2 && !XCHAL_HAVE_XEA3 74 #error "ThreadX/Xtensa requires Xtensa Exception Architecture v2 (XEA2) or higher." 75 #endif 76 77 78 /*************************************************************************** 79 80 RTOS CALLOUT MACROS MAPPED TO RTOS PORT-SPECIFIC FUNCTIONS. 81 82 Define callout macros used in generic Xtensa code to interact with the RTOS. 83 The macros are simply the function names for use in calls from assembler code. 84 Some of these functions may call back to generic functions in xtensa_context.h . 85 86 ***************************************************************************/ 87 88 /* 89 Inform RTOS of entry into an interrupt handler that will affect it. 90 Allows RTOS to manage switch to any system stack and count nesting level. 91 Called after minimal context has been saved, with interrupts disabled. 92 RTOS port can call0 _xt_context_save to save the rest of the context. 93 May only be called from assembly code by the 'call0' instruction. 94 */ 95 // void XT_RTOS_INT_ENTER(void) 96 #define XT_RTOS_INT_ENTER _tx_thread_context_save 97 98 /* 99 Inform RTOS of completion of an interrupt handler, and give control to 100 RTOS to perform thread/task scheduling, switch back from any system stack 101 and restore the context, and return to the exit dispatcher saved in the 102 stack frame at XT_STK_EXIT. RTOS port can call0 _xt_context_restore 103 to save the context saved in XT_RTOS_INT_ENTER via _xt_context_save, 104 leaving only a minimal part of the context to be restored by the exit 105 dispatcher. This function does not return to the place it was called from. 106 May only be called from assembly code by the 'call0' instruction. 107 */ 108 // void XT_RTOS_INT_EXIT(void) 109 #define XT_RTOS_INT_EXIT _tx_thread_context_restore 110 111 /* 112 Convenience macros to disable and enable interrupts. 113 */ 114 #if XCHAL_HAVE_XEA3 115 #define XT_INTS_DISABLE(reg) movi reg, PS_DI; xps reg, reg 116 #define XT_INTS_ENABLE(reg) wsr reg, PS; rsync 117 #else 118 #define XT_INTS_DISABLE(reg) rsil reg, XCHAL_EXCM_LEVEL 119 #define XT_INTS_ENABLE(reg) wsr reg, PS; rsync 120 #endif 121 122 /* 123 Inform RTOS of the occurrence of a tick timer interrupt. 124 If RTOS has no tick timer, leave XT_RTOS_TIMER_INT undefined. 125 May be coded in or called from C or assembly, per ABI conventions. 126 */ 127 #ifndef TX_NO_TIMER 128 // void XT_RTOS_TIMER_INT(void) 129 #define XT_RTOS_TIMER_INT _tx_timer_interrupt 130 #endif 131 132 /* 133 Return in a15 the base address of the co-processor state save area for the 134 thread that triggered a co-processor exception, or 0 if no thread was running. 135 The state save area is structured as defined in xtensa_context.h and has size 136 XT_CP_SIZE. Co-processor instructions should only be used in thread code, never 137 in interrupt handlers or the RTOS kernel. May only be called from assembly code 138 and by the 'call0' instruction. A result of 0 indicates an unrecoverable error. 139 The implementation may use only a2-4, a15 (all other regs must be preserved). 140 */ 141 // void* XT_RTOS_CP_STATE(void) 142 #define XT_RTOS_CP_STATE _tx_thread_coproc_state 143 144 145 /*************************************************************************** 146 147 HOOKS TO DYNAMICALLY INSTALL INTERRUPT AND EXCEPTION HANDLERS PER LEVEL. 148 149 This Xtensa RTOS port provides hooks for dynamically installing exception 150 and interrupt handlers to facilitate automated testing where each test 151 case can install its own handler for user exceptions and each interrupt 152 priority (level). This consists of an array of function pointers indexed 153 by interrupt priority, with index 0 being the user exception handler hook. 154 Each entry in the array is initially 0, and may be replaced by a function 155 pointer of type XT_INTEXC_HOOK. A handler may be uninstalled by installing 0. 156 157 The handler for low and medium priority obeys ABI conventions so may be coded 158 in C. For the exception handler, the cause is the contents of the EXCCAUSE 159 reg, and the result is -1 if handled, else the cause (still needs handling). 160 For interrupt handlers, the cause is a mask of pending enabled interrupts at 161 that level, and the result is the same mask with the bits for the handled 162 interrupts cleared (those not cleared still need handling). This allows a test 163 case to either pre-handle or override the default handling for the exception 164 or interrupt level (see xtensa_vectors.S). 165 166 High priority handlers (including NMI) must be coded in assembly, are always 167 called by 'call0' regardless of ABI, must preserve all registers except a0, 168 and must not use or modify the interrupted stack. The hook argument 'cause' 169 is not passed and the result is ignored, so as not to burden the caller with 170 saving and restoring a2 (it assumes only one interrupt per level - see the 171 discussion in high priority interrupts in xtensa_vectors.S). The handler 172 therefore should be coded to prototype 'void h(void)' even though it plugs 173 into an array of handlers of prototype 'uint32_t h(uint32_t)'. 174 175 To enable interrupt/exception hooks, compile the RTOS with '-DXT_INTEXC_HOOKS'. 176 177 ***************************************************************************/ 178 179 #define XT_INTEXC_HOOK_NUM (1 + XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI) 180 181 #ifndef __ASSEMBLER__ 182 typedef uint32_t (*XT_INTEXC_HOOK)(uint32_t cause); 183 extern volatile XT_INTEXC_HOOK _xt_intexc_hooks[XT_INTEXC_HOOK_NUM]; 184 #endif 185 186 187 /*************************************************************************** 188 189 CONVENIENCE INCLUSIONS. 190 191 Ensures RTOS specific files need only include this one Xtensa-generic header. 192 These headers are included last so they can use the RTOS definitions above. 193 194 ***************************************************************************/ 195 196 #include "xtensa_context.h" 197 198 #ifdef XT_RTOS_TIMER_INT 199 #include "xtensa_timer.h" 200 #endif 201 202 203 #endif /* XTENSA_RTOS_H */ 204 205
