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/ThreadX-v6.2.1/ports/cortex_r4/ac6/src/
Dtx_thread_fiq_nesting_start.S32 #define SYS_MODE 0x12 // System mode macro
91 CPS #SYS_MODE // Switch to system mode
Dtx_thread_irq_nesting_start.S32 #define SYS_MODE 0x1F // System mode bits macro
91 CPS #SYS_MODE // Switch to System Mode
/ThreadX-v6.2.1/ports_module/cortex_r4/ac6/module_manager/src/
Dtx_thread_fiq_nesting_start.S32 #define SYS_MODE 0x12 // System mode macro
91 CPS #SYS_MODE // Switch to system mode
Dtx_thread_irq_nesting_start.S32 #define SYS_MODE 0x1F // System mode bits macro
91 CPS #SYS_MODE // Switch to System Mode
Dtx_thread_context_restore.S37 #define SYS_MODE 0x1F // SYS mode macro
186 … CPS #SYS_MODE // Switch to SYS mode to save context on thread stack
194 …CPS #SYS_MODE // Switch to SYS mode to save remaining context on thr…
246 ORR r1, r1, #SYS_MODE // Change to SYS Mode
Dtx_thread_schedule.S46 #define SYS_MODE 0x1F // SYS mode macro
177 ORR r0, r0, #SYS_MODE // system mode code
181 CPS #SYS_MODE // Switch to SYS mode
219 CPS #SYS_MODE // Switch to SYS mode
316 CPS #SYS_MODE // Enter SYS mode
379 CPS #SYS_MODE // Enter SYS mode
390 CPS #SYS_MODE // Enter SYS mode
401 CPS #SYS_MODE // Enter SYS mode
Dtx_thread_stack_build.S33 #define SYS_MODE 0x1F // SYS mode macro
150 ORR r3, r3, #SYS_MODE // Build CPSR, SYS mode, interrupts enabled
Dtxm_module_manager_thread_stack_build.S26 #define SYS_MODE 0x1F // SYS mode macro
137 ORREQ r3, r3, #SYS_MODE // Flag not set: Build CPSR, SYS mode, IRQ enabled
/ThreadX-v6.2.1/ports/cortex_r5/iar/src/
Dtx_thread_irq_nesting_start.s34 SYS_MODE DEFINE 0x1F ; System mode label
88 CPS #SYS_MODE ; Enter SYS mode
/ThreadX-v6.2.1/ports/cortex_r4/iar/src/
Dtx_thread_irq_nesting_start.s34 SYS_MODE DEFINE 0x1F ; System mode label
88 CPS #SYS_MODE ; Enter SYS mode
/ThreadX-v6.2.1/ports_module/cortex_r4/iar/module_manager/src/
Dtx_thread_irq_nesting_start.s24 SYS_MODE DEFINE 0x1F ; System mode label
78 CPS #SYS_MODE ; Enter SYS mode
Dtx_thread_stack_build.s24 SYS_MODE DEFINE 0x1F ; SYS mode label
130 ORR r3, r1, #SYS_MODE ; Build CPSR, SYS mode, interrupts enabled
/ThreadX-v6.2.1/ports_module/cortex_a7/gnu/module_manager/src/
Dtx_thread_schedule.s33 #define SYS_MODE 0x1F // SYS mode macro
171 ORR r0, r0, #SYS_MODE // system mode code
175 CPS #SYS_MODE // Switch to SYS mode
215 CPS #SYS_MODE // Switch to SYS mode
310 CPS #SYS_MODE // Enter SYS mode
363 CPS #SYS_MODE // Enter SYS mode
375 CPS #SYS_MODE // Enter SYS mode
386 CPS #SYS_MODE // Enter SYS mode
Dtxm_module_manager_thread_stack_build.s26 #define SYS_MODE 0x1F // SYS mode macro
140 ORREQ r3, r3, #SYS_MODE // Flag not set: Build CPSR, SYS mode, IRQ enabled
/ThreadX-v6.2.1/ports_module/cortex_r4/ac6/example_build/sample_threadx/
Dtx_initialize_low_level.S38 #define SYS_MODE 0x1F // SYS mode macro
436 CPS #SYS_MODE // Enter SYS mode
444 ORR r0, r0, #SYS_MODE // Return into SYS mode
/ThreadX-v6.2.1/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/
Dtx_initialize_low_level.S38 #define SYS_MODE 0x1F // SYS mode macro
436 CPS #SYS_MODE // Enter SYS mode
444 ORR r0, r0, #SYS_MODE // Return into SYS mode
/ThreadX-v6.2.1/ports_module/cortex_a7/gnu/example_build/
Dtx_initialize_low_level.s28 SYS_MODE = 0xDF // Disable IRQ/FIQ SYS mode define
121 MOV r3, #SYS_MODE // Build SYS mode CPSR
392 ORR r0, r0, #SYS_MODE // Return into SYS mode
/ThreadX-v6.2.1/ports/cortex_a12/ac6/example_build/sample_threadx/
Dtx_initialize_low_level.S28 SYS_MODE = 0xDF // Disable IRQ/FIQ SYS mode define
119 MOV r3, #SYS_MODE // Build SYS mode CPSR
/ThreadX-v6.2.1/ports/cortex_a12/gnu/example_build/
Dtx_initialize_low_level.S28 SYS_MODE = 0xDF // Disable IRQ/FIQ SYS mode define
120 MOV r3, #SYS_MODE // Build SYS mode CPSR
/ThreadX-v6.2.1/ports/cortex_a7/ac6/example_build/sample_threadx/
Dtx_initialize_low_level.S28 SYS_MODE = 0xDF // Disable IRQ/FIQ SYS mode define
119 MOV r3, #SYS_MODE // Build SYS mode CPSR
/ThreadX-v6.2.1/ports/cortex_a5/gnu/example_build/
Dtx_initialize_low_level.S28 SYS_MODE = 0xDF // Disable IRQ/FIQ SYS mode define
120 MOV r3, #SYS_MODE // Build SYS mode CPSR
/ThreadX-v6.2.1/ports/cortex_a5/ac6/example_build/sample_threadx/
Dtx_initialize_low_level.S28 SYS_MODE = 0xDF // Disable IRQ/FIQ SYS mode define
119 MOV r3, #SYS_MODE // Build SYS mode CPSR
/ThreadX-v6.2.1/ports/cortex_a15/ac6/example_build/sample_threadx/
Dtx_initialize_low_level.S28 SYS_MODE = 0xDF // Disable IRQ/FIQ SYS mode define
119 MOV r3, #SYS_MODE // Build SYS mode CPSR
/ThreadX-v6.2.1/ports/cortex_a15/gnu/example_build/
Dtx_initialize_low_level.S28 SYS_MODE = 0xDF // Disable IRQ/FIQ SYS mode define
120 MOV r3, #SYS_MODE // Build SYS mode CPSR
/ThreadX-v6.2.1/ports/cortex_a7/gnu/example_build/
Dtx_initialize_low_level.S28 SYS_MODE = 0xDF // Disable IRQ/FIQ SYS mode define
120 MOV r3, #SYS_MODE // Build SYS mode CPSR

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