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Searched refs:IRQEnable (Results 1 – 2 of 2) sorted by relevance

/ThreadX-v6.2.1/ports/arm11/ac5/example_build/
Dtx_initialize_low_level.s52 IRQEnable EQU 0x0a000008 ; IRQ Enable Set Register define
219 LDR r0,=IRQEnable ; Build address of IRQ enable register
/ThreadX-v6.2.1/ports/arm9/ac5/example_build/
Dtx_initialize_low_level.s52 IRQEnable EQU 0x0a000008 ; IRQ Enable Set Register define
219 LDR r0,=IRQEnable ; Build address of IRQ enable register