1 /***************************************************************************
2  * Copyright (c) 2024 Microsoft Corporation
3  *
4  * This program and the accompanying materials are made available under the
5  * terms of the MIT License which is available at
6  * https://opensource.org/licenses/MIT.
7  *
8  * SPDX-License-Identifier: MIT
9  **************************************************************************/
10 
11 
12 /**************************************************************************/
13 /**************************************************************************/
14 /**                                                                       */
15 /** ThreadX Component                                                     */
16 /**                                                                       */
17 /**   Zynq UltraScale+ MPSoC / Cortex-A53-SMP - Low-level functions       */
18 /**                                                                       */
19 /**************************************************************************/
20 /**************************************************************************/
21 
22 #ifndef TX_ZYNQMP_H
23 #define TX_ZYNQMP_H
24 
25 #include <stdint.h>
26 #include <stdlib.h>
27 
28 #ifdef   __cplusplus
29 
30 /* Yes, C++ compiler is present.  Use standard C.  */
31 extern   "C" {
32 #endif
33 
34 
35 /* Define Interrupt Handling Interface functions. */
36 
37 void tx_zynqmp_irq_enable(unsigned id, void (*handler)(void *), void *data);
38 void tx_zynqmp_irq_disable(unsigned id);
39 void tx_zynqmp_irq_priority(unsigned id, unsigned prio);
40 void tx_zynqmp_irq_config(unsigned id, int edge);
41 
42 
43 /* ThreadX SMP Extensions */
44 
45 void tx_zynqmp_irq_smp_core(unsigned irq_id, unsigned core_id);
46 
47 
48 /* Wait for small pauses */
49 
50 void tx_zynqmp_udelay(unsigned usecs);
51 
52 
53 #if 1   /* need compiler option -gnu_asm */
54 
55 /* Define the size of a cache line */
56 
57 #define TX_ZYNQMP_DCACHE_LINE_SIZE  64
58 
59 /* Flush (Clean & Invalidate) memory region */
60 
tx_zynqmp_dcache_flush(uintptr_t ptr,uintptr_t ptr_max)61 static inline void tx_zynqmp_dcache_flush(uintptr_t ptr, uintptr_t ptr_max)
62 {
63     while (ptr < ptr_max)
64     {
65         /* Clean & Invalidate data cache by VA to PoC */
66         asm volatile ( "DC CIVAC, %0" : : "r" (ptr));
67         ptr += TX_ZYNQMP_DCACHE_LINE_SIZE;
68     }
69     /* wait for completion */
70     asm volatile ( "DSB SY");
71 }
72 
73 /* Invalidate memory region */
74 
tx_zynqmp_dcache_invalidate(uintptr_t ptr,uintptr_t ptr_max)75 static inline void tx_zynqmp_dcache_invalidate(uintptr_t ptr, uintptr_t ptr_max)
76 {
77     while (ptr < ptr_max)
78     {
79         /* Invalidate data cache by VA to PoC */
80         asm volatile ( "DC IVAC, %0" : : "r" (ptr));
81         ptr += TX_ZYNQMP_DCACHE_LINE_SIZE;
82     }
83     /* wait for completion */
84     asm volatile ( "DSB SY");
85 }
86 
87 /* Clean memory region (without Invalidate) */
88 
tx_zynqmp_dcache_clean(uintptr_t ptr,uintptr_t ptr_max)89 static inline void tx_zynqmp_dcache_clean(uintptr_t ptr, uintptr_t ptr_max)
90 {
91     while (ptr < ptr_max)
92     {
93         /* Clean data cache by VA to PoC */
94         asm volatile ( "DC CVAC, %0" : : "r" (ptr));
95         ptr += TX_ZYNQMP_DCACHE_LINE_SIZE;
96     }
97     /* wait for completion */
98     asm volatile ( "DSB SY");
99 }
100 
101 #endif
102 
103 #ifdef   __cplusplus
104 /* Yes, C++ compiler is present.  Use standard C.  */
105     }
106 #endif
107 
108 #endif /* TX_ZYNQMP_H */
109