1 /**************************************************************************/
2 /* */
3 /* Copyright (c) Microsoft Corporation. All rights reserved. */
4 /* */
5 /* This software is licensed under the Microsoft Software License */
6 /* Terms for Microsoft Azure RTOS. Full text of the license can be */
7 /* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
8 /* and in the root directory of this software. */
9 /* */
10 /**************************************************************************/
11
12
13 /**************************************************************************/
14 /**************************************************************************/
15 /** */
16 /** ThreadX Component */
17 /** */
18 /** Zynq UltraScale+ MPSoC / Cortex-A53-SMP - Low-level functions */
19 /** */
20 /**************************************************************************/
21 /**************************************************************************/
22
23 #ifndef TX_ZYNQMP_H
24 #define TX_ZYNQMP_H
25
26 #include <stdint.h>
27 #include <stdlib.h>
28
29 #ifdef __cplusplus
30
31 /* Yes, C++ compiler is present. Use standard C. */
32 extern "C" {
33 #endif
34
35
36 /* Define Interrupt Handling Interface functions. */
37
38 void tx_zynqmp_irq_enable(unsigned id, void (*handler)(void *), void *data);
39 void tx_zynqmp_irq_disable(unsigned id);
40 void tx_zynqmp_irq_priority(unsigned id, unsigned prio);
41 void tx_zynqmp_irq_config(unsigned id, int edge);
42
43
44 /* ThreadX SMP Extensions */
45
46 void tx_zynqmp_irq_smp_core(unsigned irq_id, unsigned core_id);
47
48
49 /* Wait for small pauses */
50
51 void tx_zynqmp_udelay(unsigned usecs);
52
53
54 #if 1 /* need compiler option -gnu_asm */
55
56 /* Define the size of a cache line */
57
58 #define TX_ZYNQMP_DCACHE_LINE_SIZE 64
59
60 /* Flush (Clean & Invalidate) memory region */
61
tx_zynqmp_dcache_flush(uintptr_t ptr,uintptr_t ptr_max)62 static inline void tx_zynqmp_dcache_flush(uintptr_t ptr, uintptr_t ptr_max)
63 {
64 while (ptr < ptr_max)
65 {
66 /* Clean & Invalidate data cache by VA to PoC */
67 asm volatile ( "DC CIVAC, %0" : : "r" (ptr));
68 ptr += TX_ZYNQMP_DCACHE_LINE_SIZE;
69 }
70 /* wait for completion */
71 asm volatile ( "DSB SY");
72 }
73
74 /* Invalidate memory region */
75
tx_zynqmp_dcache_invalidate(uintptr_t ptr,uintptr_t ptr_max)76 static inline void tx_zynqmp_dcache_invalidate(uintptr_t ptr, uintptr_t ptr_max)
77 {
78 while (ptr < ptr_max)
79 {
80 /* Invalidate data cache by VA to PoC */
81 asm volatile ( "DC IVAC, %0" : : "r" (ptr));
82 ptr += TX_ZYNQMP_DCACHE_LINE_SIZE;
83 }
84 /* wait for completion */
85 asm volatile ( "DSB SY");
86 }
87
88 /* Clean memory region (without Invalidate) */
89
tx_zynqmp_dcache_clean(uintptr_t ptr,uintptr_t ptr_max)90 static inline void tx_zynqmp_dcache_clean(uintptr_t ptr, uintptr_t ptr_max)
91 {
92 while (ptr < ptr_max)
93 {
94 /* Clean data cache by VA to PoC */
95 asm volatile ( "DC CVAC, %0" : : "r" (ptr));
96 ptr += TX_ZYNQMP_DCACHE_LINE_SIZE;
97 }
98 /* wait for completion */
99 asm volatile ( "DSB SY");
100 }
101
102 #endif
103
104 #ifdef __cplusplus
105 /* Yes, C++ compiler is present. Use standard C. */
106 }
107 #endif
108
109 #endif /* TX_ZYNQMP_H */
110
