1 /**************************************************************************/ 2 /* */ 3 /* Copyright (c) Microsoft Corporation. All rights reserved. */ 4 /* */ 5 /* This software is licensed under the Microsoft Software License */ 6 /* Terms for Microsoft Azure RTOS. Full text of the license can be */ 7 /* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ 8 /* and in the root directory of this software. */ 9 /* */ 10 /**************************************************************************/ 11 12 13 /**************************************************************************/ 14 /**************************************************************************/ 15 /** */ 16 /** LevelX Component */ 17 /** */ 18 /** User Specific */ 19 /** */ 20 /**************************************************************************/ 21 /**************************************************************************/ 22 23 24 /**************************************************************************/ 25 /* */ 26 /* PORT SPECIFIC C INFORMATION RELEASE */ 27 /* */ 28 /* lx_user.h PORTABLE C */ 29 /* 6.3.0 */ 30 /* */ 31 /* AUTHOR */ 32 /* */ 33 /* William E. Lamie, Microsoft Corporation */ 34 /* */ 35 /* DESCRIPTION */ 36 /* */ 37 /* This file contains user defines for configuring LevelX in specific */ 38 /* ways. This file will have an effect only if the application and */ 39 /* LevelX library are built with LX_INCLUDE_USER_DEFINE_FILE defined. */ 40 /* Note that all the defines in this file may also be made on the */ 41 /* command line when building LevelX library and application objects. */ 42 /* */ 43 /* RELEASE HISTORY */ 44 /* */ 45 /* DATE NAME DESCRIPTION */ 46 /* */ 47 /* 11-09-2020 William E. Lamie Initial Version 6.1.2 */ 48 /* 06-02-2021 Bhupendra Naphade Modified comment(s), and */ 49 /* added standalone support, */ 50 /* resulting in version 6.1.7 */ 51 /* 03-08-2023 Xiuwen Cai Modified comment(s), and */ 52 /* added new NAND options, */ 53 /* resulting in version 6.2.1 */ 54 /* 10-31-2023 Xiuwen Cai Modified comment(s), */ 55 /* added options for mapping , */ 56 /* bitmap cache and obsolete */ 57 /* count cache, */ 58 /* resulting in version 6.3.0 */ 59 /* */ 60 /**************************************************************************/ 61 62 #ifndef LX_USER_H 63 #define LX_USER_H 64 65 66 67 /* Defined, this option bypasses the NOR flash driver read routine in favor or reading 68 the NOR memory directly, resulting in a significant performance increase. 69 */ 70 /* 71 #define LX_DIRECT_READ 72 */ 73 74 75 /* Defined, this causes the LevelX NOR instance open logic to verify free NOR 76 sectors are all ones. 77 */ 78 /* 79 #define LX_FREE_SECTOR_DATA_VERIFY 80 */ 81 82 /* By default this value is 4, which represents a maximum of 4 blocks that 83 can be allocated for metadata. 84 */ 85 /* 86 #define LX_NAND_FLASH_MAX_METADATA_BLOCKS 4 87 */ 88 89 /* Defined, this disabled the extended NOR cache. */ 90 /* 91 #define LX_NOR_DISABLE_EXTENDED_CACHE 92 */ 93 94 /* By default this value is 8, which represents a maximum of 8 sectors that 95 can be cached in a NOR instance. 96 */ 97 /* 98 #define LX_NOR_EXTENDED_CACHE_SIZE 8 99 */ 100 101 102 /* By default this value is 16 and defines the logical sector mapping cache size. 103 Large values improve performance, but cost memory. The minimum size is 8 and all 104 values must be a power of 2. 105 */ 106 /* 107 #define LX_NOR_SECTOR_MAPPING_CACHE_SIZE 16 108 */ 109 110 /* Defined, this makes LevelX thread-safe by using a ThreadX mutex object 111 throughout the API. 112 */ 113 /* 114 #define LX_THREAD_SAFE_ENABLE 115 */ 116 117 /* Defined, LevelX will be used in standalone mode (without Azure RTOS ThreadX) */ 118 119 /* #define LX_STANDALONE_ENABLE */ 120 121 /* Define user extension for NOR flash control block. User extension is placed at the end of flash control block and it is not cleared on opening flash. */ 122 /* 123 #define LX_NOR_FLASH_USER_EXTENSION ???? 124 */ 125 126 /* Define user extension for NAND flash control block. User extension is placed at the end of flash control block and it is not cleared on opening flash. */ 127 /* 128 #define LX_NAND_FLASH_USER_EXTENSION ???? 129 */ 130 131 /* Determine if logical sector mapping bitmap should be enabled in extended cache. 132 Cache memory will be allocated to sector mapping bitmap first. One bit can be allocated for each physical sector. */ 133 /* 134 #define LX_NOR_ENABLE_MAPPING_BITMAP 135 */ 136 137 /* Determine if obsolete count cache should be enabled in extended cache. 138 Cache memory will be allocated to obsolete count cache after the mapping bitmap if enabled, 139 and the rest of the cache memory is allocated to sector cache. */ 140 /* 141 #define LX_NOR_ENABLE_OBSOLETE_COUNT_CACHE 142 */ 143 144 /* Defines obsolete count cache element size. If number of sectors per block is greater than 256, use USHORT instead of UCHAR. */ 145 /* 146 #define LX_NOR_OBSOLETE_COUNT_CACHE_TYPE UCHAR 147 */ 148 149 /* Define the logical sector size for NOR flash. The sector size is in units of 32-bit words. 150 This sector size should match the sector size used in file system. */ 151 /* 152 #define LX_NOR_SECTOR_SIZE (512/sizeof(ULONG)) 153 */ 154 155 #endif 156 157
