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Searched defs:r3 (Results 1 – 3 of 3) sorted by relevance

/ThreadX-v6.2.1/ports_smp/cortex_a5_smp/ac5/src/
Dtx_thread_smp_protection_wait_list_macros.h34 LDR r3, [r2, #12] ; Pickup ownership count variable
35 ADD r3, r3, #1 ; Increment ownership count variable
36 STR r3, [r2, #12] ; Store ownership count variable
42 ADD r4, r3, r4 ; Build index into the current thread array variable
43 LDR r3, [r4] ; Pickup current thread for this core variable
57 MOV r3, #0xFFFFFFFF ; Build the invalid core value variable
61 STR r3, [r6, r5, LSL #2] ; Store the invalid core value variable
68 LDR r3, =_tx_thread_smp_protect_wait_list_size ; Load address of core list size variable
69 LDR r3, [r3] ; Load the max cores value variable
70 CMP r5, r3 ; Compare the head to it variable
[all …]
/ThreadX-v6.2.1/ports_smp/cortex_a7_smp/ac5/src/
Dtx_thread_smp_protection_wait_list_macros.h34 LDR r3, [r2, #12] ; Pickup ownership count variable
35 ADD r3, r3, #1 ; Increment ownership count variable
36 STR r3, [r2, #12] ; Store ownership count variable
42 ADD r4, r3, r4 ; Build index into the current thread array variable
43 LDR r3, [r4] ; Pickup current thread for this core variable
57 MOV r3, #0xFFFFFFFF ; Build the invalid core value variable
61 STR r3, [r6, r5, LSL #2] ; Store the invalid core value variable
68 LDR r3, =_tx_thread_smp_protect_wait_list_size ; Load address of core list size variable
69 LDR r3, [r3] ; Load the max cores value variable
70 CMP r5, r3 ; Compare the head to it variable
[all …]
/ThreadX-v6.2.1/ports_smp/cortex_a9_smp/ac5/src/
Dtx_thread_smp_protection_wait_list_macros.h34 LDR r3, [r2, #12] ; Pickup ownership count variable
35 ADD r3, r3, #1 ; Increment ownership count variable
36 STR r3, [r2, #12] ; Store ownership count variable
42 ADD r4, r3, r4 ; Build index into the current thread array variable
43 LDR r3, [r4] ; Pickup current thread for this core variable
57 MOV r3, #0xFFFFFFFF ; Build the invalid core value variable
61 STR r3, [r6, r5, LSL #2] ; Store the invalid core value variable
68 LDR r3, =_tx_thread_smp_protect_wait_list_size ; Load address of core list size variable
69 LDR r3, [r3] ; Load the max cores value variable
70 CMP r5, r3 ; Compare the head to it variable
[all …]