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/ThreadX-v6.2.1/ports_smp/cortex_a9_smp/ac5/src/
Dtx_thread_smp_protection_wait_list_macros.h202 CMP r3, r0 ; Did we find the core? variable
260 LDR r0, =_tx_thread_smp_protect_wait_list ; Get the address of the list variable
278 LDR r0, =_tx_thread_smp_protect_wait_list_tail ; Load tail address variable
300 MOV r0, #0 ; Build lock value variable
302 STR r0, [r1] ; Store the new value variable
309 AND r0, r0, #0x03 ; Mask off, leaving the CPU ID field variable
/ThreadX-v6.2.1/ports_smp/cortex_a5_smp/ac5/src/
Dtx_thread_smp_protection_wait_list_macros.h202 CMP r3, r0 ; Did we find the core? variable
260 LDR r0, =_tx_thread_smp_protect_wait_list ; Get the address of the list variable
278 LDR r0, =_tx_thread_smp_protect_wait_list_tail ; Load tail address variable
300 MOV r0, #0 ; Build lock value variable
302 STR r0, [r1] ; Store the new value variable
309 AND r0, r0, #0x03 ; Mask off, leaving the CPU ID field variable
/ThreadX-v6.2.1/ports_smp/cortex_a7_smp/ac5/src/
Dtx_thread_smp_protection_wait_list_macros.h260 LDR r0, =_tx_thread_smp_protect_wait_list ; Get the address of the list variable
278 LDR r0, =_tx_thread_smp_protect_wait_list_tail ; Load tail address variable
300 MOV r0, #0 ; Build lock value variable
302 STR r0, [r1] ; Store the new value variable