1 /*************************************************************************** 2 * Copyright (c) 2024 Microsoft Corporation 3 * 4 * This program and the accompanying materials are made available under the 5 * terms of the MIT License which is available at 6 * https://opensource.org/licenses/MIT. 7 * 8 * SPDX-License-Identifier: MIT 9 **************************************************************************/ 10 11 12 /**************************************************************************/ 13 /**************************************************************************/ 14 /** */ 15 /** USBX Component */ 16 /** */ 17 /** ASIX Class */ 18 /** */ 19 /**************************************************************************/ 20 /**************************************************************************/ 21 22 23 /**************************************************************************/ 24 /* */ 25 /* COMPONENT DEFINITION RELEASE */ 26 /* */ 27 /* ux_host_class_asix.h PORTABLE C */ 28 /* 6.2.0 */ 29 /* AUTHOR */ 30 /* */ 31 /* Chaoqiong Xiao, Microsoft Corporation */ 32 /* */ 33 /* DESCRIPTION */ 34 /* */ 35 /* This file contains all the header and extern functions used by the */ 36 /* USBX ASIX class. */ 37 /* */ 38 /* RELEASE HISTORY */ 39 /* */ 40 /* DATE NAME DESCRIPTION */ 41 /* */ 42 /* 05-19-2020 Chaoqiong Xiao Initial Version 6.0 */ 43 /* 09-30-2020 Chaoqiong Xiao Modified comment(s), */ 44 /* used UX prefix to refer to */ 45 /* TX symbols instead of using */ 46 /* them directly, */ 47 /* resulting in version 6.1 */ 48 /* 08-02-2021 Wen Wang Modified comment(s), */ 49 /* added extern "C" keyword */ 50 /* for compatibility with C++, */ 51 /* resulting in version 6.1.8 */ 52 /* 04-25-2022 Chaoqiong Xiao Modified comment(s), */ 53 /* fixed standalone compile, */ 54 /* resulting in version 6.1.11 */ 55 /* 10-31-2022 Chaoqiong Xiao Modified comment(s), */ 56 /* supported NX packet chain, */ 57 /* refined VID/PID check flow, */ 58 /* removed internal NX pool, */ 59 /* added some new definitions, */ 60 /* refined reception handling, */ 61 /* resulting in version 6.2.0 */ 62 /* */ 63 /**************************************************************************/ 64 65 #ifndef UX_HOST_CLASS_ASIX_H 66 #define UX_HOST_CLASS_ASIX_H 67 68 /* Determine if a C++ compiler is being used. If so, ensure that standard 69 C is used to process the API information. */ 70 71 #ifdef __cplusplus 72 73 /* Yes, C++ compiler is present. Use standard C. */ 74 extern "C" { 75 76 #endif 77 78 79 #if !defined(UX_HOST_STANDALONE) 80 #include "nx_api.h" 81 #include "ux_network_driver.h" 82 #else 83 84 /* Assume NX things for compiling. */ 85 #define NX_PACKET VOID* 86 #define NX_PACKET_POOL VOID* 87 #endif 88 89 /* Define to check if NetX preserved header size is compatible with ASIX. */ 90 /* #define UX_HOST_CLASS_ASIX_HEADER_CHECK_ENABLE */ 91 92 93 /* Define ASIX Class constants. Insert here the PID/VID of vendors and products using the Asix chipset. */ 94 #ifndef UX_HOST_CLASS_ASIX_VENDOR_ID 95 #define UX_HOST_CLASS_ASIX_VENDOR_ID 0X2001 96 #define UX_HOST_CLASS_ASIX_PRODUCT_ID 0X3C05 97 #endif 98 99 #define UX_HOST_CLASS_ASIX_VENDOR_FUJIEI_ID 0X0B95 100 #define UX_HOST_CLASS_ASIX_PRODUCT_FUJIEI_ID 0X772B 101 102 #define UX_HOST_CLASS_ASIX_VENDOR_LINKSYS_ID 0X13B1 103 #define UX_HOST_CLASS_ASIX_PRODUCT_LINKSYS_ID 0X0018 104 105 /* Define ASIX supported VID and PID array (of 16-bits). */ 106 #ifndef UX_HOST_CLASS_ASIX_VID_PID_ARRAY 107 #define UX_HOST_CLASS_ASIX_VID_PID_ARRAY \ 108 UX_HOST_CLASS_ASIX_VENDOR_ID, UX_HOST_CLASS_ASIX_PRODUCT_ID, \ 109 UX_HOST_CLASS_ASIX_VENDOR_FUJIEI_ID, UX_HOST_CLASS_ASIX_PRODUCT_FUJIEI_ID, \ 110 UX_HOST_CLASS_ASIX_VENDOR_LINKSYS_ID, UX_HOST_CLASS_ASIX_PRODUCT_LINKSYS_ID 111 #endif 112 113 #define UX_HOST_CLASS_ASIX_SPEED_SELECTED_100MPBS 0x100 114 #define UX_HOST_CLASS_ASIX_SPEED_SELECTED_10MPBS 0x10 115 #define UX_HOST_CLASS_ASIX_LINK_STATE_DOWN 0 116 #define UX_HOST_CLASS_ASIX_LINK_STATE_UP 1 117 #define UX_HOST_CLASS_ASIX_LINK_STATE_PENDING_UP 2 118 #define UX_HOST_CLASS_ASIX_LINK_STATE_PENDING_DOWN 3 119 #define UX_HOST_CLASS_ASIX_BASE_IP_ADDRESS 0xC0A80001 120 #define UX_HOST_CLASS_ASIX_BASE_IP_MASK 0xFFFFFF00 121 #define UX_HOST_CLASS_ASIX_MAX_MTU 1518 122 #define UX_HOST_CLASS_ASIX_ETHERNET_IP 0x0800 123 #define UX_HOST_CLASS_ASIX_ETHERNET_ARP 0x0806 124 #define UX_HOST_CLASS_ASIX_ETHERNET_RARP 0x8035 125 #define UX_HOST_CLASS_ASIX_ETHERNET_PACKET_SIZE 1536 126 #define UX_HOST_CLASS_ASIX_NX_ALIGN_PADDING 2 127 #define UX_HOST_CLASS_ASIX_RX_HEADER_SIZE 4 128 #define UX_HOST_CLASS_ASIX_OVERHEAD_SIZE (UX_HOST_CLASS_ASIX_NX_ALIGN_PADDING + UX_HOST_CLASS_ASIX_RX_HEADER_SIZE) 129 130 #define UX_HOST_CLASS_ASIX_TRANSMIT_BUFFER_SIZE UX_HOST_CLASS_ASIX_NX_PAYLOAD_SIZE 131 132 #ifndef UX_HOST_CLASS_ASIX_RECEIVE_BUFFER_SIZE 133 #define UX_HOST_CLASS_ASIX_RECEIVE_BUFFER_SIZE 512 /* N*512. */ 134 #endif 135 136 #ifdef NX_DISABLE_PACKET_CHAIN 137 #undef UX_HOST_CLASS_ASIX_PACKET_CHAIN_SUPPORT 138 #else 139 #define UX_HOST_CLASS_ASIX_PACKET_CHAIN_SUPPORT 140 #endif 141 142 #define UX_HOST_CLASS_ASIX_NX_PACKET_SIZE sizeof(NX_PACKET) 143 144 #define UX_HOST_CLASS_ASIX_NX_PAYLOAD_SIZE_ASSERT \ 145 UX_COMPILE_TIME_ASSERT(!UX_OVERFLOW_CHECK_ADD_ULONG( \ 146 UX_HOST_CLASS_ASIX_ETHERNET_PACKET_SIZE, \ 147 UX_HOST_CLASS_ASIX_OVERHEAD_SIZE), \ 148 UX_HOST_CLASS_ASIX_NX_PAYLOAD_SIZE_calc_ovf) 149 #define UX_HOST_CLASS_ASIX_NX_PAYLOAD_SIZE (UX_HOST_CLASS_ASIX_ETHERNET_PACKET_SIZE + UX_HOST_CLASS_ASIX_OVERHEAD_SIZE) 150 151 #define UX_HOST_CLASS_ASIX_NX_BUFF_SIZE_ASSERT \ 152 UX_HOST_CLASS_ASIX_NX_PAYLOAD_SIZE_ASSERT \ 153 UX_COMPILE_TIME_ASSERT(!UX_OVERFLOW_CHECK_ADD_ULONG( \ 154 UX_HOST_CLASS_ASIX_NX_PAYLOAD_SIZE, \ 155 UX_HOST_CLASS_ASIX_NX_PACKET_SIZE), \ 156 UX_HOST_CLASS_ASIX_NX_BUFF_SIZE_calc_ovf) 157 #define UX_HOST_CLASS_ASIX_NX_BUFF_SIZE (UX_HOST_CLASS_ASIX_NX_PAYLOAD_SIZE + UX_HOST_CLASS_ASIX_NX_PACKET_SIZE) 158 159 #define UX_HOST_CLASS_ASIX_ETHERNET_SIZE 14 160 161 #define UX_HOST_CLASS_ASIX_DEVICE_INIT_DELAY (1 * UX_PERIODIC_RATE) 162 #define UX_HOST_CLASS_ASIX_CLASS_TRANSFER_TIMEOUT 300000 163 #define UX_HOST_CLASS_ASIX_SETUP_BUFFER_SIZE 16 164 165 #define UX_HOST_CLASS_ASIX_PACKET_POOL_WAIT 100 166 #define UX_HOST_CLASS_ASIX_PACKET_ALLOCATE_WAIT 2000 167 168 /* Define NetX errors inside the Asix class. */ 169 #define UX_HOST_CLASS_ASIX_NX_SUCCESS 0x00 170 #define UX_HOST_CLASS_ASIX_NX_NO_PACKET 0x01 171 #define UX_HOST_CLASS_ASIX_NX_UNDERFLOW 0x02 172 #define UX_HOST_CLASS_ASIX_NX_OVERFLOW 0x03 173 #define UX_HOST_CLASS_ASIX_NX_NO_MAPPING 0x04 174 #define UX_HOST_CLASS_ASIX_NX_DELETED 0x05 175 #define UX_HOST_CLASS_ASIX_NX_POOL_ERROR 0x06 176 #define UX_HOST_CLASS_ASIX_NX_PTR_ERROR 0x07 177 #define UX_HOST_CLASS_ASIX_NX_WAIT_ERROR 0x08 178 #define UX_HOST_CLASS_ASIX_NX_SIZE_ERROR 0x09 179 #define UX_HOST_CLASS_ASIX_NX_OPTION_ERROR 0x0a 180 #define UX_HOST_CLASS_ASIX_NX_DELETE_ERROR 0x10 181 #define UX_HOST_CLASS_ASIX_NX_CALLER_ERROR 0x11 182 #define UX_HOST_CLASS_ASIX_NX_INVALID_PACKET 0x12 183 #define UX_HOST_CLASS_ASIX_NX_INVALID_SOCKET 0x13 184 #define UX_HOST_CLASS_ASIX_NX_NOT_ENABLED 0x14 185 #define UX_HOST_CLASS_ASIX_NX_ALREADY_ENABLED 0x15 186 #define UX_HOST_CLASS_ASIX_NX_ENTRY_NOT_FOUND 0x16 187 #define UX_HOST_CLASS_ASIX_NX_NO_MORE_ENTRIES 0x17 188 #define UX_HOST_CLASS_ASIX_NX_ARP_TIMER_ERROR 0x18 189 #define UX_HOST_CLASS_ASIX_NX_RESERVED_CODE0 0x19 190 #define UX_HOST_CLASS_ASIX_NX_WAIT_ABORTED 0x1A 191 #define UX_HOST_CLASS_ASIX_NX_IP_INTERNAL_ERROR 0x20 192 #define UX_HOST_CLASS_ASIX_NX_IP_ADDRESS_ERROR 0x21 193 #define UX_HOST_CLASS_ASIX_NX_ALREADY_BOUND 0x22 194 #define UX_HOST_CLASS_ASIX_NX_PORT_UNAVAILABLE 0x23 195 #define UX_HOST_CLASS_ASIX_NX_NOT_BOUND 0x24 196 #define UX_HOST_CLASS_ASIX_NX_RESERVED_CODE1 0x25 197 #define UX_HOST_CLASS_ASIX_NX_SOCKET_UNBOUND 0x26 198 #define UX_HOST_CLASS_ASIX_NX_NOT_CREATED 0x27 199 #define UX_HOST_CLASS_ASIX_NX_SOCKETS_BOUND 0x28 200 #define UX_HOST_CLASS_ASIX_NX_NO_RESPONSE 0x29 201 #define UX_HOST_CLASS_ASIX_NX_POOL_DELETED 0x30 202 #define UX_HOST_CLASS_ASIX_NX_ALREADY_RELEASED 0x31 203 #define UX_HOST_CLASS_ASIX_NX_RESERVED_CODE2 0x32 204 #define UX_HOST_CLASS_ASIX_NX_MAX_LISTEN 0x33 205 #define UX_HOST_CLASS_ASIX_NX_DUPLICATE_LISTEN 0x34 206 #define UX_HOST_CLASS_ASIX_NX_NOT_CLOSED 0x35 207 #define UX_HOST_CLASS_ASIX_NX_NOT_LISTEN_STATE 0x36 208 #define UX_HOST_CLASS_ASIX_NX_IN_PROGRESS 0x37 209 #define UX_HOST_CLASS_ASIX_NX_NOT_CONNECTED 0x38 210 #define UX_HOST_CLASS_ASIX_NX_WINDOW_OVERFLOW 0x39 211 #define UX_HOST_CLASS_ASIX_NX_ALREADY_SUSPENDED 0x40 212 #define UX_HOST_CLASS_ASIX_NX_DISCONNECT_FAILED 0x41 213 #define UX_HOST_CLASS_ASIX_NX_STILL_BOUND 0x42 214 #define UX_HOST_CLASS_ASIX_NX_NOT_SUCCESSFUL 0x43 215 #define UX_HOST_CLASS_ASIX_NX_UNHANDLED_COMMAND 0x44 216 #define UX_HOST_CLASS_ASIX_NX_NO_FREE_PORTS 0x45 217 #define UX_HOST_CLASS_ASIX_NX_INVALID_PORT 0x46 218 #define UX_HOST_CLASS_ASIX_NX_INVALID_RELISTEN 0x47 219 #define UX_HOST_CLASS_ASIX_NX_CONNECTION_PENDING 0x48 220 #define UX_HOST_CLASS_ASIX_NX_TX_QUEUE_DEPTH 0x49 221 #define UX_HOST_CLASS_ASIX_NX_NOT_IMPLEMENTED 0x80 222 223 224 225 /* Define ASIX command request values. */ 226 227 #define UX_HOST_CLASS_ASIX_REQ_RX_TX_SRAM_REG_READ 0x02 228 #define UX_HOST_CLASS_ASIX_REQ_RX_TX_SRAM_REG_WRITE 0x03 229 #define UX_HOST_CLASS_ASIX_REQ_OWN_SMI 0x06 230 #define UX_HOST_CLASS_ASIX_REQ_READ_PHY_REG 0x07 231 #define UX_HOST_CLASS_ASIX_REQ_WRITE_PHY_REG 0x08 232 #define UX_HOST_CLASS_ASIX_REQ_READ_STATION_STATUS 0x09 233 #define UX_HOST_CLASS_ASIX_REQ_WHO_OWNS_SMI 0x09 234 #define UX_HOST_CLASS_ASIX_REQ_RELEASE_SMI 0x0a 235 #define UX_HOST_CLASS_ASIX_REQ_READ_SROM 0x0b 236 #define UX_HOST_CLASS_ASIX_REQ_WRITE_SROM 0x0c 237 #define UX_HOST_CLASS_ASIX_REQ_WRITE_SROM_EN 0x0d 238 #define UX_HOST_CLASS_ASIX_REQ_WRITE_SROM_DIS 0x0e 239 #define UX_HOST_CLASS_ASIX_REQ_READ_RX_CTL 0x0f 240 #define UX_HOST_CLASS_ASIX_REQ_WRITE_RX_CTL 0x10 241 #define UX_HOST_CLASS_ASIX_REQ_READ_IPG012 0x11 242 #define UX_HOST_CLASS_ASIX_REQ_WRITE_IPG012 0x12 243 #define UX_HOST_CLASS_ASIX_REQ_READ_NODE_ID 0x13 244 #define UX_HOST_CLASS_ASIX_REQ_WRITE_NODE_ID 0x14 245 #define UX_HOST_CLASS_ASIX_REQ_WRITE_MULTICAST_FILTER 0x16 246 #define UX_HOST_CLASS_ASIX_REQ_TEST_REGISTER 0x17 247 #define UX_HOST_CLASS_ASIX_REQ_READ_PHY_ID 0x19 248 #define UX_HOST_CLASS_ASIX_REQ_READ_MEDIUM_STATUS 0x1a 249 #define UX_HOST_CLASS_ASIX_REQ_WRITE_MEDIUM_MODE 0x1b 250 #define UX_HOST_CLASS_ASIX_REQ_READ_MONITOR_MODE_STATUS 0x1c 251 #define UX_HOST_CLASS_ASIX_REQ_WRITE_MONITOR_MODE_STATUS 0x1d 252 #define UX_HOST_CLASS_ASIX_REQ_READ_GPIO_STATUS 0x1e 253 #define UX_HOST_CLASS_ASIX_REQ_WRITE_GPIO_STATUS 0x1f 254 #define UX_HOST_CLASS_ASIX_REQ_SW_RESET 0x20 255 #define UX_HOST_CLASS_ASIX_REQ_READ_SW_PHY_SELECT_STATUS 0x21 256 #define UX_HOST_CLASS_ASIX_REQ_WRITE_SW_PHY_SELECT_STATUS 0x22 257 258 /* Define ASIX Interrupt Packet format. */ 259 260 #define UX_HOST_CLASS_ASIX_INTERRUPT_SIGNATURE_VALUE 0xA1 261 #define UX_HOST_CLASS_ASIX_INTERRUPT_SIGNATURE_OFFSET 0x00 262 #define UX_HOST_CLASS_ASIX_INTERRUPT_STATE_OFFSET 0x02 263 #define UX_HOST_CLASS_ASIX_INTERRUPT_STATE_PPLS 0x01 264 #define UX_HOST_CLASS_ASIX_INTERRUPT_STATE_SPLS 0x02 265 #define UX_HOST_CLASS_ASIX_INTERRUPT_STATE_FLE 0x04 266 #define UX_HOST_CLASS_ASIX_INTERRUPT_STATE_MDINT 0x08 267 #define UX_HOST_CLASS_ASIX_INTERRUPT_PHY_REG_VALUE_OFFSET 0x05 268 269 /* Define ASIX Class PHY ID Packet format. */ 270 271 #define UX_HOST_CLASS_ASIX_PHY_ID_SECONDARY 0x00 272 #define UX_HOST_CLASS_ASIX_PHY_ID_PRIMARY 0x01 273 #define UX_HOST_CLASS_ASIX_PHY_ID_MASK 0x01f 274 #define UX_HOST_CLASS_ASIX_PHY_TYPE_SHIFT 0x05 275 #define UX_HOST_CLASS_ASIX_PHY_TYPE_MASK 0x07 276 277 /* Define ASIX Class GPIO Register. */ 278 279 #define UX_HOST_CLASS_ASIX_GPIO_GPO0EN 0x01 280 #define UX_HOST_CLASS_ASIX_GPIO_GPO_0 0x02 281 #define UX_HOST_CLASS_ASIX_GPIO_GPO1EN 0x04 282 #define UX_HOST_CLASS_ASIX_GPIO_GPO_1 0x08 283 #define UX_HOST_CLASS_ASIX_GPIO_GPO2EN 0x10 284 #define UX_HOST_CLASS_ASIX_GPIO_GPO_2 0x20 285 #define UX_HOST_CLASS_ASIX_GPIO_RSE 0x80 286 287 /* Define ASIX Class Software reset Register. */ 288 289 #define UX_HOST_CLASS_ASIX_SW_RESET_RR 0x01 290 #define UX_HOST_CLASS_ASIX_SW_RESET_RT 0x02 291 #define UX_HOST_CLASS_ASIX_SW_RESET_PRTE 0x04 292 #define UX_HOST_CLASS_ASIX_SW_RESET_PRL 0x08 293 #define UX_HOST_CLASS_ASIX_SW_RESET_BZ 0x10 294 #define UX_HOST_CLASS_ASIX_SW_RESET_IPRL 0x20 295 #define UX_HOST_CLASS_ASIX_SW_RESET_IPPD 0x40 296 297 /* Define ASIX Class Receive Control Register. */ 298 299 #define UX_HOST_CLASS_ASIX_RXCR_PRO 0x0001 300 #define UX_HOST_CLASS_ASIX_RXCR_AMALL 0x0002 301 #define UX_HOST_CLASS_ASIX_RXCR_SEP 0x0004 302 #define UX_HOST_CLASS_ASIX_RXCR_AB 0x0008 303 #define UX_HOST_CLASS_ASIX_RXCR_AM 0x0010 304 #define UX_HOST_CLASS_ASIX_RXCR_AP 0x0020 305 #define UX_HOST_CLASS_ASIX_RXCR_SO 0x0080 306 307 /* 88772. */ 308 #define UX_HOST_CLASS_ASIX_RXCR_MFB_2048 0x0000 309 #define UX_HOST_CLASS_ASIX_RXCR_MFB_4096 0x0100 310 #define UX_HOST_CLASS_ASIX_RXCR_MFB_8192 0x0200 311 #define UX_HOST_CLASS_ASIX_RXCR_MFB_16384 0x0300 /* Default. */ 312 313 /* 88772B. */ 314 #define UX_HOST_CLASS_ASIX_RXCR_RH1M 0x0100 /* Default 1. */ 315 #define UX_HOST_CLASS_ASIX_RXCR_RH2M 0x0200 /* Default 0. */ 316 #define UX_HOST_CLASS_ASIX_RXCR_RH3M 0x0400 /* Default 0. */ 317 318 319 /* Define ASIX Class packet equivalences. */ 320 321 #define UX_HOST_CLASS_ASIX_PACKET_SIZE 128 322 #define UX_HOST_CLASS_ASIX_NODE_ID_LENGTH 6 323 324 #define UX_HOST_CLASS_ASIX_RX_PACKET_LENGTH_MASK 0xFFF 325 326 /* Define ASIX PHY registers description. */ 327 328 #define UX_HOST_CLASS_ASIX_PHY_REG_BMCR 0x00 329 #define UX_HOST_CLASS_ASIX_PHY_REG_BMSR 0x01 330 #define UX_HOST_CLASS_ASIX_PHY_REG_PHYIDR1 0x02 331 #define UX_HOST_CLASS_ASIX_PHY_REG_PHYIDR2 0x03 332 #define UX_HOST_CLASS_ASIX_PHY_REG_ANAR 0x04 333 #define UX_HOST_CLASS_ASIX_PHY_REG_ANLPAR 0x05 334 #define UX_HOST_CLASS_ASIX_PHY_REG_ANER 0x06 335 336 /* Define ASIX PHY BMCR registers description. */ 337 338 #define UX_HOST_CLASS_ASIX_PHY_REG_BMCR_RESET 0x8000 339 #define UX_HOST_CLASS_ASIX_PHY_REG_BMCR_LOOPBACK_ENABLED 0x4000 340 #define UX_HOST_CLASS_ASIX_PHY_REG_BMCR_SPEED_100MBS 0x2000 341 #define UX_HOST_CLASS_ASIX_PHY_REG_BMCR_SPEED_10MBS 0x0000 342 #define UX_HOST_CLASS_ASIX_PHY_REG_BMCR_AUTO_NEGOTIATION 0x1000 343 #define UX_HOST_CLASS_ASIX_PHY_REG_BMCR_POWER_DOWN 0x0800 344 #define UX_HOST_CLASS_ASIX_PHY_REG_BMCR_ISOLATE 0x0400 345 #define UX_HOST_CLASS_ASIX_PHY_REG_BMCR_RESTART_NEG 0x0200 346 #define UX_HOST_CLASS_ASIX_PHY_REG_BMCR_DUPLEX_MODE 0x0100 347 #define UX_HOST_CLASS_ASIX_PHY_REG_BMCR_COLLISION_TEST 0x0080 348 349 350 /* Define ASIX PHY PHYIDR1 register description. */ 351 352 #define UX_HOST_CLASS_ASIX_PHY_REG_PHYIDR1_MDL_REV_SHIFT 0x00 353 #define UX_HOST_CLASS_ASIX_PHY_REG_PHYIDR1_MDL_REV_MASK 0x0f 354 #define UX_HOST_CLASS_ASIX_PHY_REG_PHYIDR1_VNDR_REV_SHIFT 0x04 355 #define UX_HOST_CLASS_ASIX_PHY_REG_PHYIDR1_VNDR_REV_MASK 0x2f 356 357 358 /* Define ASIX PHY ANAR register description. */ 359 360 #define UX_HOST_CLASS_ASIX_PHY_REG_ANAR_DEFAULT_SELECTOR 0x0001 361 #define UX_HOST_CLASS_ASIX_PHY_REG_ANAR_10_HD 0x0020 362 #define UX_HOST_CLASS_ASIX_PHY_REG_ANAR_10_FD 0x0040 363 #define UX_HOST_CLASS_ASIX_PHY_REG_ANAR_TX_HD 0x0080 364 #define UX_HOST_CLASS_ASIX_PHY_REG_ANAR_TX_FD 0x0100 365 #define UX_HOST_CLASS_ASIX_PHY_REG_ANAR_T4 0x0200 366 #define UX_HOST_CLASS_ASIX_PHY_REG_ANAR_PAUSE 0x0400 367 #define UX_HOST_CLASS_ASIX_PHY_REG_ANAR_RF 0x1000 368 #define UX_HOST_CLASS_ASIX_PHY_REG_ANAR_ACK 0x2000 369 370 /* Define ASIX MEDIUM register description. */ 371 372 #define UX_HOST_CLASS_ASIX_MEDIUM_FD 0x0002 373 #define UX_HOST_CLASS_ASIX_MEDIUM_BIT2 0x0004 374 #define UX_HOST_CLASS_ASIX_MEDIUM_BIT3 0x0000 375 #define UX_HOST_CLASS_ASIX_MEDIUM_RFC_ENABLED 0x0010 376 #define UX_HOST_CLASS_ASIX_MEDIUM_TFC_ENABLED 0x0020 377 378 #define UX_HOST_CLASS_ASIX_MEDIUM_RE_ENABLED 0x0100 379 #define UX_HOST_CLASS_ASIX_MEDIUM_PS 0x0200 380 #define UX_HOST_CLASS_ASIX_MEDIUM_SBP 0x0800 381 #define UX_HOST_CLASS_ASIX_MEDIUM_SM 0x1000 382 383 /* Define ASIX IPG default values register description. */ 384 385 #define UX_HOST_CLASS_ASIX_PPG0_IPG1 0x0C15 386 #define UX_HOST_CLASS_ASIX_PPG2 0x000E 387 388 /* Define ASIX Reception States. */ 389 390 #define UX_HOST_CLASS_ASIX_RECEPTION_STATE_STOPPED 0 391 #define UX_HOST_CLASS_ASIX_RECEPTION_STATE_STARTED 1 392 #define UX_HOST_CLASS_ASIX_RECEPTION_STATE_IN_TRANSFER 2 393 394 395 /* Define ASIX Class instance structure. */ 396 397 typedef struct UX_HOST_CLASS_ASIX_STRUCT 398 { 399 struct UX_HOST_CLASS_ASIX_STRUCT 400 *ux_host_class_asix_next_instance; 401 UX_HOST_CLASS *ux_host_class_asix_class; 402 UX_DEVICE *ux_host_class_asix_device; 403 UX_ENDPOINT *ux_host_class_asix_bulk_in_endpoint; 404 UX_ENDPOINT *ux_host_class_asix_bulk_out_endpoint; 405 UX_ENDPOINT *ux_host_class_asix_interrupt_endpoint; 406 UX_INTERFACE *ux_host_class_asix_interface; 407 UINT ux_host_class_asix_instance_status; 408 UINT ux_host_class_asix_state; 409 410 UX_SEMAPHORE ux_host_class_asix_semaphore; 411 UX_SEMAPHORE ux_host_class_asix_interrupt_notification_semaphore; 412 UX_THREAD ux_host_class_asix_thread; 413 414 UCHAR *ux_host_class_asix_thread_stack; 415 ULONG ux_host_class_asix_notification_count; 416 ULONG ux_host_class_asix_primary_phy_id; 417 ULONG ux_host_class_asix_primary_phy_type; 418 ULONG ux_host_class_asix_secondary_phy_id; 419 ULONG ux_host_class_asix_secondary_phy_type; 420 ULONG ux_host_class_asix_model_revision_number; 421 ULONG ux_host_class_asix_vendor_model_number; 422 ULONG ux_host_class_asix_speed_selected; 423 ULONG ux_host_class_asix_device_state; 424 ULONG ux_host_class_asix_link_state; 425 426 NX_PACKET *ux_host_class_asix_xmit_queue; 427 #ifdef UX_HOST_CLASS_ASIX_PACKET_CHAIN_SUPPORT 428 UCHAR *ux_host_class_asix_xmit_buffer; 429 #endif 430 NX_PACKET *ux_host_class_asix_receive_queue; 431 UCHAR *ux_host_class_asix_receive_buffer; 432 NX_PACKET_POOL *ux_host_class_asix_packet_pool; 433 ULONG ux_host_class_asix_packet_available_min; 434 435 UCHAR ux_host_class_asix_node_id[UX_HOST_CLASS_ASIX_NODE_ID_LENGTH]; 436 VOID (*ux_host_class_asix_device_status_change_callback)(struct UX_HOST_CLASS_ASIX_STRUCT *asix, 437 ULONG device_state); 438 VOID *ux_host_class_asix_network_handle; 439 440 } UX_HOST_CLASS_ASIX; 441 442 443 /* Define ASIX reception structure. */ 444 445 typedef struct UX_HOST_CLASS_ASIX_RECEPTION_STRUCT 446 { 447 448 ULONG ux_host_class_asix_reception_state; 449 ULONG ux_host_class_asix_reception_block_size; 450 UCHAR *ux_host_class_asix_reception_data_buffer; 451 ULONG ux_host_class_asix_reception_data_buffer_size; 452 UCHAR *ux_host_class_asix_reception_data_head; 453 UCHAR *ux_host_class_asix_reception_data_tail; 454 VOID (*ux_host_class_asix_reception_callback)(struct UX_HOST_CLASS_ASIX_STRUCT *asix, 455 UINT status, 456 UCHAR *reception_buffer, 457 ULONG reception_size); 458 459 } UX_HOST_CLASS_ASIX_RECEPTION; 460 461 /* Define Asix Class function prototypes. */ 462 463 UINT _ux_host_class_asix_activate(UX_HOST_CLASS_COMMAND *command); 464 UINT _ux_host_class_asix_configure(UX_HOST_CLASS_ASIX *asix); 465 UINT _ux_host_class_asix_deactivate(UX_HOST_CLASS_COMMAND *command); 466 UINT _ux_host_class_asix_endpoints_get(UX_HOST_CLASS_ASIX *asix); 467 UINT _ux_host_class_asix_entry(UX_HOST_CLASS_COMMAND *command); 468 UINT _ux_host_class_asix_read (UX_HOST_CLASS_ASIX *asix, UCHAR *data_pointer, 469 ULONG requested_length, ULONG *actual_length); 470 UINT _ux_host_class_asix_write(VOID *asix_class, NX_PACKET *packet); 471 VOID _ux_host_class_asix_interrupt_notification(UX_TRANSFER *transfer_request); 472 VOID _ux_host_class_asix_reception_callback (UX_TRANSFER *transfer_request); 473 VOID _ux_host_class_asix_thread(ULONG parameter); 474 VOID _ux_host_class_asix_transmission_callback (UX_TRANSFER *transfer_request); 475 UINT _ux_host_class_asix_setup(UX_HOST_CLASS_ASIX *asix); 476 477 /* Define Asix Class API prototypes. */ 478 479 #define ux_host_class_asix_entry _ux_host_class_asix_entry 480 #define ux_host_class_asix_read _ux_host_class_asix_read 481 #define ux_host_class_asix_write _ux_host_class_asix_write 482 483 /* Determine if a C++ compiler is being used. If so, complete the standard 484 C conditional started above. */ 485 #ifdef __cplusplus 486 } 487 #endif 488 489 #endif 490
