| /Renode-Infrastructure-v1.15.3-29f510e/src/Emulator/Cores/Arm/ |
| D | ARMv7A.cs | 60 … protected override void Write32CP15Inner(Coprocessor32BitMoveInstruction instruction, uint value) in Write32CP15Inner() argument
62 if(instruction.CRn == GenericTimerCoprocessorRegister) in Write32CP15Inner()
66 genericTimer.WriteDoubleWordRegisterAArch32(instruction.FieldsOnly, value); in Write32CP15Inner()
69 …neric timer, by the CP15 32-bit write instruction ({0}), but a timer was not found.", instruction); in Write32CP15Inner()
72 base.Write32CP15Inner(instruction, value); in Write32CP15Inner()
75 protected override uint Read32CP15Inner(Coprocessor32BitMoveInstruction instruction) in Read32CP15Inner() argument
77 if(instruction.CRn == GenericTimerCoprocessorRegister) in Read32CP15Inner()
81 return genericTimer.ReadDoubleWordRegisterAArch32(instruction.FieldsOnly); in Read32CP15Inner()
83 … the CP15 32-bit read instruction ({0}), but a timer was not found - returning 0x0.", instruction); in Read32CP15Inner()
86 return base.Read32CP15Inner(instruction); in Read32CP15Inner()
[all …]
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| D | Arm.cs | 176 protected uint Read32CP15(uint instruction) in Read32CP15() argument
178 return Read32CP15Inner(new Coprocessor32BitMoveInstruction(instruction)); in Read32CP15()
182 protected void Write32CP15(uint instruction, uint value) in Write32CP15() argument
184 Write32CP15Inner(new Coprocessor32BitMoveInstruction(instruction), value); in Write32CP15()
188 protected ulong Read64CP15(uint instruction) in Read64CP15() argument
190 return Read64CP15Inner(new Coprocessor64BitMoveInstruction(instruction)); in Read64CP15()
194 protected void Write64CP15(uint instruction, ulong value) in Write64CP15() argument
196 Write64CP15Inner(new Coprocessor64BitMoveInstruction(instruction), value); in Write64CP15()
212 protected virtual uint Read32CP15Inner(Coprocessor32BitMoveInstruction instruction) in Read32CP15Inner() argument
214 …if(instruction.Opc1 == 4 && instruction.Opc2 == 0 && instruction.CRm == 0 && instruction.CRn == 15… in Read32CP15Inner()
[all …]
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| D | ARMv7R.cs | 44 … protected override void Write32CP15Inner(Coprocessor32BitMoveInstruction instruction, uint value) in Write32CP15Inner() argument
46 if(instruction == AuxiliaryControlRegisterInstruction) in Write32CP15Inner()
51 base.Write32CP15Inner(instruction, value); in Write32CP15Inner()
54 protected override uint Read32CP15Inner(Coprocessor32BitMoveInstruction instruction) in Read32CP15Inner() argument
56 if(instruction == AuxiliaryControlRegisterInstruction) in Read32CP15Inner()
60 return base.Read32CP15Inner(instruction); in Read32CP15Inner()
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| /Renode-Infrastructure-v1.15.3-29f510e/src/Emulator/Main/Utilities/ |
| D | SimpleInstructionDecoder.cs | 26 if(this.instruction != null) in AddOpcode()
31 this.instruction = newInstruction; in AddOpcode()
39 if(instruction != null) in AddOpcode()
61 if(instruction != null) in TryParseOpcode()
66 result = instruction(); in TryParseOpcode()
85 private Func<TInstruction> instruction; field in Antmicro.Renode.Utilities.SimpleInstructionDecoder
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| /Renode-Infrastructure-v1.15.3-29f510e/src/Emulator/Peripherals/Peripherals/CPU/ExecutionTracer/FBInstruction/ |
| D | README.txt | 1 Trace Based Model expects unified instruction format for all supported architectures.
2 The format is defined in `instruction.fbs` file written in FlatBuffers schema language.
3 FlatBuffers compiler (`flatc`) is used to generate C# code for reading and writing the instruction …
6 …structions.cs` in this directory are auto-generated from FlatBuffers schema file `instruction.fbs`:
9 flatc --csharp instruction.fbs
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| /Renode-Infrastructure-v1.15.3-29f510e/src/Emulator/Peripherals/Peripherals/DMA/PL330_DMA/ |
| D | PL330_DMA.cs | 127 if(!decoderRoot.TryParseOpcode((byte)bytes, out var instruction)) in TryDecodeInstructionAtAddress()
133 instruction.ParseAll(bytes); in TryDecodeInstructionAtAddress()
135 return instruction.ToString(); in TryDecodeInstructionAtAddress()
437 if(!decoderRoot.TryParseOpcode(insn, out var instruction)) in ExecuteLoop()
444 while(!instruction.IsFinished) in ExecuteLoop()
446 … instruction.Parse(sysbus.ReadByte(address, context: GetCurrentCPUOrNull())); in ExecuteLoop()
450 … LogInstructionExecuted(instruction, DMAThreadType.Channel, channelThread.Id, channelThread.PC); in ExecuteLoop()
451 instruction.Execute(DMAThreadType.Channel, channelThread.Id); in ExecuteLoop()
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| /Renode-Infrastructure-v1.15.3-29f510e/src/Emulator/Cores/RiscV/opcodes/ |
| D | opcodes-zicbo | 6 # Zicboz: cache-block zero instruction
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| D | opcodes-rvk | 4 # Scalar Cryptographic instruction set extension.
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| D | opcodes-rv32k | 4 # Scalar Cryptographic instruction set extension.
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| D | opcodes-rv64k | 4 # Scalar Cryptographic instruction set extension.
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| D | opcodes-rv32i | 2 # <instruction name> <args> <opcode>
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| D | opcodes-rvv | 2 # <instruction name> <args> <opcode>
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| /Renode-Infrastructure-v1.15.3-29f510e/src/Emulator/Peripherals/Peripherals/SPI/ |
| D | STM32H7_QuadSPI.cs | 197 .WithValueField(0, 8, out instruction, name: "Instruction") in DefineRegisters()
385 this.Log(LogLevel.Debug, "Sending command: 0x{0:X}", instruction.Value); in TriggerTransfer()
386 RegisteredPeripheral.Transmit((byte)instruction.Value); in TriggerTransfer()
621 private IValueRegisterField instruction; field in Antmicro.Renode.Peripherals.SPI.STM32H7_QuadSPI
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