Searched refs:cpu1 (Results 1 – 3 of 3) sorted by relevance
54 var cpu1 = (value & 2) != 0; in WriteWord()57 …his.DebugLog("Interrupt no {0} set to be routed to CPU0: {1}, CPU1: {2}", interruptNo, cpu0, cpu1); in WriteWord()59 routingTable[NumberOfInterrupts + interruptNo] = cpu1; in WriteWord()
23 public RenesasRZG_CPG_SYSC(ICPU cpu0, ICPU cpu1 = null) in RenesasRZG_CPG_SYSC() argument26 this.cpu1 = cpu1; in RenesasRZG_CPG_SYSC()778 cpu1.IsHalted = true; in DefineCPGRegisters()782 cpu1.PC = CortexA55Core1ResetVector; in DefineCPGRegisters()783 cpu1.IsHalted = false; in DefineCPGRegisters()970 private bool HasTwoCortexA55Cores => cpu1 != null;980 private readonly ICPU cpu1; field in Antmicro.Renode.Peripherals.Miscellaneous.RenesasRZG_CPG_SYSC
18 …public Zynq7000_SystemLevelControlRegisters(IMachine machine, BaseCPU cpu0, BaseCPU cpu1 = null) :… in Zynq7000_SystemLevelControlRegisters() argument23 new CPUControl(cpu1) in Zynq7000_SystemLevelControlRegisters()
