| /Renode-Infrastructure-v1.15.3-29f510e/src/Emulator/Peripherals/Peripherals/Timers/ |
| D | RenesasRZG_GPT.cs | 298 valueProviderCallback: _ => channel.Overflow, in BuildChannelRegisterMap()
299 writeCallback: (_, __) => channel.Overflow = false in BuildChannelRegisterMap()
428 Overflow = false; in Reset()
496 Overflow = true;
502 Overflow = false;
510 public bool Overflow { get; set; } property in Antmicro.Renode.Peripherals.Timers.RenesasRZG_GPT.GPTChannel
519 Overflow = true; in OnMainTimerLimitReached()
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| D | RenesasRA_GPT.cs | 355 valueProviderCallback: _ => channel.Overflow, in BuildChannelRegisterMap()
356 writeCallback: (_, __) => channel.Overflow = false in BuildChannelRegisterMap()
475 Overflow = false; in Reset()
545 Overflow = true;
551 Overflow = false;
559 public bool Overflow { get; set; } property in Antmicro.Renode.Peripherals.Timers.RenesasRA_GPT.GPTChannel
568 Overflow = true; in OnMainTimerLimitReached()
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| D | EFR32_Timer.cs | 124 interruptManager.SetInterrupt(Interrupt.Overflow); in LimitReached()
160 Overflow, enumerator
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| D | EFR32xG2_RTCC.cs | 27 interruptManager.SetInterrupt(Interrupt.Overflow); in EFR32xG2_RTCC()
229 Overflow, enumerator
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| D | EFR32xG24_SYSRTC.cs | 22 limitTimer.LimitReached += () => interruptManager.SetInterrupt(Interrupt.Overflow); in EFR32xG24_SYSRTC()
220 Overflow, enumerator
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| D | EFR32xG2_BURTC.cs | 134 Overflow, enumerator
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| D | Cadence_TTC.cs | 237 Mode = CounterMode.Overflow; in Reset()
539 Overflow = 0x0, enumerator
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| D | NRF52840_RTC.cs | 285 Overflow = 0x104, enumerator
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| D | SAM_TC.cs | 136 …ithFlag(0, FieldMode.ReadToClear, valueProviderCallback: _ => channels[id].Overflow, name: "COVFS") in DefineRegisters()
444 public bool Overflow => Misc.ReturnThenClear(ref overflow); field in Antmicro.Renode.Peripherals.Timers.SAM_TC.Channel
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| /Renode-Infrastructure-v1.15.3-29f510e/src/Emulator/Peripherals/Peripherals/Miscellaneous/ |
| D | EOSS3_PacketFIFO.cs | 71 ….WithFlag(i + 0x2, out packetFifos[i / 8].Overflow, FieldMode.WriteOneToClear | FieldMode.Read, wr… in DefineRegisters()
150 if(queue.PushOverMask.Value && queue.Overflow.Value in UpdateIRQ()
198 public IFlagRegisterField Overflow; field in Antmicro.Renode.Peripherals.Miscellaneous.EOSS3_PacketFIFO.PacketFifoBase
229 Overflow.Value = true; in EnqueueCallback()
234 Overflow.Value = false; in EnqueueCallback()
335 Overflow.Value = true; in EnqueueCallback()
340 Overflow.Value = false; in EnqueueCallback()
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| /Renode-Infrastructure-v1.15.3-29f510e/src/Emulator/Peripherals/Peripherals/CPU/MSP430X/ |
| D | MSP430X.cs | 596 …p = !(statusRegister.HasFlag(StatusFlags.Negative) ^ statusRegister.HasFlag(StatusFlags.Overflow)); in EvaluateOpcodeJump()
602 …Jump = statusRegister.HasFlag(StatusFlags.Negative) ^ statusRegister.HasFlag(StatusFlags.Overflow); in EvaluateOpcodeJump()
1188 … SetStatusFlag(StatusFlags.Overflow, (operand1 & GetAccessWidthMask(accessWidth)) > 0); in TryEvaluateDoubleOperand()
1224 SetStatusFlag(StatusFlags.Overflow, false); in TryEvaluateDoubleOperand()
1357 …SetStatusFlag(StatusFlags.Overflow, ((operand1 ^ operand2) & mask) == 0 && ((operand1 ^ result) & … in CheckForOverflow()
1571 Overflow = (1 << 8) enumerator
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| /Renode-Infrastructure-v1.15.3-29f510e/src/Emulator/Peripherals/Peripherals/SPI/ |
| D | OpenTitan_SpiDevice.cs | 180 case SRAMCircularFifoRange.FifoStatus.Overflow: in HandleFifoStatusesAndUpdateInterrupts()
861 status = FifoStatus.Overflow; in UpdateStatus()
887 Overflow, enumerator
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