1 // 2 // Copyright (c) 2010-2025 Antmicro 3 // Copyright (c) 2022-2025 Silicon Labs 4 // 5 // This file is licensed under the MIT License. 6 // Full license text is available in 'licenses/MIT.txt'. 7 // 8 9 using System; 10 using System.Collections.Generic; 11 using System.Linq; 12 using Antmicro.Renode.Core; 13 using Antmicro.Renode.Core.Structure.Registers; 14 using Antmicro.Renode.Logging; 15 using Antmicro.Renode.Peripherals.Bus; 16 using Antmicro.Renode.Peripherals.Memory; 17 using Antmicro.Renode.Peripherals.Timers; 18 using Antmicro.Renode.Time; 19 using Antmicro.Renode.Utilities; 20 using Antmicro.Renode.Utilities.Packets; 21 using Antmicro.Renode.Peripherals.CPU; 22 using Antmicro.Renode.Peripherals.UART; 23 24 namespace Antmicro.Renode.Peripherals.Wireless 25 { 26 public class EFR32xG24_Radio : IBusPeripheral, IRadio, IInterferenceQueueListener 27 { EFR32xG24_Radio(Machine machine, MappedMemory ram, CortexM sequencer, bool pa0DbmSupport = false, bool pa10DbmSupport = false, bool pa20DbmSupport = false)28 public EFR32xG24_Radio(Machine machine, MappedMemory ram, CortexM sequencer, bool pa0DbmSupport = false, bool pa10DbmSupport = false, bool pa20DbmSupport = false) 29 { 30 this.machine = machine; 31 this.ram = ram; 32 this.sequencer = sequencer; 33 this.RAC_0DbmSupport = pa0DbmSupport; 34 this.RAC_10DbmSupport = pa10DbmSupport; 35 this.RAC_20DbmSupport = pa20DbmSupport; 36 37 var initialTimerLimit = 0xFFFFUL; 38 39 seqTimer = new LimitTimer(machine.ClockSource, HfxoFrequency, this, "seqtimer", initialTimerLimit, direction: Direction.Ascending, 40 enabled: false, workMode: WorkMode.OneShot, eventEnabled: true, autoUpdate: true); 41 seqTimer.LimitReached += RAC_SeqTimerHandleLimitReached; 42 43 proTimer = new LimitTimer(machine.ClockSource, HfxoFrequency, this, "protimer", initialTimerLimit, direction: Direction.Ascending, 44 enabled: false, workMode: WorkMode.OneShot, eventEnabled: true, autoUpdate: true); 45 proTimer.LimitReached += PROTIMER_HandleTimerLimitReached; 46 47 paRampingTimer = new LimitTimer(machine.ClockSource, MicrosecondFrequency, this, "parampingtimer", initialTimerLimit, direction: Direction.Ascending, 48 enabled: false, workMode: WorkMode.OneShot, eventEnabled: true, autoUpdate: true); 49 paRampingTimer.LimitReached += RAC_PaRampingTimerHandleLimitReached; 50 51 rssiUpdateTimer = new LimitTimer(machine.ClockSource, MicrosecondFrequency, this, "rssiupdatetimer", initialTimerLimit, direction: Direction.Ascending, 52 enabled: false, workMode: WorkMode.OneShot, eventEnabled: true, autoUpdate: true); 53 rssiUpdateTimer.LimitReached += AGC_RssiUpdateTimerHandleLimitReached; 54 55 txTimer = new LimitTimer(machine.ClockSource, HfxoFrequency, this, "txtimer", initialTimerLimit, direction: Direction.Ascending, 56 enabled: false, workMode: WorkMode.OneShot, eventEnabled: true, autoUpdate: true); 57 txTimer.LimitReached += RAC_TxTimerLimitReached; 58 59 rxTimer = new LimitTimer(machine.ClockSource, HfxoFrequency, this, "rxtimer", initialTimerLimit, direction: Direction.Ascending, 60 enabled: false, workMode: WorkMode.OneShot, eventEnabled: true, autoUpdate: true); 61 rxTimer.LimitReached += RAC_RxTimerLimitReached; 62 63 FrameControllerPrioritizedIRQ = new GPIO(); 64 FrameControllerIRQ = new GPIO(); 65 ModulatorAndDemodulatorIRQ = new GPIO(); 66 RadioControllerSequencerIRQ = new GPIO(); 67 RadioControllerRadioStateMachineIRQ = new GPIO(); 68 BufferControllerIRQ = new GPIO(); 69 ProtocolTimerIRQ = new GPIO(); 70 SynthesizerIRQ = new GPIO(); 71 AutomaticGainControlIRQ = new GPIO(); 72 HostMailboxIRQ = new GPIO(); 73 SeqOffIRQ = new GPIO(); 74 SeqRxWarmIRQ = new GPIO(); 75 SeqRxSearchIRQ = new GPIO(); 76 SeqRxFrameIRQ = new GPIO(); 77 SeqRxPoweringDownIRQ = new GPIO(); 78 SeqRx2RxIRQ = new GPIO(); 79 SeqRxOverflowIRQ = new GPIO(); 80 SeqRx2TxIRQ = new GPIO(); 81 SeqTxWarmIRQ = new GPIO(); 82 SeqTxIRQ = new GPIO(); 83 SeqTxPoweringDownIRQ = new GPIO(); 84 SeqTx2RxIRQ = new GPIO(); 85 SeqTx2TxIRQ = new GPIO(); 86 SeqShutdownIRQ = new GPIO(); 87 SeqRadioControllerIRQ = new GPIO(); 88 SeqFrameControllerIRQ = new GPIO(); 89 SeqFrameControllerPriorityIRQ = new GPIO(); 90 SeqModulatorAndDemodulatorIRQ = new GPIO(); 91 SeqBufferControllerIRQ = new GPIO(); 92 SeqAutomaticGainControlIRQ = new GPIO(); 93 SeqProtocolTimerIRQ = new GPIO(); 94 SeqSynthesizerIRQ = new GPIO(); 95 SeqRfMailboxIRQ = new GPIO(); 96 97 // Protocol Timer stuff 98 PROTIMER_timeoutCounter = new PROTIMER_TimeoutCounter[PROTIMER_NumberOfTimeoutCounters]; 99 for(var idx = 0; idx < PROTIMER_NumberOfTimeoutCounters; ++idx) 100 { 101 var i = idx; 102 PROTIMER_timeoutCounter[i] = new PROTIMER_TimeoutCounter(this, (uint)i); 103 } 104 PROTIMER_timeoutCounter[0].Synchronized += () => PROTIMER_TimeoutCounter0HandleSynchronize(); 105 PROTIMER_timeoutCounter[0].Underflowed += () => PROTIMER_TimeoutCounter0HandleUnderflow(); 106 PROTIMER_timeoutCounter[0].Finished += () => PROTIMER_TimeoutCounter0HandleFinish(); 107 108 PROTIMER_captureCompareChannel = new PROTIMER_CaptureCompareChannel[PROTIMER_NumberOfCaptureCompareChannels]; 109 for(var idx = 0; idx < PROTIMER_NumberOfCaptureCompareChannels; ++idx) 110 { 111 var i = idx; 112 PROTIMER_captureCompareChannel[i] = new PROTIMER_CaptureCompareChannel(this, (uint)i); 113 } 114 115 // BUFC stuff 116 BUFC_buffer = new BUFC_Buffer[BUFC_NumberOfBuffers]; 117 for(var idx = 0u; idx < BUFC_NumberOfBuffers; ++idx) 118 { 119 BUFC_buffer[idx] = new BUFC_Buffer(this, this.machine, idx); 120 } 121 122 // FRC stuff 123 FRC_frameDescriptor = new FRC_FrameDescriptor[FRC_NumberOfFrameDescriptors]; 124 for(var idx = 0u; idx < FRC_NumberOfFrameDescriptors; ++idx) 125 { 126 FRC_frameDescriptor[idx] = new FRC_FrameDescriptor(); 127 } 128 FRC_packetBufferCapture = new byte[FRC_PacketBufferCaptureSize]; 129 130 // AGC stuff 131 AGC_FrameRssiIntegerPart = -100; 132 133 frameControllerRegistersCollection = BuildFrameControllerRegistersCollection(); 134 bufferControllerRegistersCollection = BuildBufferControllerRegistersCollection(); 135 cyclicRedundancyCheckRegistersCollection = BuildCyclicRedundancyCheckRegistersCollection(); 136 synthesizerRegistersCollection = BuildSynthesizerRegistersCollection(); 137 radioControllerRegistersCollection = BuildRadioControllerRegistersCollection(); 138 protocolTimerRegistersCollection = BuildProtocolTimerRegistersCollection(); 139 modulatorAndDemodulatorRegistersCollection = BuildModulatorAndDemodulatorRegistersCollection(); 140 automaticGainControlRegistersCollection = BuildAutomaticGainControlRegistersCollection(); 141 hostMailboxRegistersCollection = BuildHostMailboxRegistersCollection(); 142 radioMailboxRegistersCollection = BuildRadioMailboxRegistersCollection(); 143 144 InterferenceQueue.Subscribe(this); 145 } 146 Reset()147 public void Reset() 148 { 149 PROTIMER_txRequestState = PROTIMER_TxRxRequestState.Idle; 150 PROTIMER_rxRequestState = PROTIMER_TxRxRequestState.Idle; 151 PROTIMER_listenBeforeTalkState = PROTIMER_ListenBeforeTalkState.Idle; 152 PROTIMER_listenBeforeTalkPending = false; 153 RAC_seqTimerLimit = 0xFFFF; 154 AGC_rssiFirstRead = true; 155 AGC_rssiStartCommandOngoing = false; 156 AGC_rssiStartCommandFromProtimer = false; 157 158 RAC_UpdateRadioStateMachine(RAC_RadioStateMachineSignal.Reset); 159 160 seqTimer.Reset(); 161 paRampingTimer.Reset(); 162 rssiUpdateTimer.Reset(); 163 proTimer.Reset(); 164 165 frameControllerRegistersCollection.Reset(); 166 bufferControllerRegistersCollection.Reset(); 167 cyclicRedundancyCheckRegistersCollection.Reset(); 168 synthesizerRegistersCollection.Reset(); 169 radioControllerRegistersCollection.Reset(); 170 protocolTimerRegistersCollection.Reset(); 171 modulatorAndDemodulatorRegistersCollection.Reset(); 172 automaticGainControlRegistersCollection.Reset(); 173 hostMailboxRegistersCollection.Reset(); 174 radioMailboxRegistersCollection.Reset(); 175 176 UpdateInterrupts(); 177 } 178 InteferenceQueueChangedCallback()179 public void InteferenceQueueChangedCallback() 180 { 181 if (RAC_currentRadioState == RAC_RadioState.RxSearch || RAC_currentRadioState == RAC_RadioState.RxFrame) 182 { 183 AGC_UpdateRssi(); 184 } 185 } 186 ReceiveFrame(byte[] frame, IRadio sender)187 public void ReceiveFrame(byte[] frame, IRadio sender) 188 { 189 TimeInterval txStartTime = InterferenceQueue.GetTxStartTime(sender); 190 var txRxSimulatorDelayUs = (GetTime() - txStartTime).TotalMicroseconds; 191 192 this.Log(LogBasicRadioActivityAsError ? LogLevel.Error : LogLevel.Info, "ReceiveFrame() at {0} on channel {1} ({2}), TX started at {3} (diff: {4})", 193 GetTime(), Channel, MODEM_GetCurrentPhy(), txStartTime, txRxSimulatorDelayUs); 194 195 if (RAC_internalRxState != RAC_InternalRxState.Idle) 196 { 197 // The node is already in the process of receiving a packet, and a new packet is being received. 198 // TODO: for now we always consider this a collision. In the future we will want to take into account 199 // the RSSI of both packets and determine if we could hear one of them. 200 // We drop this packet, while the ongoing RX is marked as "interfered", which can result in either a 201 // preamble not heard at all or a frame that fails CRC. 202 RAC_ongoingRxCollided = true; 203 this.Log(LogBasicRadioActivityAsError ? LogLevel.Error : LogLevel.Info, "Dropping: (RX already ongoing)"); 204 return; 205 } 206 207 // Ideally we would schedule a first RX step that accounts for the txChainDelay and some portion of the preamble 208 // to still allow reception of frames for which we only heard some portion of the preamble. 209 // For simplicity, we just skip this step and check the radio state after both preamble and sync word have been received. 210 211 // We first schedule the RX timer to the point that the preamble and sych word are fully transmitted. 212 // That must also include the txChainDelay since at the transmitter we don't delay the FrameTxStart event. 213 double delayUs = MODEM_GetTxChainDelayUs() + MODEM_GetPreambleOverTheAirTimeUs() + MODEM_GetSyncWordOverTheAirTimeUs(); 214 RAC_internalRxState = RAC_InternalRxState.PreambleAndSyncWord; 215 MODEM_demodulatorState.Value = MODEM_DemodulatorState.FrameSearch; 216 217 currentFrame = frame; 218 219 // We set the RSSIFRAME here to make sure the sender hasn't removed the packet from the interference queue 220 // by the time the receiver has completed its RX delay. 221 AGC_FrameRssiIntegerPart = (sbyte)InterferenceQueue.GetCurrentRssi(this, MODEM_GetCurrentPhy(), Channel); 222 223 if (delayUs > txRxSimulatorDelayUs && PROTIMER_UsToPreCntOverflowTicks(delayUs - txRxSimulatorDelayUs) > 0) 224 { 225 RAC_rxTimeAlreadyPassedUs = 0; 226 rxTimer.Frequency = PROTIMER_GetPreCntOverflowFrequency(); 227 rxTimer.Limit = PROTIMER_UsToPreCntOverflowTicks(delayUs - txRxSimulatorDelayUs); 228 rxTimer.Enabled = true; 229 this.Log(LogLevel.Noisy, "Schedule rxTimer for PRE/SYNC: {0}us PRE={1} SYNC={2} TXCHAIN={3}", 230 delayUs - txRxSimulatorDelayUs, MODEM_GetPreambleOverTheAirTimeUs(), MODEM_GetSyncWordOverTheAirTimeUs(), MODEM_GetTxChainDelayUs()); 231 } 232 else 233 { 234 // The RX/TX simulator delay already accounted for the intended delay. 235 // We store the time we already spent RXing the actual frame and call the RX timer 236 // handler directly. 237 RAC_rxTimeAlreadyPassedUs = txRxSimulatorDelayUs - delayUs; 238 RAC_RxTimerLimitReached(); 239 } 240 } 241 TransmitFrame(byte[] frame)242 private bool TransmitFrame(byte[] frame) 243 { 244 // TransmitFrame() is invoked as soon as the radio state machine transitions to the TX state. 245 246 if (RAC_internalTxState != RAC_InternalTxState.Idle) 247 { 248 this.Log(LogLevel.Error, "TransmitFrame(): state not IDLE"); 249 return false; 250 } 251 252 RAC_TxEnable = false; 253 254 if (frame.Length == 0) 255 { 256 return false; 257 } 258 259 // We schedule the TX timer to include the whole frame (including the preamble and SYNC word) plus the 260 // TxChainDelay and TxChainDoneDelay, so that when the timer expires, we can simply complete the TX process. 261 // Note, we subtract the TxDoneDelay since that signal occurs BEFORE the last bit of the frame actually went over the air. 262 var timerDelayUs = MODEM_GetFrameOverTheAirTimeUs(frame, true, true) + MODEM_GetTxChainDelayUs() - MODEM_GetTxChainDoneDelayUs(); 263 264 this.Log(LogBasicRadioActivityAsError ? LogLevel.Error : LogLevel.Info, "Sending frame at {0} on channel {1} ({2}): {3}", 265 GetTime(), Channel, MODEM_GetCurrentPhy(), BitConverter.ToString(frame)); 266 267 this.Log(LogLevel.Noisy, "TX timer delay (us)={0} (PRECNT overflows={1}) (OTA frame time (us)={2})", 268 timerDelayUs, PROTIMER_UsToPreCntOverflowTicks(timerDelayUs), MODEM_GetFrameOverTheAirTimeUs(frame, true, true)); 269 270 InterferenceQueue.Add(this, MODEM_GetCurrentPhy(), Channel, 0 /*TODO: TxPower*/, frame); 271 FrameSent?.Invoke(this, frame); 272 273 MODEM_txPreambleSentInterrupt.Value = true; 274 MODEM_seqTxPreambleSentInterrupt.Value = true; 275 MODEM_txSyncSentInterrupt.Value |= !MODEM_syncData.Value; 276 MODEM_seqTxSyncSentInterrupt.Value = MODEM_txSyncSentInterrupt.Value; 277 278 UpdateInterrupts(); 279 280 RAC_internalTxState = RAC_InternalTxState.Tx; 281 txTimer.Frequency = PROTIMER_GetPreCntOverflowFrequency(); 282 txTimer.Limit = PROTIMER_UsToPreCntOverflowTicks(timerDelayUs); 283 txTimer.Enabled = true; 284 285 return true; 286 } 287 288 #region Region Accessors 289 [ConnectionRegionAttribute("frc")] ReadDoubleWordFromFrameController(long offset)290 public uint ReadDoubleWordFromFrameController(long offset) 291 { 292 return Read<FrameControllerRegisters>(frameControllerRegistersCollection, "Frame Controller (FRC)", offset); 293 } 294 295 [ConnectionRegionAttribute("frc")] ReadByteFromFrameController(long offset)296 public byte ReadByteFromFrameController(long offset) 297 { 298 return ReadByte<FrameControllerRegisters>(frameControllerRegistersCollection, "Frame Controller (FRC)", offset); 299 } 300 301 [ConnectionRegionAttribute("frc")] WriteDoubleWordToFrameController(long offset, uint value)302 public void WriteDoubleWordToFrameController(long offset, uint value) 303 { 304 Write<FrameControllerRegisters>(frameControllerRegistersCollection, "Frame Controller (FRC)", offset, value); 305 } 306 307 [ConnectionRegionAttribute("frc")] WriteByteFromFrameController(long offset, byte value)308 public void WriteByteFromFrameController(long offset, byte value) 309 { 310 // TODO: Single byte writes not implemented for now 311 } 312 313 [ConnectionRegionAttribute("frc_ns")] ReadDoubleWordFromFrameControllerNonSecure(long offset)314 public uint ReadDoubleWordFromFrameControllerNonSecure(long offset) 315 { 316 return Read<FrameControllerRegisters>(frameControllerRegistersCollection, "Frame Controller (FRC_NS)", offset); 317 } 318 319 [ConnectionRegionAttribute("frc_ns")] ReadByteFromFrameControllerNonSecure(long offset)320 public byte ReadByteFromFrameControllerNonSecure(long offset) 321 { 322 return ReadByte<FrameControllerRegisters>(frameControllerRegistersCollection, "Frame Controller (FRC_NS)", offset); 323 } 324 325 [ConnectionRegionAttribute("frc_ns")] WriteDoubleWordToFrameControllerNonSecure(long offset, uint value)326 public void WriteDoubleWordToFrameControllerNonSecure(long offset, uint value) 327 { 328 Write<FrameControllerRegisters>(frameControllerRegistersCollection, "Frame Controller (FRC_NS)", offset, value); 329 } 330 331 [ConnectionRegionAttribute("frc_ns")] WriteByteFromFrameControllerNonSecure(long offset, byte value)332 public void WriteByteFromFrameControllerNonSecure(long offset, byte value) 333 { 334 // TODO: Single byte writes not implemented for now 335 } 336 337 [ConnectionRegionAttribute("agc")] ReadDoubleWordFromAutomaticGainController(long offset)338 public uint ReadDoubleWordFromAutomaticGainController(long offset) 339 { 340 return Read<AutomaticGainControlRegisters>(automaticGainControlRegistersCollection, "Automatic Gain Control (AGC)", offset); 341 } 342 343 [ConnectionRegionAttribute("agc")] ReadByteFromAutomaticGainController(long offset)344 public byte ReadByteFromAutomaticGainController(long offset) 345 { 346 return ReadByte<AutomaticGainControlRegisters>(automaticGainControlRegistersCollection, "Automatic Gain Control (AGC)", offset); 347 } 348 349 [ConnectionRegionAttribute("agc")] WriteDoubleWordToAutomaticGainController(long offset, uint value)350 public void WriteDoubleWordToAutomaticGainController(long offset, uint value) 351 { 352 Write<AutomaticGainControlRegisters>(automaticGainControlRegistersCollection, "Automatic Gain Control (AGC)", offset, value); 353 } 354 355 [ConnectionRegionAttribute("agc")] WriteByteToAutomaticGainController(long offset, byte value)356 public void WriteByteToAutomaticGainController(long offset, byte value) 357 { 358 // TODO: Single byte writes not implemented for now 359 } 360 361 [ConnectionRegionAttribute("agc_ns")] ReadDoubleWordFromAutomaticGainControllerNonSecure(long offset)362 public uint ReadDoubleWordFromAutomaticGainControllerNonSecure(long offset) 363 { 364 return Read<AutomaticGainControlRegisters>(automaticGainControlRegistersCollection, "Automatic Gain Control (AGC_NS)", offset); 365 } 366 367 [ConnectionRegionAttribute("agc_ns")] ReadByteFromAutomaticGainControllerNonSecure(long offset)368 public byte ReadByteFromAutomaticGainControllerNonSecure(long offset) 369 { 370 return ReadByte<AutomaticGainControlRegisters>(automaticGainControlRegistersCollection, "Automatic Gain Control (AGC)", offset); 371 } 372 373 [ConnectionRegionAttribute("agc_ns")] WriteDoubleWordToAutomaticGainControllerNonSecure(long offset, uint value)374 public void WriteDoubleWordToAutomaticGainControllerNonSecure(long offset, uint value) 375 { 376 Write<AutomaticGainControlRegisters>(automaticGainControlRegistersCollection, "Automatic Gain Control (AGC_NS)", offset, value); 377 } 378 379 [ConnectionRegionAttribute("agc_ns")] WriteByteToAutomaticGainControllerNonSecure(long offset, byte value)380 public void WriteByteToAutomaticGainControllerNonSecure(long offset, byte value) 381 { 382 // TODO: Single byte writes not implemented for now 383 } 384 385 [ConnectionRegionAttribute("crc")] ReadDoubleWordFromCyclicRedundancyCheck(long offset)386 public uint ReadDoubleWordFromCyclicRedundancyCheck(long offset) 387 { 388 return Read<CyclicRedundancyCheckRegisters>(cyclicRedundancyCheckRegistersCollection, "Cyclic Redundancy Check (CRC)", offset); 389 } 390 391 [ConnectionRegionAttribute("crc")] ReadByteFromCyclicRedundancyCheck(long offset)392 public byte ReadByteFromCyclicRedundancyCheck(long offset) 393 { 394 return ReadByte<CyclicRedundancyCheckRegisters>(cyclicRedundancyCheckRegistersCollection, "Cyclic Redundancy Check (CRC)", offset); 395 } 396 397 [ConnectionRegionAttribute("crc")] WriteDoubleWordToCyclicRedundancyCheck(long offset, uint value)398 public void WriteDoubleWordToCyclicRedundancyCheck(long offset, uint value) 399 { 400 Write<CyclicRedundancyCheckRegisters>(cyclicRedundancyCheckRegistersCollection, "Cyclic Redundancy Check (CRC)", offset, value); 401 } 402 403 [ConnectionRegionAttribute("crc")] WriteByteToCyclicRedundancyCheck(long offset, byte value)404 public void WriteByteToCyclicRedundancyCheck(long offset, byte value) 405 { 406 // TODO: Single byte writes not implemented for now 407 } 408 409 [ConnectionRegionAttribute("crc_ns")] ReadDoubleWordFromCyclicRedundancyCheckNonSecure(long offset)410 public uint ReadDoubleWordFromCyclicRedundancyCheckNonSecure(long offset) 411 { 412 return Read<CyclicRedundancyCheckRegisters>(cyclicRedundancyCheckRegistersCollection, "Cyclic Redundancy Check (CRC_NS)", offset); 413 } 414 415 [ConnectionRegionAttribute("crc_ns")] ReadByteFromCyclicRedundancyCheckNonSecure(long offset)416 public byte ReadByteFromCyclicRedundancyCheckNonSecure(long offset) 417 { 418 return ReadByte<CyclicRedundancyCheckRegisters>(cyclicRedundancyCheckRegistersCollection, "Cyclic Redundancy Check (CRC_NS)", offset); 419 } 420 421 [ConnectionRegionAttribute("crc_ns")] WriteDoubleWordToCyclicRedundancyCheckNonSecure(long offset, uint value)422 public void WriteDoubleWordToCyclicRedundancyCheckNonSecure(long offset, uint value) 423 { 424 Write<CyclicRedundancyCheckRegisters>(cyclicRedundancyCheckRegistersCollection, "Cyclic Redundancy Check (CRC_NS)", offset, value); 425 } 426 427 [ConnectionRegionAttribute("crc_ns")] WriteByteToCyclicRedundancyCheckNonSecure(long offset, byte value)428 public void WriteByteToCyclicRedundancyCheckNonSecure(long offset, byte value) 429 { 430 // TODO: Single byte writes not implemented for now 431 } 432 433 [ConnectionRegionAttribute("modem")] ReadDoubleWordFromModulatorAndDemodulator(long offset)434 public uint ReadDoubleWordFromModulatorAndDemodulator(long offset) 435 { 436 return Read<ModulatorAndDemodulatorRegisters>(modulatorAndDemodulatorRegistersCollection, "Modulator And Demodulator (MODEM)", offset); 437 } 438 439 [ConnectionRegionAttribute("modem")] ReadByteFromModulatorAndDemodulator(long offset)440 public byte ReadByteFromModulatorAndDemodulator(long offset) 441 { 442 return ReadByte<ModulatorAndDemodulatorRegisters>(modulatorAndDemodulatorRegistersCollection, "Modulator And Demodulator (MODEM)", offset); 443 } 444 445 [ConnectionRegionAttribute("modem")] WriteDoubleWordToModulatorAndDemodulator(long offset, uint value)446 public void WriteDoubleWordToModulatorAndDemodulator(long offset, uint value) 447 { 448 Write<ModulatorAndDemodulatorRegisters>(modulatorAndDemodulatorRegistersCollection, "Modulator And Demodulator (MODEM)", offset, value); 449 } 450 451 [ConnectionRegionAttribute("modem")] WriteByteToModulatorAndDemodulator(long offset, byte value)452 public void WriteByteToModulatorAndDemodulator(long offset, byte value) 453 { 454 // TODO: Single byte writes not implemented for now 455 } 456 457 [ConnectionRegionAttribute("modem_ns")] ReadDoubleWordFromModulatorAndDemodulatorNonSecure(long offset)458 public uint ReadDoubleWordFromModulatorAndDemodulatorNonSecure(long offset) 459 { 460 return Read<ModulatorAndDemodulatorRegisters>(modulatorAndDemodulatorRegistersCollection, "Modulator And Demodulator (MODEM_NS)", offset); 461 } 462 463 [ConnectionRegionAttribute("modem_ns")] ReadByteFromModulatorAndDemodulatorNonSecure(long offset)464 public byte ReadByteFromModulatorAndDemodulatorNonSecure(long offset) 465 { 466 return ReadByte<ModulatorAndDemodulatorRegisters>(modulatorAndDemodulatorRegistersCollection, "Modulator And Demodulator (MODEM_NS)", offset); 467 } 468 469 [ConnectionRegionAttribute("modem_ns")] WriteDoubleWordToModulatorAndDemodulatorNonSecure(long offset, uint value)470 public void WriteDoubleWordToModulatorAndDemodulatorNonSecure(long offset, uint value) 471 { 472 Write<ModulatorAndDemodulatorRegisters>(modulatorAndDemodulatorRegistersCollection, "Modulator And Demodulator (MODEM_NS)", offset, value); 473 } 474 475 [ConnectionRegionAttribute("modem_ns")] WriteByteToModulatorAndDemodulatorNonSecure(long offset, byte value)476 public void WriteByteToModulatorAndDemodulatorNonSecure(long offset, byte value) 477 { 478 // TODO: Single byte writes not implemented for now 479 } 480 481 [ConnectionRegionAttribute("synth")] ReadDoubleWordFromSynthesizer(long offset)482 public uint ReadDoubleWordFromSynthesizer(long offset) 483 { 484 return Read<SynthesizerRegisters>(synthesizerRegistersCollection, "Synthesizer (SYNTH)", offset); 485 } 486 487 [ConnectionRegionAttribute("synth")] ReadByteFromSynthesizer(long offset)488 public byte ReadByteFromSynthesizer(long offset) 489 { 490 return ReadByte<SynthesizerRegisters>(synthesizerRegistersCollection, "Synthesizer (SYNTH)", offset); 491 } 492 493 [ConnectionRegionAttribute("synth")] WriteDoubleWordToSynthesizer(long offset, uint value)494 public void WriteDoubleWordToSynthesizer(long offset, uint value) 495 { 496 Write<SynthesizerRegisters>(synthesizerRegistersCollection, "Synthesizer (SYNTH)", offset, value); 497 } 498 499 [ConnectionRegionAttribute("synth")] WriteByteToSynthesizer(long offset, byte value)500 public void WriteByteToSynthesizer(long offset, byte value) 501 { 502 // TODO: Single byte writes not implemented for now 503 } 504 505 [ConnectionRegionAttribute("synth_ns")] ReadDoubleWordFromSynthesizerNonSecure(long offset)506 public uint ReadDoubleWordFromSynthesizerNonSecure(long offset) 507 { 508 return Read<SynthesizerRegisters>(synthesizerRegistersCollection, "Synthesizer (SYNTH_NS)", offset); 509 } 510 511 [ConnectionRegionAttribute("synth_ns")] ReadByteFromSynthesizerNonSecure(long offset)512 public byte ReadByteFromSynthesizerNonSecure(long offset) 513 { 514 return ReadByte<SynthesizerRegisters>(synthesizerRegistersCollection, "Synthesizer (SYNTH_NS)", offset); 515 } 516 517 [ConnectionRegionAttribute("synth_ns")] WriteDoubleWordToSynthesizerNonSecure(long offset, uint value)518 public void WriteDoubleWordToSynthesizerNonSecure(long offset, uint value) 519 { 520 Write<SynthesizerRegisters>(synthesizerRegistersCollection, "Synthesizer (SYNTH_NS)", offset, value); 521 } 522 523 [ConnectionRegionAttribute("synth_ns")] WriteByteToSynthesizerNonSecure(long offset, byte value)524 public void WriteByteToSynthesizerNonSecure(long offset, byte value) 525 { 526 // TODO: Single byte writes not implemented for now 527 } 528 529 [ConnectionRegionAttribute("protimer")] ReadDoubleWordFromProtocolTimer(long offset)530 public uint ReadDoubleWordFromProtocolTimer(long offset) 531 { 532 return Read<ProtocolTimerRegisters>(protocolTimerRegistersCollection, "Protocol Timer (PROTIMER)", offset); 533 } 534 535 [ConnectionRegionAttribute("protimer")] ReadByteFromProtocolTimer(long offset)536 public byte ReadByteFromProtocolTimer(long offset) 537 { 538 return ReadByte<ProtocolTimerRegisters>(protocolTimerRegistersCollection, "Protocol Timer (PROTIMER)", offset); 539 } 540 541 [ConnectionRegionAttribute("protimer")] WriteDoubleWordToProtocolTimer(long offset, uint value)542 public void WriteDoubleWordToProtocolTimer(long offset, uint value) 543 { 544 Write<ProtocolTimerRegisters>(protocolTimerRegistersCollection, "Protocol Timer (PROTIMER)", offset, value); 545 } 546 547 [ConnectionRegionAttribute("protimer")] WriteByteToProtocolTimer(long offset, byte value)548 public void WriteByteToProtocolTimer(long offset, byte value) 549 { 550 // TODO: Single byte writes not implemented for now 551 } 552 553 [ConnectionRegionAttribute("protimer_ns")] ReadDoubleWordFromProtocolTimerNonSecure(long offset)554 public uint ReadDoubleWordFromProtocolTimerNonSecure(long offset) 555 { 556 return Read<ProtocolTimerRegisters>(protocolTimerRegistersCollection, "Protocol Timer (PROTIMER_NS)", offset); 557 } 558 559 [ConnectionRegionAttribute("protimer_ns")] ReadByteFromProtocolTimerNonSecure(long offset)560 public byte ReadByteFromProtocolTimerNonSecure(long offset) 561 { 562 return ReadByte<ProtocolTimerRegisters>(protocolTimerRegistersCollection, "Protocol Timer (PROTIMER_NS)", offset); 563 } 564 565 [ConnectionRegionAttribute("protimer_ns")] WriteDoubleWordToProtocolTimerNonSecure(long offset, uint value)566 public void WriteDoubleWordToProtocolTimerNonSecure(long offset, uint value) 567 { 568 Write<ProtocolTimerRegisters>(protocolTimerRegistersCollection, "Protocol Timer (PROTIMER_NS)", offset, value); 569 } 570 571 [ConnectionRegionAttribute("protimer_ns")] WriteByteToProtocolTimerNonSecure(long offset, byte value)572 public void WriteByteToProtocolTimerNonSecure(long offset, byte value) 573 { 574 // TODO: Single byte writes not implemented for now 575 } 576 577 [ConnectionRegionAttribute("rac")] ReadDoubleWordFromRadioController(long offset)578 public uint ReadDoubleWordFromRadioController(long offset) 579 { 580 return Read<RadioControllerRegisters>(radioControllerRegistersCollection, "Radio Controller (RAC)", offset); 581 } 582 583 [ConnectionRegionAttribute("rac")] ReadByteFromRadioController(long offset)584 public byte ReadByteFromRadioController(long offset) 585 { 586 return ReadByte<RadioControllerRegisters>(radioControllerRegistersCollection, "Radio Controller (RAC)", offset); 587 } 588 589 [ConnectionRegionAttribute("rac")] WriteDoubleWordToRadioController(long offset, uint value)590 public void WriteDoubleWordToRadioController(long offset, uint value) 591 { 592 Write<RadioControllerRegisters>(radioControllerRegistersCollection, "Radio Controller (RAC)", offset, value); 593 } 594 595 [ConnectionRegionAttribute("rac")] WriteByteToRadioController(long offset, byte value)596 public void WriteByteToRadioController(long offset, byte value) 597 { 598 // TODO: Single byte writes not implemented for now 599 } 600 601 [ConnectionRegionAttribute("rac_ns")] ReadDoubleWordFromRadioControllerNonSecure(long offset)602 public uint ReadDoubleWordFromRadioControllerNonSecure(long offset) 603 { 604 return Read<RadioControllerRegisters>(radioControllerRegistersCollection, "Radio Controller (RAC_NS)", offset); 605 } 606 607 [ConnectionRegionAttribute("rac_ns")] ReadByteFromRadioControllerNonSecure(long offset)608 public byte ReadByteFromRadioControllerNonSecure(long offset) 609 { 610 return ReadByte<RadioControllerRegisters>(radioControllerRegistersCollection, "Radio Controller (RAC_NS)", offset); 611 } 612 613 [ConnectionRegionAttribute("rac_ns")] WriteDoubleWordToRadioControllerNonSecure(long offset, uint value)614 public void WriteDoubleWordToRadioControllerNonSecure(long offset, uint value) 615 { 616 Write<RadioControllerRegisters>(radioControllerRegistersCollection, "Radio Controller (RAC_NS)", offset, value); 617 } 618 619 620 [ConnectionRegionAttribute("rac_ns")] WriteByteToRadioControllerNonSecure(long offset, byte value)621 public void WriteByteToRadioControllerNonSecure(long offset, byte value) 622 { 623 // TODO: Single byte writes not implemented for now 624 } 625 626 [ConnectionRegionAttribute("bufc")] ReadDoubleWordFromBufferController(long offset)627 public uint ReadDoubleWordFromBufferController(long offset) 628 { 629 return Read<BufferControllerRegisters>(bufferControllerRegistersCollection, "Buffer Controller (BUFC)", offset); 630 } 631 632 [ConnectionRegionAttribute("bufc")] ReadByteFromBufferController(long offset)633 public byte ReadByteFromBufferController(long offset) 634 { 635 return ReadByte<BufferControllerRegisters>(bufferControllerRegistersCollection, "Buffer Controller (BUFC)", offset); 636 } 637 638 [ConnectionRegionAttribute("bufc")] WriteDoubleWordToBufferController(long offset, uint value)639 public void WriteDoubleWordToBufferController(long offset, uint value) 640 { 641 Write<BufferControllerRegisters>(bufferControllerRegistersCollection, "Buffer Controller (BUFC)", offset, value); 642 } 643 644 [ConnectionRegionAttribute("bufc")] WriteByteToBufferController(long offset, byte value)645 public void WriteByteToBufferController(long offset, byte value) 646 { 647 // TODO: Single byte writes not implemented for now 648 } 649 650 [ConnectionRegionAttribute("bufc_ns")] ReadDoubleWordFromBufferControllerNonSecure(long offset)651 public uint ReadDoubleWordFromBufferControllerNonSecure(long offset) 652 { 653 return Read<BufferControllerRegisters>(bufferControllerRegistersCollection, "Buffer Controller (BUFC_NS)", offset); 654 } 655 656 [ConnectionRegionAttribute("bufc_ns")] ReadByteFromBufferControllerNonSecure(long offset)657 public byte ReadByteFromBufferControllerNonSecure(long offset) 658 { 659 return ReadByte<BufferControllerRegisters>(bufferControllerRegistersCollection, "Buffer Controller (BUFC_NS)", offset); 660 } 661 662 [ConnectionRegionAttribute("bufc_ns")] WriteDoubleWordToBufferControllerNonSecure(long offset, uint value)663 public void WriteDoubleWordToBufferControllerNonSecure(long offset, uint value) 664 { 665 Write<BufferControllerRegisters>(bufferControllerRegistersCollection, "Buffer Controller (BUFC_NS)", offset, value); 666 } 667 668 [ConnectionRegionAttribute("bufc_ns")] WriteByteToBufferControllerNonSecure(long offset, byte value)669 public void WriteByteToBufferControllerNonSecure(long offset, byte value) 670 { 671 // TODO: Single byte writes not implemented for now 672 } 673 674 [ConnectionRegionAttribute("rfmailbox")] ReadDoubleWordFromRadioMailbox(long offset)675 public uint ReadDoubleWordFromRadioMailbox(long offset) 676 { 677 return Read<RadioMailboxRegisters>(radioMailboxRegistersCollection, "Radio Mailbox (RFMAILBOX)", offset); 678 } 679 680 [ConnectionRegionAttribute("rfmailbox")] ReadByteFromRadioMailbox(long offset)681 public byte ReadByteFromRadioMailbox(long offset) 682 { 683 return ReadByte<RadioMailboxRegisters>(radioMailboxRegistersCollection, "Radio Mailbox (RFMAILBOX)", offset); 684 } 685 686 [ConnectionRegionAttribute("rfmailbox")] WriteDoubleWordToRadioMailbox(long offset, uint value)687 public void WriteDoubleWordToRadioMailbox(long offset, uint value) 688 { 689 Write<RadioMailboxRegisters>(radioMailboxRegistersCollection, "Radio Mailbox (RFMAILBOX)", offset, value); 690 } 691 692 [ConnectionRegionAttribute("rfmailbox")] WriteByteToRadioMailbox(long offset, byte value)693 public void WriteByteToRadioMailbox(long offset, byte value) 694 { 695 // TODO: Single byte writes not implemented for now 696 } 697 698 [ConnectionRegionAttribute("rfmailbox_ns")] ReadDoubleWordFromRadioMailboxNonSecure(long offset)699 public uint ReadDoubleWordFromRadioMailboxNonSecure(long offset) 700 { 701 702 return Read<RadioMailboxRegisters>(radioMailboxRegistersCollection, "Radio Mailbox (RFMAILBOX_NS)", offset); 703 } 704 705 [ConnectionRegionAttribute("rfmailbox_ns")] ReadByteFromRadioMailboxNonSecure(long offset)706 public byte ReadByteFromRadioMailboxNonSecure(long offset) 707 { 708 709 return ReadByte<RadioMailboxRegisters>(radioMailboxRegistersCollection, "Radio Mailbox (RFMAILBOX_NS)", offset); 710 } 711 712 [ConnectionRegionAttribute("rfmailbox_ns")] WriteDoubleWordToRadioMailboxNonSecure(long offset, uint value)713 public void WriteDoubleWordToRadioMailboxNonSecure(long offset, uint value) 714 { 715 Write<RadioMailboxRegisters>(radioMailboxRegistersCollection, "Radio Mailbox (RFMAILBOX_NS)", offset, value); 716 } 717 718 [ConnectionRegionAttribute("rfmailbox_ns")] WriteByteToRadioMailboxNonSecure(long offset, byte value)719 public void WriteByteToRadioMailboxNonSecure(long offset, byte value) 720 { 721 // TODO: Single byte writes not implemented for now 722 } 723 724 [ConnectionRegionAttribute("hostmailbox")] ReadDoubleWordFromHostMailbox(long offset)725 public uint ReadDoubleWordFromHostMailbox(long offset) 726 { 727 return Read<HostMailboxRegisters>(hostMailboxRegistersCollection, "Host Mailbox (HOSTMAILBOX)", offset); 728 } 729 730 [ConnectionRegionAttribute("hostmailbox")] ReadByteFromHostMailbox(long offset)731 public byte ReadByteFromHostMailbox(long offset) 732 { 733 return ReadByte<HostMailboxRegisters>(hostMailboxRegistersCollection, "Host Mailbox (HOSTMAILBOX)", offset); 734 } 735 736 [ConnectionRegionAttribute("hostmailbox")] WriteDoubleWordToHostMailbox(long offset, uint value)737 public void WriteDoubleWordToHostMailbox(long offset, uint value) 738 { 739 Write<HostMailboxRegisters>(hostMailboxRegistersCollection, "Host Mailbox (HOSTMAILBOX)", offset, value); 740 } 741 742 [ConnectionRegionAttribute("hostmailbox")] WriteByteToHostMailbox(long offset, byte value)743 public void WriteByteToHostMailbox(long offset, byte value) 744 { 745 // TODO: Single byte writes not implemented for now 746 } 747 748 [ConnectionRegionAttribute("hostmailbox_ns")] ReadDoubleWordFromHostMailboxNonSecure(long offset)749 public uint ReadDoubleWordFromHostMailboxNonSecure(long offset) 750 { 751 752 return Read<HostMailboxRegisters>(hostMailboxRegistersCollection, "Host Mailbox (HOSTMAILBOX_NS)", offset); 753 } 754 755 [ConnectionRegionAttribute("hostmailbox_ns")] ReadByteFromHostMailboxNonSecure(long offset)756 public byte ReadByteFromHostMailboxNonSecure(long offset) 757 { 758 759 return ReadByte<HostMailboxRegisters>(hostMailboxRegistersCollection, "Host Mailbox (HOSTMAILBOX_NS)", offset); 760 } 761 762 [ConnectionRegionAttribute("hostmailbox_ns")] WriteDoubleWordToHostMailboxNonSecure(long offset, uint value)763 public void WriteDoubleWordToHostMailboxNonSecure(long offset, uint value) 764 { 765 Write<HostMailboxRegisters>(hostMailboxRegistersCollection, "Host Mailbox (HOSTMAILBOX_NS)", offset, value); 766 } 767 768 [ConnectionRegionAttribute("hostmailbox_ns")] WriteByteToHostMailboxNonSecure(long offset, byte value)769 public void WriteByteToHostMailboxNonSecure(long offset, byte value) 770 { 771 // TODO: Single byte writes not implemented for now 772 } 773 #endregion 774 775 // Main core IRQs 776 public GPIO FrameControllerPrioritizedIRQ { get; } 777 public GPIO FrameControllerIRQ { get; } 778 public GPIO ModulatorAndDemodulatorIRQ { get; } 779 public GPIO RadioControllerSequencerIRQ { get; } 780 public GPIO RadioControllerRadioStateMachineIRQ { get; } 781 public GPIO BufferControllerIRQ { get; } 782 public GPIO ProtocolTimerIRQ { get; } 783 public GPIO SynthesizerIRQ { get; } 784 public GPIO AutomaticGainControlIRQ { get; } 785 public GPIO HostMailboxIRQ { get; } 786 787 // Sequencer core IRQs 788 public GPIO SeqOffIRQ { get; } 789 public GPIO SeqRxWarmIRQ { get; } 790 public GPIO SeqRxSearchIRQ { get; } 791 public GPIO SeqRxFrameIRQ { get; } 792 public GPIO SeqRxPoweringDownIRQ { get; } 793 public GPIO SeqRx2RxIRQ { get; } 794 public GPIO SeqRxOverflowIRQ { get; } 795 public GPIO SeqRx2TxIRQ { get; } 796 public GPIO SeqTxWarmIRQ { get; } 797 public GPIO SeqTxIRQ { get; } 798 public GPIO SeqTxPoweringDownIRQ { get; } 799 public GPIO SeqTx2RxIRQ { get; } 800 public GPIO SeqTx2TxIRQ { get; } 801 public GPIO SeqShutdownIRQ { get; } 802 public GPIO SeqRadioControllerIRQ { get; } 803 public GPIO SeqFrameControllerIRQ { get; } 804 public GPIO SeqFrameControllerPriorityIRQ { get; } 805 public GPIO SeqModulatorAndDemodulatorIRQ { get; } 806 public GPIO SeqBufferControllerIRQ { get; } 807 public GPIO SeqAutomaticGainControlIRQ { get; } 808 public GPIO SeqProtocolTimerIRQ { get; } 809 public GPIO SeqSynthesizerIRQ { get; } 810 public GPIO SeqRfMailboxIRQ { get; } 811 public event Action<IRadio, byte[]> FrameSent; 812 private byte[] currentFrame; 813 private uint currentFrameOffset; 814 private int currentChannel = 0; 815 public int Channel { 816 get 817 { 818 return currentChannel; 819 } 820 set 821 { 822 currentChannel = value; 823 } 824 } GetTime()825 private TimeInterval GetTime() => machine.LocalTimeSource.ElapsedVirtualTime; 826 private readonly Machine machine; 827 private readonly MappedMemory ram; 828 private readonly CortexM sequencer; 829 private static PseudorandomNumberGenerator random = EmulationManager.Instance.CurrentEmulation.RandomGenerator; 830 private readonly LimitTimer seqTimer; 831 private readonly LimitTimer proTimer; 832 private readonly LimitTimer paRampingTimer; 833 private readonly LimitTimer rssiUpdateTimer; 834 private readonly LimitTimer txTimer; 835 private readonly LimitTimer rxTimer; 836 private readonly DoubleWordRegisterCollection automaticGainControlRegistersCollection; 837 private readonly DoubleWordRegisterCollection bufferControllerRegistersCollection; 838 private readonly DoubleWordRegisterCollection cyclicRedundancyCheckRegistersCollection; 839 private readonly DoubleWordRegisterCollection frameControllerRegistersCollection; 840 private readonly DoubleWordRegisterCollection modulatorAndDemodulatorRegistersCollection; 841 private readonly DoubleWordRegisterCollection protocolTimerRegistersCollection; 842 private readonly DoubleWordRegisterCollection radioControllerRegistersCollection; 843 private readonly DoubleWordRegisterCollection radioMailboxRegistersCollection; 844 private readonly DoubleWordRegisterCollection hostMailboxRegistersCollection; 845 private readonly DoubleWordRegisterCollection synthesizerRegistersCollection; 846 private const uint SetRegisterOffset = 0x1000; 847 private const uint ClearRegisterOffset = 0x2000; 848 private const uint ToggleRegisterOffset = 0x3000; 849 private const uint SequencerMemoryBaseAddress = 0xB0000000; 850 private const uint MailboxMessageNumber = 4; 851 private const long HfxoFrequency = 39000000L; 852 private const long MicrosecondFrequency = 1000000L; 853 private const long HalfMicrosecondFrequency = 2000000L; 854 public bool LogBasicRadioActivityAsError = false; 855 public bool ForceBusyRssi 856 { 857 set 858 { 859 InterferenceQueue.ForceBusyRssi = value; 860 } 861 } 862 863 #region Build Register Collections BuildFrameControllerRegistersCollection()864 private DoubleWordRegisterCollection BuildFrameControllerRegistersCollection() 865 { 866 var registerDictionary = new Dictionary<long, DoubleWordRegister> 867 { 868 {(long)FrameControllerRegisters.Status, new DoubleWordRegister(this) 869 .WithTag("SNIFFDCOUNT", 0, 5) 870 .WithFlag(5, out FRC_activeTransmitFrameDescriptor, FieldMode.Read, name: "ACTIVETXFCD") 871 .WithFlag(6, out FRC_activeReceiveFrameDescriptor, FieldMode.Read, name: "ACTIVERXFCD") 872 .WithTaggedFlag("SNIFFDFRAME", 7) 873 .WithFlag(8, out FRC_rxRawBlocked, FieldMode.Read, name: "RXRAWBLOCKED") 874 .WithTaggedFlag("FRAMEOK", 9) 875 .WithFlag(10, FieldMode.Read, valueProviderCallback: _ => false, name: "RXABORTINPROGRESS") 876 .WithTaggedFlag("TXWORD", 11) 877 .WithTaggedFlag("RXWORD", 12) 878 .WithTaggedFlag("CONVPAUSED", 13) 879 .WithTaggedFlag("TXSUBFRAMEPAUSED", 14) 880 .WithTaggedFlag("INTERLEAVEREADPAUSED", 15) 881 .WithTaggedFlag("INTERLEAVEWRITEPAUSED", 16) 882 .WithTaggedFlag("FRAMEDETPAUSED", 17) 883 .WithTaggedFlag("FRAMELENGTHERROR", 18) 884 .WithTaggedFlag("DEMODERROR", 19) 885 .WithValueField(20, 5, out FRC_fsmState, name: "FSMSTATE") 886 .WithTaggedFlag("RXWCNTMATCHPAUSED", 25) 887 .WithTaggedFlag("CRCERRORTOLERATED", 26) 888 .WithReservedBits(27, 5) 889 }, 890 {(long)FrameControllerRegisters.DynamicFrameLengthControl, new DoubleWordRegister(this) 891 .WithEnumField<DoubleWordRegister, FRC_DynamicFrameLengthMode>(0, 3, out FRC_dynamicFrameLengthMode, name: "DFLMODE") 892 .WithEnumField<DoubleWordRegister, FRC_DynamicFrameLengthBitOrder>(3, 1, out FRC_dynamicFrameLengthBitOrder, name: "DFLBITORDER") 893 .WithValueField(4, 3, out FRC_dynamicFrameLengthBitShift, name: "DFLSHIFT") 894 .WithReservedBits(7, 1) 895 .WithValueField(8, 4, out FRC_dynamicFrameLengthOffset, name: "DFLOFFSET") 896 .WithValueField(12, 4, out FRC_dynamicFrameLengthBits, name: "DFLBITS") 897 .WithValueField(16, 4, out FRC_minDecodedLength, name: "MINLENGTH") 898 .WithFlag(20, out FRC_dynamicFrameCrcIncluded, name: "DFLINCLUDECRC") 899 .WithTag("DFLBOIOFFSET", 21, 4) 900 .WithReservedBits(25, 7) 901 }, 902 {(long)FrameControllerRegisters.MaximumFrameLength, new DoubleWordRegister(this) 903 .WithValueField(0, 12, out FRC_maxDecodedLength, name: "MAXLENGTH") 904 .WithValueField(12, 4, out FRC_initialDecodedFrameLength, name: "INILENGTH") 905 .WithReservedBits(16, 16) 906 }, 907 {(long)FrameControllerRegisters.AddressFilterControl, new DoubleWordRegister(this) 908 .WithTaggedFlag("EN", 0) 909 .WithTaggedFlag("BRDCST00EN", 1) 910 .WithTaggedFlag("BRDCSTFFEN", 2) 911 .WithReservedBits(3, 5) 912 .WithTag("ADDRESS", 8, 8) 913 .WithReservedBits(16, 16) 914 }, 915 {(long)FrameControllerRegisters.FrameControllerDataBuffer, new DoubleWordRegister(this) 916 .WithTag("DATABUFFER", 0, 8) 917 .WithReservedBits(8, 24) 918 }, 919 {(long)FrameControllerRegisters.WordCounter, new DoubleWordRegister(this) 920 .WithValueField(0 ,12, out FRC_wordCounter, FieldMode.Read, name: "WCNT") 921 .WithReservedBits(12, 20) 922 }, 923 {(long)FrameControllerRegisters.WordCounterCompare0, new DoubleWordRegister(this) 924 .WithValueField(0, 12, out FRC_frameLength, name: "FRAMELENGTH") 925 .WithReservedBits(12, 20) 926 }, 927 {(long)FrameControllerRegisters.WordCounterCompare1, new DoubleWordRegister(this) 928 .WithValueField(0, 12, out FRC_lengthFieldLocation, name: "LENGTHFIELDLOC") 929 .WithReservedBits(12, 20) 930 }, 931 {(long)FrameControllerRegisters.WordCounterCompare2, new DoubleWordRegister(this) 932 .WithTag("ADDRFIELDLOC", 0, 12) 933 .WithReservedBits(12, 20) 934 }, 935 {(long)FrameControllerRegisters.Command, new DoubleWordRegister(this) 936 .WithFlag(0, FieldMode.Set, writeCallback: (_, value) => {if (value) FRC_RxAbortCommand(); }, name: "RXABORT") 937 .WithTaggedFlag("FRAMEDETRESUME", 1) 938 .WithTaggedFlag("INTERLEAVEWRITERESUME", 2) 939 .WithTaggedFlag("INTERLEAVEREADRESUME", 3) 940 .WithTaggedFlag("CONVRESUME", 4) 941 .WithTaggedFlag("CONVTERMINATE", 5) 942 .WithTaggedFlag("TXSUBFRAMERESUME", 6) 943 .WithTaggedFlag("INTERLEAVEINIT", 7) 944 .WithTaggedFlag("INTERLEAVECNTCLEAR", 8) 945 .WithTaggedFlag("CONVINIT", 9) 946 .WithTaggedFlag("BLOCKINIT", 10) 947 .WithTaggedFlag("STATEINIT", 11) 948 .WithFlag(12, FieldMode.Set, writeCallback: (_, value) => 949 { 950 if(value) 951 { 952 FRC_rxRawBlocked.Value = false; 953 FRC_UpdateRawMode(); 954 } 955 }, name: "RXRAWUNBLOCK") 956 .WithTaggedFlag("RXPAUSERESUME", 13) 957 .WithReservedBits(14, 18) 958 }, 959 {(long)FrameControllerRegisters.Control, new DoubleWordRegister(this) 960 .WithTaggedFlag("RANDOMTX", 0) 961 .WithTaggedFlag("UARTMODE", 1) 962 .WithTaggedFlag("BITORDER", 2) 963 .WithReservedBits(3, 1) 964 .WithEnumField<DoubleWordRegister, FRC_FrameDescriptorMode>(4, 2, out FRC_txFrameDescriptorMode, name: "TXFCDMODE") 965 .WithEnumField<DoubleWordRegister, FRC_FrameDescriptorMode>(6, 2, out FRC_rxFrameDescriptorMode, name: "RXFCDMODE") 966 .WithTag("BITSPERWORD", 8, 3) // TODO: Assume 0x7 (first word in a frame is 8bit) 967 .WithTag("RATESELECT", 11, 2) 968 .WithTaggedFlag("TXPREFETCH", 13) 969 .WithTaggedFlag("TXFETCHBLOCKING", 14) 970 .WithReservedBits(15, 1) 971 .WithTaggedFlag("SEQHANDSHAKE", 16) 972 .WithTaggedFlag("PRBSTEST", 17) 973 .WithTaggedFlag("LPMODEDIS", 18) 974 .WithTaggedFlag("WAITEOFEN", 19) 975 .WithTaggedFlag("RXABORTIGNOREDIS", 20) 976 .WithReservedBits(21, 3) 977 .WithTaggedFlag("SKIPTXTRAILDATAWHITEN", 24) 978 .WithTaggedFlag("SKIPRXSUPSTATEWHITEN", 25) 979 .WithTaggedFlag("HOLDTXTRAILDATAACTIVE", 26) 980 .WithReservedBits(27, 5) 981 }, 982 {(long)FrameControllerRegisters.RxControl, new DoubleWordRegister(this) 983 .WithFlag(0, out FRC_rxStoreCrc, name: "STORECRC") 984 .WithFlag(1, out FRC_rxAcceptCrcErrors, name: "ACCEPTCRCERRORS") 985 .WithTaggedFlag("ACCEPTBLOCKERRORS", 2) 986 .WithTaggedFlag("TRACKABFRAME", 3) /* TODO: RENODE-354 */ 987 .WithFlag(4, out FRC_rxBufferClear, name: "BUFCLEAR") 988 .WithFlag(5, out FRC_rxBufferRestoreOnFrameError, name: "BUFRESTOREFRAMEERROR") 989 .WithFlag(6, out FRC_rxBufferRestoreOnRxAborted, name: "BUFRESTORERXABORTED") 990 .WithTag("RXFRAMEENDAHEADBYTES", 7, 4) 991 .WithTaggedFlag("ACCEPTUARTERRORS", 11) 992 .WithReservedBits(12, 20) 993 }, 994 {(long)FrameControllerRegisters.TrailingRxData, new DoubleWordRegister(this) 995 .WithFlag(0, out FRC_rxAppendRssi, name: "RSSI") 996 .WithFlag(1, out FRC_rxAppendStatus, name: "CRCOK") 997 .WithFlag(2, out FRC_rxAppendProtimerCc0base, name: "PROTIMERCC0BASE") 998 .WithFlag(3, out FRC_rxAppendProtimerCc0LowWrap, name: "PROTIMERCC0WRAPL") 999 .WithFlag(4, out FRC_rxAppendProtimerCc0HighWrap, name: "PROTIMERCC0WRAPH") 1000 .WithTaggedFlag("RTCSTAMP", 5) 1001 .WithReservedBits(6, 26) 1002 }, 1003 {(long)FrameControllerRegisters.InterruptFlags, new DoubleWordRegister(this) 1004 .WithFlag(0, out FRC_txDoneInterrupt, name: "TXDONEIF") 1005 .WithFlag(1, out FRC_txAfterFrameDoneInterrupt, name: "TXAFTERFRAMEDONEIF") 1006 .WithTaggedFlag("TXABORTEDIF", 2) 1007 .WithFlag(3, out FRC_txUnderflowInterrupt, name: "TXUFIF") 1008 .WithFlag(4, out FRC_rxDoneInterrupt, name: "RXDONEIF") 1009 .WithFlag(5, out FRC_rxAbortedInterrupt, name: "RXABORTEDIF") 1010 .WithFlag(6, out FRC_frameErrorInterrupt, name: "FRAMEERRORIF") 1011 .WithTaggedFlag("BLOCKERRORIF", 7) 1012 .WithFlag(8, out FRC_rxOverflowInterrupt, name: "RXOFIF") 1013 .WithTaggedFlag("WCNTCMP0IF", 9) 1014 .WithTaggedFlag("WCNTCMP1IF", 10) 1015 .WithTaggedFlag("WCNTCMP2IF", 11) 1016 .WithTaggedFlag("ADDRERRORIF", 12) 1017 .WithTaggedFlag("BUSERRORIF", 13) 1018 .WithFlag(14, out FRC_rxRawEventInterrupt, name: "RXRAWEVENTIF") 1019 .WithFlag(15, out FRC_txRawEventInterrupt, name: "TXRAWEVENTIF") 1020 .WithTaggedFlag("SNIFFOFIF", 16) 1021 .WithTaggedFlag("WCNTCMP3IF", 17) 1022 .WithTaggedFlag("WCNTCMP4IF", 18) 1023 .WithTaggedFlag("BOISETIF", 19) 1024 .WithFlag(20, out FRC_packetBufferStartInterrupt, name: "PKTBUFSTARTIF") 1025 .WithFlag(21, out FRC_packetBufferThresholdInterrupt, name: "PKTBUFTHRESHOLDIF") 1026 .WithTaggedFlag("RXRAWOFIF", 22) 1027 .WithTaggedFlag("WCNTCMP5IF", 23) 1028 .WithTaggedFlag("FRAMEDETPAUSEDIF", 24) 1029 .WithTaggedFlag("INTERLEAVEWRITEPAUSEDIF", 25) 1030 .WithTaggedFlag("INTERLEAVEREADPAUSEDIF", 26) 1031 .WithTaggedFlag("TXSUBFRAMEPAUSEDIF", 27) 1032 .WithTaggedFlag("CONVPAUSEDIF", 28) 1033 .WithTaggedFlag("RXWORDIF", 29) 1034 .WithTaggedFlag("TXWORDIF", 30) 1035 .WithTaggedFlag("UARTERRORIF", 31) 1036 .WithChangeCallback((_, __) => UpdateInterrupts()) 1037 }, 1038 {(long)FrameControllerRegisters.InterruptEnable, new DoubleWordRegister(this) 1039 .WithFlag(0, out FRC_txDoneInterruptEnable, name: "TXDONEIEN") 1040 .WithFlag(1, out FRC_txAfterFrameDoneInterruptEnable, name: "TXAFTERFRAMEDONEIEN") 1041 .WithTaggedFlag("TXABORTEDIEN", 2) 1042 .WithFlag(3, out FRC_txUnderflowInterruptEnable, name: "TXUFIEN") 1043 .WithFlag(4, out FRC_rxDoneInterruptEnable, name: "RXDONEIEN") 1044 .WithFlag(5, out FRC_rxAbortedInterruptEnable, name: "RXABORTEDIEN") 1045 .WithFlag(6, out FRC_frameErrorInterruptEnable, name: "FRAMEERRORIEN") 1046 .WithTaggedFlag("BLOCKERRORIEN", 7) 1047 .WithFlag(8, out FRC_rxOverflowInterruptEnable, name: "RXOFIEN") 1048 .WithTaggedFlag("WCNTCMP0IEN", 9) 1049 .WithTaggedFlag("WCNTCMP1IEN", 10) 1050 .WithTaggedFlag("WCNTCMP2IEN", 11) 1051 .WithTaggedFlag("ADDRERRORIEN", 12) 1052 .WithTaggedFlag("BUSERRORIEN", 13) 1053 .WithFlag(14, out FRC_rxRawEventInterruptEnable, name: "RXRAWEVENTIEN") 1054 .WithFlag(15, out FRC_txRawEventInterruptEnable, name: "TXRAWEVENTIEN") 1055 .WithTaggedFlag("SNIFFOFIEN", 16) 1056 .WithTaggedFlag("WCNTCMP3IEN", 17) 1057 .WithTaggedFlag("WCNTCMP4IEN", 18) 1058 .WithTaggedFlag("BOISETIEN", 19) 1059 .WithFlag(20, out FRC_packetBufferStartInterruptEnable, name: "PKTBUFSTARTIEN") 1060 .WithFlag(21, out FRC_packetBufferThresholdInterruptEnable, name: "PKTBUFTHRESHOLDIEN") 1061 .WithTaggedFlag("RXRAWOFIEN", 22) 1062 .WithTaggedFlag("WCNTCMP5IEN", 23) 1063 .WithTaggedFlag("FRAMEDETPAUSEDIEN", 24) 1064 .WithTaggedFlag("INTERLEAVEWRITEPAUSEDIEN", 25) 1065 .WithTaggedFlag("INTERLEAVEREADPAUSEDIEN", 26) 1066 .WithTaggedFlag("TXSUBFRAMEPAUSEDIEN", 27) 1067 .WithTaggedFlag("CONVPAUSEDIEN", 28) 1068 .WithTaggedFlag("RXWORDIEN", 29) 1069 .WithTaggedFlag("TXWORDIEN", 30) 1070 .WithTaggedFlag("UARTERRORIEN", 31) 1071 .WithChangeCallback((_, __) => UpdateInterrupts()) 1072 }, 1073 {(long)FrameControllerRegisters.SequencerInterruptFlags, new DoubleWordRegister(this) 1074 .WithFlag(0, out FRC_seqTxDoneInterrupt, name: "TXDONESEQIF") 1075 .WithFlag(1, out FRC_seqTxAfterFrameDoneInterrupt, name: "TXAFTERFRAMEDONESEQIF") 1076 .WithTaggedFlag("TXABORTEDSEQIF", 2) 1077 .WithFlag(3, out FRC_seqTxUnderflowInterrupt, name: "TXUFSEQIF") 1078 .WithFlag(4, out FRC_seqRxDoneInterrupt, name: "RXDONESEQIF") 1079 .WithFlag(5, out FRC_seqRxAbortedInterrupt, name: "RXABORTEDSEQIF") 1080 .WithFlag(6, out FRC_seqFrameErrorInterrupt, name: "FRAMEERRORSEQIF") 1081 .WithTaggedFlag("BLOCKERRORSEQIF", 7) 1082 .WithFlag(8, out FRC_seqRxOverflowInterrupt, name: "RXOFSEQIF") 1083 .WithTaggedFlag("WCNTCMP0SEQIF", 9) 1084 .WithTaggedFlag("WCNTCMP1SEQIF", 10) 1085 .WithTaggedFlag("WCNTCMP2SEQIF", 11) 1086 .WithTaggedFlag("ADDRERRORSEQIF", 12) 1087 .WithTaggedFlag("BUSERRORSEQIF", 13) 1088 .WithFlag(14, out FRC_seqRxRawEventInterrupt, name: "RXRAWEVENTSEQIF") 1089 .WithFlag(15, out FRC_seqTxRawEventInterrupt, name: "TXRAWEVENTSEQIF") 1090 .WithTaggedFlag("SNIFFOFSEQIF", 16) 1091 .WithTaggedFlag("WCNTCMP3SEQIF", 17) 1092 .WithTaggedFlag("WCNTCMP4SEQIF", 18) 1093 .WithTaggedFlag("BOISETSEQIF", 19) 1094 .WithFlag(20, out FRC_seqPacketBufferStartInterrupt, name: "PKTBUFSTARTSEQIF") 1095 .WithFlag(21, out FRC_seqPacketBufferThresholdInterrupt, name: "PKTBUFTHRESHOLDSEQIF") 1096 .WithTaggedFlag("RXRAWOFSEQIF", 22) 1097 .WithTaggedFlag("WCNTCMP5SEQIF", 23) 1098 .WithTaggedFlag("FRAMEDETPAUSEDSEQIF", 24) 1099 .WithTaggedFlag("INTERLEAVEWRITEPAUSEDSEQIF", 25) 1100 .WithTaggedFlag("INTERLEAVEREADPAUSEDSEQIF", 26) 1101 .WithTaggedFlag("TXSUBFRAMEPAUSEDSEQIF", 27) 1102 .WithTaggedFlag("CONVPAUSEDSEQIF", 28) 1103 .WithTaggedFlag("RXWORDSEQIF", 29) 1104 .WithTaggedFlag("TXWORDSEQIF", 30) 1105 .WithTaggedFlag("UARTERRORSEQIF", 31) 1106 .WithChangeCallback((_, __) => UpdateInterrupts()) 1107 }, 1108 {(long)FrameControllerRegisters.SequencerInterruptEnable, new DoubleWordRegister(this) 1109 .WithFlag(0, out FRC_seqTxDoneInterruptEnable, name: "TXDONESEQIEN") 1110 .WithFlag(1, out FRC_seqTxAfterFrameDoneInterruptEnable, name: "TXAFTERFRAMEDONESEQIEN") 1111 .WithTaggedFlag("TXABORTEDSEQIEN", 2) 1112 .WithFlag(3, out FRC_seqTxUnderflowInterruptEnable, name: "TXUFSEQIEN") 1113 .WithFlag(4, out FRC_seqRxDoneInterruptEnable, name: "RXDONESEQIEN") 1114 .WithFlag(5, out FRC_seqRxAbortedInterruptEnable, name: "RXABORTEDSEQIEN") 1115 .WithFlag(6, out FRC_seqFrameErrorInterruptEnable, name: "FRAMEERRORSEQIEN") 1116 .WithTaggedFlag("BLOCKERRORSEQIEN", 7) 1117 .WithFlag(8, out FRC_seqRxOverflowInterruptEnable, name: "RXOFSEQIEN") 1118 .WithTaggedFlag("WCNTCMP0SEQIEN", 9) 1119 .WithTaggedFlag("WCNTCMP1SEQIEN", 10) 1120 .WithTaggedFlag("WCNTCMP2SEQIEN", 11) 1121 .WithTaggedFlag("ADDRERRORSEQIEN", 12) 1122 .WithTaggedFlag("BUSERRORSEQIEN", 13) 1123 .WithFlag(14, out FRC_seqRxRawEventInterruptEnable, name: "RXRAWEVENTSEQIEN") 1124 .WithFlag(15, out FRC_seqTxRawEventInterruptEnable, name: "TXRAWEVENTSEQIEN") 1125 .WithTaggedFlag("SNIFFOFSEQIEN", 16) 1126 .WithTaggedFlag("WCNTCMP3SEQIEN", 17) 1127 .WithTaggedFlag("WCNTCMP4SEQIEN", 18) 1128 .WithTaggedFlag("BOISETSEQIEN", 19) 1129 .WithFlag(20, out FRC_seqPacketBufferStartInterruptEnable, name: "PKTBUFSTARTSEQIEN") 1130 .WithFlag(21, out FRC_seqPacketBufferThresholdInterruptEnable, name: "PKTBUFTHRESHOLDSEQIEN") 1131 .WithTaggedFlag("RXRAWOFSEQIEN", 22) 1132 .WithTaggedFlag("WCNTCMP5SEQIEN", 23) 1133 .WithTaggedFlag("FRAMEDETPAUSEDSEQIEN", 24) 1134 .WithTaggedFlag("INTERLEAVEWRITEPAUSEDSEQIEN", 25) 1135 .WithTaggedFlag("INTERLEAVEREADPAUSEDSEQIEN", 26) 1136 .WithTaggedFlag("TXSUBFRAMEPAUSEDSEQIEN", 27) 1137 .WithTaggedFlag("CONVPAUSEDSEQIEN", 28) 1138 .WithTaggedFlag("RXWORDSEQIEN", 29) 1139 .WithTaggedFlag("TXWORDSEQIEN", 30) 1140 .WithTaggedFlag("UARTERRORSEQIEN", 31) 1141 .WithChangeCallback((_, __) => UpdateInterrupts()) 1142 }, 1143 {(long)FrameControllerRegisters.RawDataControl, new DoubleWordRegister(this) 1144 .WithTag("TXRAWMODE", 0, 2) 1145 .WithEnumField<DoubleWordRegister, FRC_RxRawDataMode>(2, 3, out FRC_rxRawDataSelect, writeCallback: (_, value) => 1146 { 1147 switch(value) 1148 { 1149 case FRC_RxRawDataMode.Disable: 1150 FRC_rxRawBlocked.Value = false; 1151 break; 1152 case FRC_RxRawDataMode.SingleItem: 1153 break; 1154 default: 1155 this.Log(LogLevel.Error, "Unsupported RXRAWMODE value ({0}).", value); 1156 break; 1157 } 1158 }, name: "RXRAWMODE") 1159 .WithFlag(5, out FRC_enableRawDataRandomNumberGenerator, name: "RXRAWRANDOM") 1160 .WithReservedBits(6, 1) 1161 .WithEnumField<DoubleWordRegister, FRC_RxRawDataTriggerMode>(7, 2, out FRC_rxRawDataTriggerSelect, writeCallback: (_, value) => 1162 { 1163 switch(value) 1164 { 1165 case FRC_RxRawDataTriggerMode.Immediate: 1166 break; 1167 default: 1168 this.Log(LogLevel.Error, "Unsupported RXRAWTRIGGER value ({0}).", value); 1169 break; 1170 } 1171 }, name: "RXRAWTRIGGER") 1172 .WithReservedBits(9, 4) 1173 .WithTaggedFlag("DEMODRAWDATAMUX", 13) 1174 .WithReservedBits(14, 18) 1175 .WithChangeCallback((_, __) => FRC_UpdateRawMode()) 1176 }, 1177 {(long)FrameControllerRegisters.RxRawData, new DoubleWordRegister(this) 1178 .WithValueField(0, 32, FieldMode.Read, valueProviderCallback: _ => 1179 { 1180 if(FRC_rxRawDataSelect.Value == FRC_RxRawDataMode.SingleItem) 1181 { 1182 FRC_rxRawBlocked.Value = false; 1183 } 1184 FRC_UpdateRawMode(); 1185 return (uint)random.Next(); 1186 }, name: "RXRAWDATA") 1187 }, 1188 {(long)FrameControllerRegisters.PacketCaptureBufferControl, new DoubleWordRegister(this) 1189 .WithValueField(0, 12, out FRC_packetBufferStartAddress, name: "PKTBUFSTARTLOC") 1190 .WithValueField(12, 6, out FRC_packetBufferThreshold, writeCallback: (_, __) => { UpdateInterrupts(); }, name: "PKTBUFTHRESHOLD") 1191 .WithReservedBits(18, 6) 1192 .WithFlag(24, out FRC_packetBufferThresholdEnable, writeCallback: (_, __) => { UpdateInterrupts(); }, name: "PKTBUFTHRESHOLDEN") 1193 .WithFlag(25, out FRC_packetBufferStop, FieldMode.Write, name: "PKTBUFSTOP") 1194 .WithReservedBits(26, 6) 1195 }, 1196 {(long)FrameControllerRegisters.PacketCaptureBufferStatus, new DoubleWordRegister(this) 1197 .WithValueField(0, 6, out FRC_packetBufferCount, FieldMode.Read, name: "PKTBUFCOUNT") 1198 .WithReservedBits(6, 24) 1199 }, 1200 }; 1201 1202 var startOffset = (long)FrameControllerRegisters.FrameControlDescriptor0; 1203 var blockSize = (long)FrameControllerRegisters.FrameControlDescriptor1 - (long)FrameControllerRegisters.FrameControlDescriptor0; 1204 for(var index = 0; index < FRC_NumberOfFrameDescriptors; index++) 1205 { 1206 var i = index; 1207 1208 registerDictionary.Add(startOffset + blockSize*i, 1209 new DoubleWordRegister(this) 1210 .WithValueField(0, 8, out FRC_frameDescriptor[i].words, name: "WORDS") 1211 .WithValueField(8, 2, out FRC_frameDescriptor[i].buffer, name: "BUFFER") 1212 .WithFlag(10, out FRC_frameDescriptor[i].includeCrc, name: "INCLUDECRC") 1213 .WithFlag(11, out FRC_frameDescriptor[i].calculateCrc, name: "CALCCRC") 1214 .WithValueField(12, 2, out FRC_frameDescriptor[i].crcSkipWords, name: "SKIPCRC") 1215 .WithFlag(14, out FRC_frameDescriptor[i].skipWhitening, name: "SKIPWHITE") 1216 .WithFlag(15, out FRC_frameDescriptor[i].addTrailData, name: "ADDTRAILTXDATA") 1217 .WithReservedBits(16, 16) 1218 ); 1219 } 1220 1221 startOffset = (long)FrameControllerRegisters.PacketCaptureDataBuffer0; 1222 blockSize = (long)FrameControllerRegisters.PacketCaptureDataBuffer1 - (long)FrameControllerRegisters.PacketCaptureDataBuffer0; 1223 for(var index = 0; index < (FRC_PacketBufferCaptureSize / 4); index++) 1224 { 1225 var i = index; 1226 1227 registerDictionary.Add(startOffset + blockSize*i, 1228 new DoubleWordRegister(this) 1229 .WithValueField(0, 8, FieldMode.Read, valueProviderCallback: _ => FRC_packetBufferCapture[i*4], writeCallback: (_, value) => FRC_packetBufferCapture[i*4] = (byte)value, name: $"PKTBUF{i*4}") 1230 .WithValueField(8, 8, FieldMode.Read, valueProviderCallback: _ => FRC_packetBufferCapture[i*4 + 1], writeCallback: (_, value) => FRC_packetBufferCapture[i*4 + 1] = (byte)value, name: $"PKTBUF{i*4 + 1}") 1231 .WithValueField(16, 8, FieldMode.Read, valueProviderCallback: _ => FRC_packetBufferCapture[i*4 + 2], writeCallback: (_, value) => FRC_packetBufferCapture[i*4 + 2] = (byte)value, name: $"PKTBUF{i*4 + 2}") 1232 .WithValueField(24, 8, FieldMode.Read, valueProviderCallback: _ => FRC_packetBufferCapture[i*4 + 3], writeCallback: (_, value) => FRC_packetBufferCapture[i*4 + 3] = (byte)value, name: $"PKTBUF{i*4 + 3}") 1233 ); 1234 } 1235 1236 return new DoubleWordRegisterCollection(this, registerDictionary); 1237 } 1238 BuildBufferControllerRegistersCollection()1239 private DoubleWordRegisterCollection BuildBufferControllerRegistersCollection() 1240 { 1241 var registerDictionary = new Dictionary<long, DoubleWordRegister> 1242 { 1243 {(long)BufferControllerRegisters.InterruptFlags, new DoubleWordRegister(this) 1244 .WithFlag(0, out BUFC_buffer[0].overflow, name: "BUF0OFIF") 1245 .WithFlag(1, out BUFC_buffer[0].underflow, name: "BUF0UFIF") 1246 .WithFlag(2, out BUFC_buffer[0].thresholdEvent, name: "BUF0THRIF") 1247 .WithFlag(3, out BUFC_buffer[0].corrupt, name: "BUF0CORRIF") 1248 .WithFlag(4, out BUFC_buffer[0].notWordAligned, name: "BUF0NWAIF") 1249 .WithReservedBits(5, 3) 1250 .WithFlag(8, out BUFC_buffer[1].overflow, name: "BUF1OFIF") 1251 .WithFlag(9, out BUFC_buffer[1].underflow, name: "BUF1UFIF") 1252 .WithFlag(10, out BUFC_buffer[1].thresholdEvent, name: "BUF1THRIF") 1253 .WithFlag(11, out BUFC_buffer[1].corrupt, name: "BUF1CORRIF") 1254 .WithFlag(12, out BUFC_buffer[1].notWordAligned, name: "BUF1NWAIF") 1255 .WithReservedBits(13, 3) 1256 .WithFlag(16, out BUFC_buffer[2].overflow, name: "BUF2OFIF") 1257 .WithFlag(17, out BUFC_buffer[2].underflow, name: "BUF2UFIF") 1258 .WithFlag(18, out BUFC_buffer[2].thresholdEvent, name: "BUF2THRIF") 1259 .WithFlag(19, out BUFC_buffer[2].corrupt, name: "BUF2CORRIF") 1260 .WithFlag(20, out BUFC_buffer[2].notWordAligned, name: "BUF2NWAIF") 1261 .WithReservedBits(21, 3) 1262 .WithFlag(24, out BUFC_buffer[3].overflow, name: "BUF3OFIF") 1263 .WithFlag(25, out BUFC_buffer[3].underflow, name: "BUF3UFIF") 1264 .WithFlag(26, out BUFC_buffer[3].thresholdEvent, name: "BUF3THRIF") 1265 .WithFlag(27, out BUFC_buffer[3].corrupt, name: "BUF3CORRIF") 1266 .WithFlag(28, out BUFC_buffer[3].notWordAligned, name: "BUF3NWAIF") 1267 .WithReservedBits(29, 2) 1268 .WithTaggedFlag("BUSERRORIF", 31) 1269 .WithChangeCallback((_, __) => UpdateInterrupts()) 1270 }, 1271 {(long)BufferControllerRegisters.InterruptEnable, new DoubleWordRegister(this) 1272 .WithFlag(0, out BUFC_buffer[0].overflowEnable, name: "BUF0OFIEN") 1273 .WithFlag(1, out BUFC_buffer[0].underflowEnable, name: "BUF0UFIEN") 1274 .WithFlag(2, out BUFC_buffer[0].thresholdEventEnable, name: "BUF0THRIEN") 1275 .WithFlag(3, out BUFC_buffer[0].corruptEnable, name: "BUF0CORRIEN") 1276 .WithFlag(4, out BUFC_buffer[0].notWordAlignedEnable, name: "BUF0NWAIEN") 1277 .WithReservedBits(5, 3) 1278 .WithFlag(8, out BUFC_buffer[1].overflowEnable, name: "BUF1OFIEN") 1279 .WithFlag(9, out BUFC_buffer[1].underflowEnable, name: "BUF1UFIEN") 1280 .WithFlag(10, out BUFC_buffer[1].thresholdEventEnable, name: "BUF1THRIEN") 1281 .WithFlag(11, out BUFC_buffer[1].corruptEnable, name: "BUF1CORRIEN") 1282 .WithFlag(12, out BUFC_buffer[1].notWordAlignedEnable, name: "BUF1NWAIEN") 1283 .WithReservedBits(13, 3) 1284 .WithFlag(16, out BUFC_buffer[2].overflowEnable, name: "BUF2OFIEN") 1285 .WithFlag(17, out BUFC_buffer[2].underflowEnable, name: "BUF2UFIEN") 1286 .WithFlag(18, out BUFC_buffer[2].thresholdEventEnable, name: "BUF2THRIEN") 1287 .WithFlag(19, out BUFC_buffer[2].corruptEnable, name: "BUF2CORRIEN") 1288 .WithFlag(20, out BUFC_buffer[2].notWordAlignedEnable, name: "BUF2NWAIEN") 1289 .WithReservedBits(21, 3) 1290 .WithFlag(24, out BUFC_buffer[3].overflowEnable, name: "BUF3OFIEN") 1291 .WithFlag(25, out BUFC_buffer[3].underflowEnable, name: "BUF3UFIEN") 1292 .WithFlag(26, out BUFC_buffer[3].thresholdEventEnable, name: "BUF3THRIEN") 1293 .WithFlag(27, out BUFC_buffer[3].corruptEnable, name: "BUF3CORRIEN") 1294 .WithFlag(28, out BUFC_buffer[3].notWordAlignedEnable, name: "BUF3NWAIEN") 1295 .WithReservedBits(29, 2) 1296 .WithTaggedFlag("BUSERRORIEN", 31) 1297 .WithChangeCallback((_, __) => UpdateInterrupts()) 1298 }, 1299 {(long)BufferControllerRegisters.SequencerInterruptFlags, new DoubleWordRegister(this) 1300 .WithFlag(0, out BUFC_buffer[0].seqOverflow, name: "BUF0OFSEQIF") 1301 .WithFlag(1, out BUFC_buffer[0].seqUnderflow, name: "BUF0UFSEQIF") 1302 .WithFlag(2, out BUFC_buffer[0].seqThresholdEvent, name: "BUF0THRSEQIF") 1303 .WithFlag(3, out BUFC_buffer[0].seqCorrupt, name: "BUF0CORRSEQIF") 1304 .WithFlag(4, out BUFC_buffer[0].seqNotWordAligned, name: "BUF0NWASEQIF") 1305 .WithReservedBits(5, 3) 1306 .WithFlag(8, out BUFC_buffer[1].seqOverflow, name: "BUF1OFSEQIF") 1307 .WithFlag(9, out BUFC_buffer[1].seqUnderflow, name: "BUF1UFSEQIF") 1308 .WithFlag(10, out BUFC_buffer[1].seqThresholdEvent, name: "BUF1THRSEQIF") 1309 .WithFlag(11, out BUFC_buffer[1].seqCorrupt, name: "BUF1CORRSEQIF") 1310 .WithFlag(12, out BUFC_buffer[1].seqNotWordAligned, name: "BUF1NWASEQIF") 1311 .WithReservedBits(13, 3) 1312 .WithFlag(16, out BUFC_buffer[2].seqOverflow, name: "BUF2OFSEQIF") 1313 .WithFlag(17, out BUFC_buffer[2].seqUnderflow, name: "BUF2UFSEQIF") 1314 .WithFlag(18, out BUFC_buffer[2].seqThresholdEvent, name: "BUF2THRSEQIF") 1315 .WithFlag(19, out BUFC_buffer[2].seqCorrupt, name: "BUF2CORRSEQIF") 1316 .WithFlag(20, out BUFC_buffer[2].seqNotWordAligned, name: "BUF2NWASEQIF") 1317 .WithReservedBits(21, 3) 1318 .WithFlag(24, out BUFC_buffer[3].seqOverflow, name: "BUF3OFSEQIF") 1319 .WithFlag(25, out BUFC_buffer[3].seqUnderflow, name: "BUF3UFSEQIF") 1320 .WithFlag(26, out BUFC_buffer[3].seqThresholdEvent, name: "BUF3THRSEQIF") 1321 .WithFlag(27, out BUFC_buffer[3].seqCorrupt, name: "BUF3CORRSEQIF") 1322 .WithFlag(28, out BUFC_buffer[3].seqNotWordAligned, name: "BUF3NWASEQIF") 1323 .WithReservedBits(29, 2) 1324 .WithTaggedFlag("BUSERRORSEQIF", 31) 1325 .WithChangeCallback((_, __) => UpdateInterrupts()) 1326 }, 1327 {(long)BufferControllerRegisters.SequencerInterruptEnable, new DoubleWordRegister(this) 1328 .WithFlag(0, out BUFC_buffer[0].seqOverflowEnable, name: "BUF0OFSEQIEN") 1329 .WithFlag(1, out BUFC_buffer[0].seqUnderflowEnable, name: "BUF0UFSEQIEN") 1330 .WithFlag(2, out BUFC_buffer[0].seqThresholdEventEnable, name: "BUF0THRSEQIEN") 1331 .WithFlag(3, out BUFC_buffer[0].seqCorruptEnable, name: "BUF0CORRSEQIEN") 1332 .WithFlag(4, out BUFC_buffer[0].seqNotWordAlignedEnable, name: "BUF0NWASEQIEN") 1333 .WithReservedBits(5, 3) 1334 .WithFlag(8, out BUFC_buffer[1].seqOverflowEnable, name: "BUF1OFSEQIEN") 1335 .WithFlag(9, out BUFC_buffer[1].seqUnderflowEnable, name: "BUF1UFSEQIEN") 1336 .WithFlag(10, out BUFC_buffer[1].seqThresholdEventEnable, name: "BUF1THRSEQIEN") 1337 .WithFlag(11, out BUFC_buffer[1].seqCorruptEnable, name: "BUF1CORRSEQIEN") 1338 .WithFlag(12, out BUFC_buffer[1].seqNotWordAlignedEnable, name: "BUF1NWASEQIEN") 1339 .WithReservedBits(13, 3) 1340 .WithFlag(16, out BUFC_buffer[2].seqOverflowEnable, name: "BUF2OFSEQIEN") 1341 .WithFlag(17, out BUFC_buffer[2].seqUnderflowEnable, name: "BUF2UFSEQIEN") 1342 .WithFlag(18, out BUFC_buffer[2].seqThresholdEventEnable, name: "BUF2THRSEQIEN") 1343 .WithFlag(19, out BUFC_buffer[2].seqCorruptEnable, name: "BUF2CORRSEQIEN") 1344 .WithFlag(20, out BUFC_buffer[2].seqNotWordAlignedEnable, name: "BUF2NWASEQIEN") 1345 .WithReservedBits(21, 3) 1346 .WithFlag(24, out BUFC_buffer[3].seqOverflowEnable, name: "BUF3OFSEQIEN") 1347 .WithFlag(25, out BUFC_buffer[3].seqUnderflowEnable, name: "BUF3UFSEQIEN") 1348 .WithFlag(26, out BUFC_buffer[3].seqThresholdEventEnable, name: "BUF3THRSEQIEN") 1349 .WithFlag(27, out BUFC_buffer[3].seqCorruptEnable, name: "BUF3CORRSEQIEN") 1350 .WithFlag(28, out BUFC_buffer[3].seqNotWordAlignedEnable, name: "BUF3NWASEQIEN") 1351 .WithReservedBits(29, 2) 1352 .WithTaggedFlag("BUSERRORSEQIEN", 31) 1353 .WithChangeCallback((_, __) => UpdateInterrupts()) 1354 }, 1355 }; 1356 1357 var startOffset = (long)BufferControllerRegisters.Buffer0Control; 1358 var controlOffset = (long)BufferControllerRegisters.Buffer0Control - startOffset; 1359 var addrOffset = (long)BufferControllerRegisters.Buffer0Address - startOffset; 1360 var wOffOffset = (long)BufferControllerRegisters.Buffer0WriteOffset - startOffset; 1361 var rOffOffset = (long)BufferControllerRegisters.Buffer0ReadOffset - startOffset; 1362 var wStartOffset = (long)BufferControllerRegisters.Buffer0WriteStart - startOffset; 1363 var rDataOffset = (long)BufferControllerRegisters.Buffer0ReadData - startOffset; 1364 var wDataOffset = (long)BufferControllerRegisters.Buffer0WriteData - startOffset; 1365 var xWriteOffset = (long)BufferControllerRegisters.Buffer0XorWrite - startOffset; 1366 var statusOffset = (long)BufferControllerRegisters.Buffer0Status - startOffset; 1367 var thresOffset = (long)BufferControllerRegisters.Buffer0ThresholdControl - startOffset; 1368 var cmdOffset = (long)BufferControllerRegisters.Buffer0Command - startOffset; 1369 var rData32Offset = (long)BufferControllerRegisters.Buffer0ReadData32 - startOffset; 1370 var wData32Offset = (long)BufferControllerRegisters.Buffer0WriteData32 - startOffset; 1371 var xWrite32Offset = (long)BufferControllerRegisters.Buffer0XorWrite32 - startOffset; 1372 var blockSize = (long)BufferControllerRegisters.Buffer1Control - (long)BufferControllerRegisters.Buffer0Control; 1373 for(var index = 0; index < BUFC_NumberOfBuffers; index++) 1374 { 1375 var i = index; 1376 registerDictionary.Add(startOffset + blockSize*i + controlOffset, 1377 new DoubleWordRegister(this) 1378 .WithEnumField<DoubleWordRegister, BUFC_SizeMode>(0, 3, out BUFC_buffer[i].sizeMode, name: "SIZE") 1379 .WithReservedBits(3, 29)); 1380 registerDictionary.Add(startOffset + blockSize*i + addrOffset, 1381 new DoubleWordRegister(this, 0x8000000) 1382 .WithValueField(0, 32, out BUFC_buffer[i].address, name: "ADDR")); 1383 registerDictionary.Add(startOffset + blockSize*i + wOffOffset, 1384 new DoubleWordRegister(this) 1385 .WithValueField(0, 13, valueProviderCallback: _ => BUFC_buffer[i].WriteOffset, writeCallback: (_, value) => BUFC_buffer[i].WriteOffset = (uint)value, name: "WRITEOFFSET") 1386 .WithReservedBits(13, 19)); 1387 registerDictionary.Add(startOffset + blockSize*i + rOffOffset, 1388 new DoubleWordRegister(this) 1389 .WithValueField(0, 13, valueProviderCallback: _ => BUFC_buffer[i].ReadOffset, writeCallback: (_, value) => BUFC_buffer[i].ReadOffset = (uint)value, name: "READOFFSET") 1390 .WithReservedBits(13, 19)); 1391 registerDictionary.Add(startOffset + blockSize*i + wStartOffset, 1392 new DoubleWordRegister(this) 1393 .WithValueField(0, 13, out BUFC_buffer[i].writeStartOffset, FieldMode.Read, name: "WRITESTART") 1394 .WithReservedBits(13, 19)); 1395 registerDictionary.Add(startOffset + blockSize*i + rDataOffset, 1396 new DoubleWordRegister(this) 1397 .WithValueField(0, 8, FieldMode.Read, valueProviderCallback: _ => BUFC_buffer[i].ReadData, name: "READDATA") 1398 .WithReservedBits(8, 24)); 1399 registerDictionary.Add(startOffset + blockSize*i + wDataOffset, 1400 new DoubleWordRegister(this) 1401 .WithValueField(0, 8, FieldMode.Write, writeCallback: (_, value) => BUFC_buffer[i].WriteData = (uint)value, name: "WRITEDATA") 1402 .WithReservedBits(8, 24)); 1403 registerDictionary.Add(startOffset + blockSize*i + xWriteOffset, 1404 new DoubleWordRegister(this) 1405 .WithValueField(0, 8, FieldMode.Write, writeCallback: (_, value) => BUFC_buffer[i].XorWriteData = (uint)value, name: "XORWRITEDATA") 1406 .WithReservedBits(8, 24)); 1407 registerDictionary.Add(startOffset + blockSize*i + statusOffset, 1408 new DoubleWordRegister(this) 1409 .WithValueField(0, 13, FieldMode.Read, valueProviderCallback: _ => BUFC_buffer[i].BytesNumber, name: "BYTES") 1410 .WithReservedBits(13, 3) 1411 .WithFlag(16, FieldMode.Read, valueProviderCallback: _ => BUFC_buffer[i].ReadReady, name: "RDATARDY") 1412 .WithReservedBits(17, 3) 1413 .WithFlag(20, FieldMode.Read, valueProviderCallback: _ => BUFC_buffer[i].ThresholdFlag, name: "THRESHOLDFLAG") 1414 .WithReservedBits(21, 3) 1415 .WithFlag(24, FieldMode.Read, valueProviderCallback: _ => BUFC_buffer[i].Read32Ready, name: "RDATA32RDY") 1416 .WithReservedBits(25, 7)); 1417 registerDictionary.Add(startOffset + blockSize*i + thresOffset, 1418 new DoubleWordRegister(this) 1419 .WithValueField(0, 13, out BUFC_buffer[i].threshold, name: "THRESHOLD") 1420 .WithEnumField<DoubleWordRegister, BUFC_ThresholdMode>(13, 1, out BUFC_buffer[i].thresholdMode, name: "THRESHOLDMODE") 1421 .WithReservedBits(14, 18) 1422 .WithChangeCallback((_, __) => BUFC_buffer[i].UpdateThresholdFlag())); 1423 registerDictionary.Add(startOffset + blockSize*i + cmdOffset, 1424 new DoubleWordRegister(this) 1425 .WithFlag(0, FieldMode.Set, writeCallback: (_, value) => { if(value) BUFC_buffer[i].Clear(); }, name: "CLEAR") 1426 .WithFlag(1, FieldMode.Set, writeCallback: (_, value) => { if(value) BUFC_buffer[i].Prefetch(); }, name: "PREFETCH") 1427 .WithFlag(2, FieldMode.Set, writeCallback: (_, value) => { if(value) BUFC_buffer[i].UpdateWriteStartOffset(); }, name: "UPDATEWRITESTART") 1428 .WithFlag(3, FieldMode.Set, writeCallback: (_, value) => { if(value) BUFC_buffer[i].RestoreWriteOffset(); }, name: "RESTOREWRITEOFFSET") 1429 .WithReservedBits(4, 28)); 1430 registerDictionary.Add(startOffset + blockSize*i + rData32Offset, 1431 new DoubleWordRegister(this) 1432 .WithValueField(0, 32, FieldMode.Read, valueProviderCallback: _ => BUFC_buffer[i].ReadData32, name: "READDATA32")); 1433 registerDictionary.Add(startOffset + blockSize*i + wData32Offset, 1434 new DoubleWordRegister(this) 1435 .WithValueField(0, 32, FieldMode.Write, writeCallback: (_, value) => BUFC_buffer[i].WriteData32 = (uint)value, name: "WRITEDATA32")); 1436 registerDictionary.Add(startOffset + blockSize*i + xWrite32Offset, 1437 new DoubleWordRegister(this) 1438 .WithValueField(0, 32, FieldMode.Write, writeCallback: (_, value) => BUFC_buffer[i].XorWriteData32 = (uint)value, name: "XORWRITEDATA32")); 1439 } 1440 1441 return new DoubleWordRegisterCollection(this, registerDictionary); 1442 } 1443 BuildCyclicRedundancyCheckRegistersCollection()1444 private DoubleWordRegisterCollection BuildCyclicRedundancyCheckRegistersCollection() 1445 { 1446 var registerDictionary = new Dictionary<long, DoubleWordRegister> 1447 { 1448 {(long)CyclicRedundancyCheckRegisters.Control, new DoubleWordRegister(this) 1449 .WithTaggedFlag("INPUTINV", 0) 1450 .WithTaggedFlag("OUTPUTINV", 1) 1451 .WithEnumField<DoubleWordRegister, CRC_CrcWidthMode>(2, 2, out CRC_crcWidthMode, name: "CRCWIDTH") 1452 .WithReservedBits(4, 1) 1453 .WithTaggedFlag("INPUTBITORDER", 5) 1454 .WithFlag(6, out CRC_reverseCrcByteOrdering, name: "BYTEREVERSE") 1455 .WithTaggedFlag("BITREVERSE", 7) 1456 .WithValueField(8, 4, out CRC_crcBitsPerWord, name: "BITSPERWORD") 1457 .WithTaggedFlag("PADCRCINPUT", 12) 1458 .WithReservedBits(13, 19) 1459 }, 1460 }; 1461 1462 return new DoubleWordRegisterCollection(this, registerDictionary); 1463 } 1464 BuildSynthesizerRegistersCollection()1465 private DoubleWordRegisterCollection BuildSynthesizerRegistersCollection() 1466 { 1467 var registerDictionary = new Dictionary<long, DoubleWordRegister> 1468 { 1469 // We currently store the logical channel in the channel spacing register for PTI/debug 1470 {(long)SynthesizerRegisters.ChannelSpacing, new DoubleWordRegister(this) 1471 .WithValueField(0, 16, valueProviderCallback: _ => (ulong)Channel, writeCallback: (_, value) => { Channel = (int)value; }, name: "CHSP") 1472 .WithReservedBits(16, 15) 1473 }, 1474 }; 1475 1476 return new DoubleWordRegisterCollection(this, registerDictionary); 1477 } 1478 BuildRadioControllerRegistersCollection()1479 private DoubleWordRegisterCollection BuildRadioControllerRegistersCollection() 1480 { 1481 var registerDictionary = new Dictionary<long, DoubleWordRegister> 1482 { 1483 {(long)RadioControllerRegisters.RXENSourceEnable, new DoubleWordRegister(this) 1484 .WithValueField(0, 8, out RAC_softwareRxEnable, name: "SWRXEN") 1485 .WithTaggedFlag("CHANNELBUSYEN", 8) 1486 .WithTaggedFlag("TIMDETEN", 9) 1487 .WithTaggedFlag("PREDETEN", 10) 1488 .WithTaggedFlag("FRAMEDETEN", 11) 1489 .WithTaggedFlag("DEMODRXREQEN", 12) 1490 .WithTaggedFlag("PRSRXEN", 13) 1491 .WithReservedBits(14, 18) 1492 .WithWriteCallback((_, __) => RAC_UpdateRadioStateMachine()) 1493 }, 1494 {(long)RadioControllerRegisters.Status, new DoubleWordRegister(this) 1495 .WithValueField(0, 16, FieldMode.Read, valueProviderCallback: _ => RAC_RxEnableMask, name: "RXMASK") 1496 .WithReservedBits(16, 3) 1497 .WithFlag(19, out RAC_forceStateActive, FieldMode.Read, name: "FORCESTATEACTIVE") 1498 .WithFlag(20, out RAC_txAfterFramePending, FieldMode.Read, name: "TXAFTERFRAMEPEND") 1499 .WithFlag(21, out RAC_txAfterFrameActive, FieldMode.Read, name: "TXAFTERFRAMEACTIVE") 1500 .WithFlag(22, out RAC_sequencerInSleeping, FieldMode.Read, name: "SEQSLEEPING") 1501 .WithFlag(23, out RAC_sequencerInDeepSleep, FieldMode.Read, name: "SEQSLEEPDEEP") 1502 .WithEnumField<DoubleWordRegister, RAC_RadioState>(24, 4, FieldMode.Read, valueProviderCallback: _ => RAC_currentRadioState, name: "STATE") 1503 .WithFlag(28, out RAC_sequencerActive, FieldMode.Read, name: "SEQACTIVE") 1504 .WithTaggedFlag("DEMODENS", 29) 1505 .WithFlag(30, FieldMode.Read, valueProviderCallback: _ => RAC_TxEnable, name: "TXENS") 1506 .WithFlag(31, FieldMode.Read, valueProviderCallback: _ => RAC_RxEnable, name: "RXENS") 1507 }, 1508 {(long)RadioControllerRegisters.Status1, new DoubleWordRegister(this) 1509 .WithValueField(0, 8, FieldMode.Read, valueProviderCallback: _ => RAC_TxEnableMask, name: "TXMASK") 1510 .WithReservedBits(8, 24) 1511 }, 1512 {(long)RadioControllerRegisters.Status2, new DoubleWordRegister(this) 1513 .WithEnumField<DoubleWordRegister, RAC_RadioState>(0, 4, FieldMode.Read, valueProviderCallback: _ => RAC_previous1RadioState, name: "PREVSTATE1") 1514 .WithEnumField<DoubleWordRegister, RAC_RadioState>(4, 4, FieldMode.Read, valueProviderCallback: _ => RAC_previous2RadioState, name: "PREVSTATE2") 1515 .WithEnumField<DoubleWordRegister, RAC_RadioState>(8, 4, FieldMode.Read, valueProviderCallback: _ => RAC_previous3RadioState, name: "PREVSTATE3") 1516 .WithEnumField<DoubleWordRegister, RAC_RadioState>(12, 4, FieldMode.Read, valueProviderCallback: _ => RAC_currentRadioState, name: "CURRSTATE") 1517 .WithReservedBits(16, 16) 1518 }, 1519 {(long)RadioControllerRegisters.Control, new DoubleWordRegister(this) 1520 .WithFlag(0, out RAC_forceDisable, writeCallback: (_, value) => { if (value) {RAC_UpdateRadioStateMachine();} }, name: "FORCEDISABLE") 1521 .WithTaggedFlag("PRSTXEN", 1) 1522 // Controls automatic 1523 .WithFlag(2, out RAC_txAfterRx, name: "TXAFTERRX") 1524 .WithTaggedFlag("PRSMODE", 3) 1525 .WithReservedBits(4, 1) 1526 .WithTaggedFlag("PRSCLR", 5) 1527 .WithTaggedFlag("TXPOSTPONE", 6) 1528 .WithTaggedFlag("ACTIVEPOL", 7) 1529 .WithTaggedFlag("PAENPOL", 8) 1530 .WithTaggedFlag("LNAENPOL", 9) 1531 .WithTaggedFlag("PRSRXDIS", 10) 1532 .WithReservedBits(11, 5) 1533 .WithFlag(16, out RAC_prsForceTx, name: "PRSFORCETX") 1534 .WithReservedBits(17, 7) 1535 .WithTaggedFlag("SEQRESET", 24) 1536 .WithFlag(25, out RAC_exitShutdownDisable, FieldMode.Read, name: "EXITSHUTDOWNDIS") 1537 .WithFlag(26, FieldMode.Set, writeCallback: (_, value) => 1538 { 1539 if(value && sequencer.IsHalted) 1540 { 1541 sequencer.VectorTableOffset = SequencerMemoryBaseAddress; 1542 sequencer.SP = machine.SystemBus.ReadDoubleWord(SequencerMemoryBaseAddress); 1543 sequencer.PC = machine.SystemBus.ReadDoubleWord(SequencerMemoryBaseAddress + 0x4); 1544 RAC_SeqTimerStart(); 1545 sequencer.IsHalted = false; 1546 sequencer.Resume(); 1547 this.Log(LogLevel.Noisy, "Sequencer resumed, isHalted={0} VTOR={1:X} SP={2:X} PC={3:X}.", sequencer.IsHalted, sequencer.VectorTableOffset, sequencer.SP, sequencer.PC); 1548 } 1549 }, name: "CPUWAITDIS") 1550 .WithTaggedFlag("SEQCLKDIS", 27) 1551 .WithTaggedFlag("RXOFDIS", 28) 1552 .WithReservedBits(29, 3) 1553 .WithChangeCallback((_, __) => RAC_UpdateRadioStateMachine()) 1554 }, 1555 {(long)RadioControllerRegisters.Command, new DoubleWordRegister(this) 1556 .WithFlag(0, FieldMode.Set, writeCallback: (_, value) => { if (value) {RAC_TxEnable = true;} }, name: "TXEN") 1557 .WithFlag(1, FieldMode.Set, writeCallback: (_, value) => { if (value) {RAC_UpdateRadioStateMachine(RAC_RadioStateMachineSignal.ForceTx);} }, name: "FORCETX") 1558 .WithTaggedFlag("TXONCCA", 2) 1559 .WithFlag(3, FieldMode.Set, writeCallback: (_, value) => { if (value) {RAC_TxEnable = false;} }, name: "CLEARTXEN") 1560 .WithFlag(4, FieldMode.Set, writeCallback: (_, value) => { if (value) {RAC_HandleTxAfterFrameCommand();} }, name: "TXAFTERFRAME") 1561 .WithFlag(5, FieldMode.Set, writeCallback: (_, value) => { if(value) {RAC_TxEnable = false; RAC_txAfterFramePending.Value = false; RAC_UpdateRadioStateMachine(RAC_RadioStateMachineSignal.TxDisable);} }, name: "TXDIS") 1562 .WithFlag(6, FieldMode.Set, writeCallback: (_, value) => { if (value && !RAC_seqStateRxOverflowInterrupt.Value) {RAC_UpdateRadioStateMachine(RAC_RadioStateMachineSignal.ClearRxOverflow);} }, name: "CLEARRXOVERFLOW") 1563 .WithFlag(7, FieldMode.Set, writeCallback: (_, value) => { if (value) {RAC_UpdateRadioStateMachine(RAC_RadioStateMachineSignal.RxCalibration);} }, name: "RXCAL") 1564 .WithFlag(8, FieldMode.Set, writeCallback: (_, value) => { if (value) {RAC_UpdateRadioStateMachine(RAC_RadioStateMachineSignal.RxDisable);} }, name: "RXDIS") 1565 .WithReservedBits(9, 1) 1566 .WithTaggedFlag("FRCWR", 10) 1567 .WithTaggedFlag("FRCRD", 11) 1568 .WithTaggedFlag("PAENSET", 12) 1569 .WithTaggedFlag("PAENCLEAR", 13) 1570 .WithTaggedFlag("LNAENSET", 14) 1571 .WithTaggedFlag("LNAENCLEAR", 15) 1572 .WithReservedBits(16, 14) 1573 .WithTaggedFlag("DEMODENSET", 30) 1574 .WithTaggedFlag("DEMODENCLEAR", 31) 1575 }, 1576 {(long)RadioControllerRegisters.ForceStateTransition, new DoubleWordRegister(this) 1577 .WithEnumField<DoubleWordRegister, RAC_RadioState>(0, 3, out RAC_forceStateTransition, writeCallback: (_, __) => 1578 { 1579 RAC_forceStateActive.Value = true; 1580 }, name: "FORCESTATE") 1581 .WithReservedBits(4, 28) 1582 .WithChangeCallback((_, __) => RAC_UpdateRadioStateMachine()) 1583 }, 1584 {(long)RadioControllerRegisters.Em1pControlAndStatus, new DoubleWordRegister(this) 1585 .WithFlag(0, FieldMode.Set, writeCallback: (_, value) => { RAC_em1pAckPending = true; }, name: "RADIOEM1PMODE") 1586 .WithTaggedFlag("RADIOEM1PMODE", 1) 1587 .WithReservedBits(2, 2) 1588 .WithTaggedFlag("MCUEM1PMODE", 4) 1589 .WithTaggedFlag("MCUEM1PDISSWREQ", 5) 1590 .WithReservedBits(6, 10) 1591 .WithTaggedFlag("RADIOEM1PREQ", 16) 1592 .WithFlag(17, FieldMode.Read, valueProviderCallback: _ => 1593 { 1594 var retValue = RAC_em1pAckPending; 1595 RAC_em1pAckPending = false; 1596 return retValue; 1597 }, name: "RADIOEM1PACK") 1598 //.WithTaggedFlag("RADIOEM1PACK", 17) 1599 .WithTaggedFlag("RADIOEM1PHWREQ", 18) 1600 .WithReservedBits(19, 13) 1601 }, 1602 {(long)RadioControllerRegisters.InterruptFlags, new DoubleWordRegister(this) 1603 .WithFlag(0, out RAC_radioStateChangeInterrupt, name: "STATECHANGEIF") 1604 .WithFlag(1, out RAC_stimerCompareEventInterrupt, name: "STIMCMPEVIF") 1605 .WithTaggedFlag("SEQLOCKUPIF", 2) 1606 .WithTaggedFlag("SEQRESETREQIF", 3) 1607 .WithReservedBits(4, 12) 1608 .WithValueField(16, 8, out RAC_mainCoreSeqInterrupts, name: "SEQIF") 1609 .WithReservedBits(24, 8) 1610 .WithChangeCallback((_, __) => UpdateInterrupts()) 1611 }, 1612 {(long)RadioControllerRegisters.InterruptEnable, new DoubleWordRegister(this) 1613 .WithFlag(0, out RAC_radioStateChangeInterruptEnable, name: "STATECHANGEIEN") 1614 .WithFlag(1, out RAC_stimerCompareEventInterruptEnable, name: "STIMCMPEVIEN") 1615 .WithTaggedFlag("SEQLOCKUPIEN", 2) 1616 .WithTaggedFlag("SEQRESETREQIEN", 3) 1617 .WithReservedBits(4, 12) 1618 .WithValueField(16, 8, out RAC_mainCoreSeqInterruptsEnable, name: "SEQIEN") 1619 .WithReservedBits(24, 8) 1620 .WithChangeCallback((_, __) => UpdateInterrupts()) 1621 }, 1622 {(long)RadioControllerRegisters.SequencerInterruptFlags, new DoubleWordRegister(this) 1623 .WithFlag(0, out RAC_seqRadioStateChangeInterrupt, name: "STATECHANGESEQIF") 1624 .WithFlag(1, out RAC_seqStimerCompareEventInterrupt, name: "STIMCMPEVSEQIF") 1625 .WithFlag(2, out RAC_seqDemodRxRequestClearInterrupt, name: "DEMODRXREQCLRSEQIF") 1626 .WithFlag(3, out RAC_seqPrsEventInterrupt, name: "PRSEVENTSEQIF") 1627 .WithReservedBits(4, 12) 1628 .WithFlag(16, out RAC_seqStateOffInterrupt, name: "STATEOFFIF") 1629 .WithFlag(17, out RAC_seqStateRxWarmInterrupt, changeCallback: (_, value) => { if (!value) {RAC_UpdateRadioStateMachine(RAC_RadioStateMachineSignal.RxWarmIrqCleared); } }, name: "STATERXWARMIF") 1630 .WithFlag(18, out RAC_seqStateRxSearchInterrupt, changeCallback: (_, value) => { if (!value) {RAC_UpdateRadioStateMachine(RAC_RadioStateMachineSignal.RxSearchIrqCleared); } }, name: "STATERXSEARCHIF") 1631 .WithFlag(19, out RAC_seqStateRxFrameInterrupt, changeCallback: (_, value) => { if (!value) {RAC_UpdateRadioStateMachine(RAC_RadioStateMachineSignal.RxFrameIrqCleared); } }, name: "STATERXFRAMEIF") 1632 .WithFlag(20, out RAC_seqStateRxPoweringDownInterrupt, changeCallback: (_, value) => { if (!value) {RAC_UpdateRadioStateMachine(RAC_RadioStateMachineSignal.RxPowerDownIrqCleared); } }, name: "STATERXPDIF") 1633 .WithFlag(21, out RAC_seqStateRx2RxInterrupt, changeCallback: (_, value) => { if (!value) {RAC_UpdateRadioStateMachine(RAC_RadioStateMachineSignal.Rx2RxIrqCleared); } }, name: "STATERX2RXIF") 1634 .WithFlag(22, out RAC_seqStateRxOverflowInterrupt, name: "STATERXOVERFLOWIF") 1635 .WithFlag(23, out RAC_seqStateRx2TxInterrupt, changeCallback: (_, value) => { if (!value) {RAC_UpdateRadioStateMachine(RAC_RadioStateMachineSignal.Rx2TxIrqCleared); } }, name: "STATERX2TXIF") 1636 .WithFlag(24, out RAC_seqStateTxWarmInterrupt, changeCallback: (_, value) => { if (!value) {RAC_UpdateRadioStateMachine(RAC_RadioStateMachineSignal.TxWarmIrqCleared);} }, name: "STATETXWARMIF") 1637 .WithFlag(25, out RAC_seqStateTxInterrupt, changeCallback: (_, value) => { if (!value) {RAC_UpdateRadioStateMachine(RAC_RadioStateMachineSignal.TxIrqCleared); } }, name: "STATETXIF") 1638 .WithFlag(26, out RAC_seqStateTxPoweringDownInterrupt, changeCallback: (_, value) => { if (!value) {RAC_UpdateRadioStateMachine(RAC_RadioStateMachineSignal.TxPowerDownIrqCleared); } }, name: "STATETXPDIF") 1639 .WithFlag(27, out RAC_seqStateTx2RxInterrupt, changeCallback: (_, value) => { if (!value) {RAC_UpdateRadioStateMachine(RAC_RadioStateMachineSignal.Tx2RxIrqCleared); } }, name: "STATETX2RXIF") 1640 .WithFlag(28, out RAC_seqStateTx2TxInterrupt, changeCallback: (_, value) => { if (!value) {RAC_UpdateRadioStateMachine(RAC_RadioStateMachineSignal.Tx2TxIrqCleared); } }, name: "STATETX2TXIF") 1641 .WithFlag(29, out RAC_seqStateShutDownInterrupt, name: "STATESHUTDOWNIF") 1642 .WithReservedBits(30, 2) 1643 .WithChangeCallback((_, __) => UpdateInterrupts()) 1644 }, 1645 {(long)RadioControllerRegisters.SequencerInterruptEnable, new DoubleWordRegister(this) 1646 .WithFlag(0, out RAC_seqRadioStateChangeInterruptEnable, name: "STATECHANGESEQIEN") 1647 .WithFlag(1, out RAC_seqStimerCompareEventInterruptEnable, name: "STIMCMPEVSEQIEN") 1648 .WithFlag(2, out RAC_seqDemodRxRequestClearInterruptEnable, name: "DEMODRXREQCLRSEQIEN") 1649 .WithFlag(3, out RAC_seqPrsEventInterruptEnable, name: "PRSEVENTSEQIEN") 1650 .WithReservedBits(4, 12) 1651 .WithFlag(16, out RAC_seqStateOffInterruptEnable, name: "STATEOFFIEN") 1652 .WithFlag(17, out RAC_seqStateRxWarmInterruptEnable, name: "STATERXWARMIEN") 1653 .WithFlag(18, out RAC_seqStateRxSearchInterruptEnable, name: "STATERXSEARCHIEN") 1654 .WithFlag(19, out RAC_seqStateRxFrameInterruptEnable, name: "STATERXFRAMEIEN") 1655 .WithFlag(20, out RAC_seqStateRxPoweringDownInterruptEnable, name: "STATERXPDIEN") 1656 .WithFlag(21, out RAC_seqStateRx2RxInterruptEnable, name: "STATERX2RXIEN") 1657 .WithFlag(22, out RAC_seqStateRxOverflowInterruptEnable, name: "STATERXOVERFLOWIEN") 1658 .WithFlag(23, out RAC_seqStateRx2TxInterruptEnable, name: "STATERX2TXIEN") 1659 .WithFlag(24, out RAC_seqStateTxWarmInterruptEnable, name: "STATETXWARMIEN") 1660 .WithFlag(25, out RAC_seqStateTxInterruptEnable, name: "STATETXIEN") 1661 .WithFlag(26, out RAC_seqStateTxPoweringDownInterruptEnable, name: "STATETXPDIEN") 1662 .WithFlag(27, out RAC_seqStateTx2RxInterruptEnable, name: "STATETX2RXIEN") 1663 .WithFlag(28, out RAC_seqStateTx2TxInterruptEnable, name: "STATETX2TXIEN") 1664 .WithFlag(29, out RAC_seqStateShutDownInterruptEnable, name: "STATESHUTDOWNIEN") 1665 .WithReservedBits(30, 2) 1666 .WithChangeCallback((_, __) => UpdateInterrupts()) 1667 }, 1668 {(long)RadioControllerRegisters.SequencerControl, new DoubleWordRegister(this) 1669 .WithEnumField<DoubleWordRegister, RAC_SeqTimerCompareAction>(0, 1, out RAC_seqTimerCompareAction, name: "COMPACT") 1670 .WithEnumField<DoubleWordRegister, RAC_SeqTimerCompareInvalidMode>(1, 2, out RAC_seqTimerCompareInvalidMode, name: "COMPINVALMODE") 1671 .WithFlag(3, out RAC_seqTimerCompareRelative, name: "RELATIVE") 1672 .WithFlag(4, out RAC_seqTimerAlwaysRun, name: "STIMERALWAYSRUN") 1673 .WithTaggedFlag("STIMERDEBUGRUN", 5) 1674 .WithTaggedFlag("STATEDEBUGRUN", 6) 1675 .WithReservedBits(7, 17) 1676 .WithTaggedFlag("SWIRQ", 24) 1677 .WithTaggedFlag("SWIRQ", 25) 1678 .WithReservedBits(26, 6) 1679 }, 1680 {(long)RadioControllerRegisters.SequencerTimerValue, new DoubleWordRegister(this) 1681 .WithValueField(0, 16, FieldMode.Read, valueProviderCallback: _ => RAC_SeqTimerValue, name: "STIMER") 1682 .WithReservedBits(16, 16) 1683 }, 1684 {(long)RadioControllerRegisters.SequencerTimerCompareValue, new DoubleWordRegister(this) 1685 .WithValueField(0, 15, out RAC_seqTimerCompareValue, writeCallback: (_, value) => { RAC_SeqTimerLimit = (ushort)value; }, name: "STIMERCOMP") 1686 .WithReservedBits(16, 16) 1687 }, 1688 {(long)RadioControllerRegisters.SequencerPrescaler, new DoubleWordRegister(this, 0x7) 1689 .WithValueField(0, 7, out RAC_seqTimerPrescaler, name: "STIMERPRESC") 1690 .WithReservedBits(7, 25) 1691 }, 1692 {(long)RadioControllerRegisters.Storage0, new DoubleWordRegister(this) 1693 .WithValueField(0, 32, out RAC_seqStorage[0], name: "SR0") 1694 }, 1695 {(long)RadioControllerRegisters.Storage1, new DoubleWordRegister(this) 1696 .WithValueField(0, 32, out RAC_seqStorage[1], name: "SR1") 1697 }, 1698 {(long)RadioControllerRegisters.Storage2, new DoubleWordRegister(this) 1699 .WithValueField(0, 32, out RAC_seqStorage[2], name: "SR2") 1700 }, 1701 {(long)RadioControllerRegisters.Storage3, new DoubleWordRegister(this) 1702 .WithValueField(0, 32, out RAC_seqStorage[3], name: "SR3") 1703 }, 1704 {(long)RadioControllerRegisters.RadioFrequencyStatus, new DoubleWordRegister(this) 1705 .WithFlag(0, out RAC_paRampingDone, FieldMode.Read, name: "MODRAMPUPDONE") 1706 .WithReservedBits(1, 31) 1707 }, 1708 {(long)RadioControllerRegisters.PowerAmplifierEnableControl, new DoubleWordRegister(this) 1709 .WithReservedBits(0, 8) 1710 .WithFlag(8, valueProviderCallback: _ => { return RAC_PaOutputLevelRamping; }, writeCallback: (_, value) => { RAC_PaOutputLevelRamping = value; }, name: "PARAMP") 1711 .WithReservedBits(9, 7) 1712 .WithTaggedFlag("INVRAMPCLK", 16) 1713 .WithTaggedFlag("DIV2RAMPCLK", 17) 1714 .WithTaggedFlag("RSTDIV2RAMPCLK", 18) 1715 .WithReservedBits(19, 13) 1716 }, 1717 {(long)RadioControllerRegisters.Scratch0, new DoubleWordRegister(this) 1718 .WithValueField(0, 32, out RAC_scratch[0], name: "SCRATCH0") 1719 }, 1720 {(long)RadioControllerRegisters.Scratch1, new DoubleWordRegister(this) 1721 .WithValueField(0, 32, out RAC_scratch[1], name: "SCRATCH1") 1722 }, 1723 {(long)RadioControllerRegisters.Scratch2, new DoubleWordRegister(this) 1724 .WithValueField(0, 32, out RAC_scratch[2], name: "SCRATCH2") 1725 }, 1726 {(long)RadioControllerRegisters.Scratch3, new DoubleWordRegister(this) 1727 .WithValueField(0, 32, out RAC_scratch[3], name: "SCRATCH3") 1728 }, 1729 {(long)RadioControllerRegisters.Scratch4, new DoubleWordRegister(this) 1730 .WithValueField(0, 32, out RAC_scratch[4], name: "SCRATCH4") 1731 }, 1732 {(long)RadioControllerRegisters.Scratch5, new DoubleWordRegister(this) 1733 .WithValueField(0, 32, out RAC_scratch[5], name: "SCRATCH5") 1734 }, 1735 {(long)RadioControllerRegisters.Scratch6, new DoubleWordRegister(this) 1736 .WithValueField(0, 32, out RAC_scratch[6], name: "SCRATCH6") 1737 }, 1738 {(long)RadioControllerRegisters.Scratch7, new DoubleWordRegister(this) 1739 .WithValueField(0, 32, out RAC_scratch[7], name: "SCRATCH7") 1740 }, 1741 {(long)RadioControllerRegisters.RadioFrequencyLock0, new DoubleWordRegister(this, 0x80000000) 1742 .WithTag("SYNTHLODIVFREQCTRL", 0, 10) 1743 .WithReservedBits(10, 6) 1744 .WithTaggedFlag("RACIFPGAEN", 16) 1745 .WithFlag(17, valueProviderCallback: _ => !RAC_0DbmSupport, writeCallback: (_, value) => {RAC_0DbmSupport = !value;}, name: "RACTX0DBM") 1746 .WithFlag(18, valueProviderCallback: _ => !RAC_10DbmSupport, writeCallback: (_, value) => {RAC_10DbmSupport = !value;}, name: "RACTX10DBM") 1747 .WithFlag(19, valueProviderCallback: _ => !RAC_20DbmSupport, writeCallback: (_, value) => {RAC_20DbmSupport = !value;}, name: "RACTX20DBM") 1748 .WithReservedBits(20, 1) 1749 .WithTaggedFlag("MODEMHADM", 21) 1750 .WithTaggedFlag("FRCCONVMODE", 22) 1751 .WithTaggedFlag("FRCPAUSING", 23) 1752 .WithTaggedFlag("MODEMANTSWENABLE", 24) 1753 .WithTaggedFlag("MODEMLRBLE", 25) 1754 .WithTaggedFlag("MODEMDSSS", 26) 1755 .WithTaggedFlag("MODEMDEC1", 27) 1756 .WithTaggedFlag("MODEMMODFORMAT", 28) 1757 .WithTaggedFlag("MODEMDUALSYNC", 29) 1758 .WithTaggedFlag("MODEMANTDIVMODE", 30) 1759 .WithFlag(31, out RAC_unlocked, name: "UNLOCKED") 1760 }, 1761 }; 1762 1763 return new DoubleWordRegisterCollection(this, registerDictionary); 1764 } 1765 BuildProtocolTimerRegistersCollection()1766 private DoubleWordRegisterCollection BuildProtocolTimerRegistersCollection() 1767 { 1768 var registerDictionary = new Dictionary<long, DoubleWordRegister> 1769 { 1770 {(long)ProtocolTimerRegisters.Control, new DoubleWordRegister(this) 1771 .WithReservedBits(0, 1) 1772 .WithTaggedFlag("DEBUGRUN", 1) 1773 .WithTaggedFlag("DMACLRACT", 2) 1774 .WithReservedBits(3, 1) 1775 .WithTaggedFlag("OSMEN", 4) 1776 .WithTaggedFlag("ZEROSTARTEN", 5) 1777 .WithReservedBits(6, 2) 1778 .WithEnumField<DoubleWordRegister, PROTIMER_PreCounterSource>(8, 2, out PROTIMER_preCounterSource, changeCallback: (_, value) => 1779 { 1780 switch(value) 1781 { 1782 case PROTIMER_PreCounterSource.None: 1783 PROTIMER_Enabled = false; 1784 break; 1785 case PROTIMER_PreCounterSource.Clock: 1786 // wait for the start command to actually start the proTimer 1787 break; 1788 default: 1789 PROTIMER_Enabled = false; 1790 this.Log(LogLevel.Error, "Invalid PRECNTSRC value"); 1791 break; 1792 } 1793 }, name: "PRECNTSRC") 1794 .WithReservedBits(10, 2) 1795 .WithEnumField<DoubleWordRegister, PROTIMER_BaseCounterSource>(12, 2, out PROTIMER_baseCounterSource, changeCallback: (_, value) => 1796 { 1797 switch(value) 1798 { 1799 case PROTIMER_BaseCounterSource.Unused0: 1800 case PROTIMER_BaseCounterSource.Unused1: 1801 this.Log(LogLevel.Error, "Invalid BASECNTSRC value"); 1802 break; 1803 } 1804 }, name: "BASECNTSRC") 1805 .WithReservedBits(14, 2) 1806 .WithEnumField<DoubleWordRegister, PROTIMER_WrapCounterSource>(16, 2, out PROTIMER_wrapCounterSource, changeCallback: (_, value) => 1807 { 1808 switch(value) 1809 { 1810 case PROTIMER_WrapCounterSource.Unused: 1811 this.Log(LogLevel.Error, "Invalid WRAPCNTSRC value"); 1812 break; 1813 } 1814 }, name: "WRAPCNTSRC") 1815 .WithReservedBits(18, 2) 1816 .WithEnumField<DoubleWordRegister, PROTIMER_TimeoutCounterSource>(20, 2, out PROTIMER_timeoutCounter[0].source, name: "TOUT0SRC") 1817 .WithEnumField<DoubleWordRegister, PROTIMER_TimeoutCounterSource>(22, 2, out PROTIMER_timeoutCounter[0].syncSource, name: "TOUT0SYNCSRC") 1818 .WithEnumField<DoubleWordRegister, PROTIMER_TimeoutCounterSource>(24, 2, out PROTIMER_timeoutCounter[1].source, name: "TOUT1SRC") 1819 .WithEnumField<DoubleWordRegister, PROTIMER_TimeoutCounterSource>(26, 2, out PROTIMER_timeoutCounter[1].syncSource, name: "TOUT1SYNCSRC") 1820 .WithEnumField<DoubleWordRegister, PROTIMER_RepeatMode>(28, 1, out PROTIMER_timeoutCounter[0].mode, name: "TOUT0MODE") 1821 .WithEnumField<DoubleWordRegister, PROTIMER_RepeatMode>(29, 1, out PROTIMER_timeoutCounter[1].mode, name: "TOUT1MODE") 1822 .WithReservedBits(30, 2) 1823 }, 1824 {(long)ProtocolTimerRegisters.Command, new DoubleWordRegister(this) 1825 .WithFlag(0, FieldMode.Set, writeCallback: (_, value) => { if(PROTIMER_preCounterSource.Value == PROTIMER_PreCounterSource.Clock && value) { PROTIMER_Enabled = true;} }, name: "START") 1826 .WithTaggedFlag("RTCSYNCSTART", 1) 1827 .WithFlag(2, FieldMode.Set, writeCallback: (_, value) => { if(value) { PROTIMER_Enabled = false;} }, name: "STOP") 1828 .WithReservedBits(3, 1) 1829 .WithFlag(4, FieldMode.Set, writeCallback: (_, value) => { if(value) PROTIMER_timeoutCounter[0].Start(); }, name: "TOUT0START") 1830 .WithFlag(5, FieldMode.Set, writeCallback: (_, value) => { if(value) PROTIMER_timeoutCounter[0].Stop(); }, name: "TOUT0STOP") 1831 .WithFlag(6, FieldMode.Set, writeCallback: (_, value) => { if(value) PROTIMER_timeoutCounter[1].Start(); }, name: "TOUT1START") 1832 .WithFlag(7, FieldMode.Set, writeCallback: (_, value) => { if(value) PROTIMER_timeoutCounter[1].Stop(); }, name: "TOUT1STOP") 1833 .WithFlag(8, FieldMode.Set, writeCallback: (_, value) => { if(value) PROTIMER_txRequestState = PROTIMER_TxRxRequestState.Idle; RAC_UpdateRadioStateMachine(); }, name: "FORCETXIDLE") 1834 .WithFlag(9, FieldMode.Set, writeCallback: (_, value) => { if(value) PROTIMER_rxRequestState = PROTIMER_TxRxRequestState.Idle; RAC_UpdateRadioStateMachine(); }, name: "FORCERXIDLE") 1835 .WithTaggedFlag("FORCERXRX", 10) 1836 .WithReservedBits(11, 5) 1837 .WithFlag(16, FieldMode.Set, writeCallback: (_, value) => { if (value) PROTIMER_ListenBeforeTalkStartCommand(); }, name: "LBTSTART") 1838 .WithFlag(17, FieldMode.Set, writeCallback: (_, value) => { if (value) PROTIMER_ListenBeforeTalkPauseCommand(); }, name: "LBTPAUSE") 1839 .WithFlag(18, FieldMode.Set, writeCallback: (_, value) => { if(value) PROTIMER_ListenBeforeTalkStopCommand(); }, name: "LBTSTOP") 1840 .WithReservedBits(19, 13) 1841 .WithWriteCallback((_, __) => { PROTIMER_HandleChangedParams(); UpdateInterrupts(); }) 1842 }, 1843 {(long)ProtocolTimerRegisters.Status, new DoubleWordRegister(this) 1844 .WithFlag(0, FieldMode.Read, valueProviderCallback: _ => PROTIMER_Enabled, name: "RUNNING") 1845 .WithFlag(1, out PROTIMER_listenBeforeTalkSync, FieldMode.Read, name: "LBTSYNC") 1846 .WithFlag(2, out PROTIMER_listenBeforeTalkRunning, FieldMode.Read, name: "LBTRUNNING") 1847 .WithFlag(3, out PROTIMER_listenBeforeTalkPaused, FieldMode.Read, name: "LBTPAUSED") 1848 .WithFlag(4, out PROTIMER_timeoutCounter[0].running, FieldMode.Read, name: "TOUT0RUNNING") 1849 .WithFlag(5, out PROTIMER_timeoutCounter[0].synchronizing, FieldMode.Read, name: "TOUT0SYNC") 1850 .WithFlag(6, out PROTIMER_timeoutCounter[1].running, FieldMode.Read, name: "TOUT1RUNNING") 1851 .WithFlag(7, out PROTIMER_timeoutCounter[1].synchronizing, FieldMode.Read, name: "TOUT1SYNC") 1852 .WithFlag(8, out PROTIMER_captureCompareChannel[0].captureValid, FieldMode.Read, name: "ICV0") 1853 .WithFlag(9, out PROTIMER_captureCompareChannel[1].captureValid, FieldMode.Read, name: "ICV1") 1854 .WithFlag(10, out PROTIMER_captureCompareChannel[2].captureValid, FieldMode.Read, name: "ICV2") 1855 .WithFlag(11, out PROTIMER_captureCompareChannel[3].captureValid, FieldMode.Read, name: "ICV3") 1856 .WithFlag(12, out PROTIMER_captureCompareChannel[4].captureValid, FieldMode.Read, name: "ICV4") 1857 .WithFlag(13, out PROTIMER_captureCompareChannel[5].captureValid, FieldMode.Read, name: "ICV5") 1858 .WithFlag(14, out PROTIMER_captureCompareChannel[6].captureValid, FieldMode.Read, name: "ICV6") 1859 .WithFlag(15, out PROTIMER_captureCompareChannel[7].captureValid, FieldMode.Read, name: "ICV7") 1860 .WithReservedBits(16, 16) 1861 }, 1862 {(long)ProtocolTimerRegisters.PreCounterValue, new DoubleWordRegister(this) 1863 .WithValueField(0, 16, valueProviderCallback: _ => PROTIMER_PreCounterValue, writeCallback: (_, value) => PROTIMER_PreCounterValue = (uint)value, name: "PRECNT") 1864 .WithReservedBits(16, 16) 1865 .WithWriteCallback((_, __) => PROTIMER_HandleChangedParams()) 1866 }, 1867 {(long)ProtocolTimerRegisters.BaseCounterValue, new DoubleWordRegister(this) 1868 .WithValueField(0, 16, valueProviderCallback: _ => PROTIMER_BaseCounterValue, writeCallback: (_, value) => PROTIMER_BaseCounterValue = (ushort)value, name: "BASECNT") 1869 .WithReservedBits(16, 16) 1870 .WithWriteCallback((_, __) => PROTIMER_HandleChangedParams()) 1871 }, 1872 {(long)ProtocolTimerRegisters.WrapCounterValue, new DoubleWordRegister(this) 1873 .WithValueField(0, 32, valueProviderCallback: _ => PROTIMER_WrapCounterValue, writeCallback: (_, value) => PROTIMER_WrapCounterValue = (uint)value, name: "WRAPCNT") 1874 .WithWriteCallback((_, __) => PROTIMER_HandleChangedParams()) 1875 }, 1876 {(long)ProtocolTimerRegisters.BaseAndPreCounterValues, new DoubleWordRegister(this) 1877 .WithValueField(0, 16, FieldMode.Read, valueProviderCallback: _ => PROTIMER_PreCounterValue, name: "PRECNTV") 1878 .WithValueField(16, 16, FieldMode.Read, valueProviderCallback: _ => PROTIMER_BaseCounterValue, name: "BASECNTV") 1879 .WithWriteCallback((_, __) => PROTIMER_HandleChangedParams()) 1880 }, 1881 {(long)ProtocolTimerRegisters.PreCounterTopValue, new DoubleWordRegister(this, 0xFFFF00) 1882 .WithValueField(0, 8, out PROTIMER_preCounterTopFractional, name: "PRECNTTOPFRAC") 1883 .WithValueField(8, 16, out PROTIMER_preCounterTopInteger, name: "PRECNTTOP") 1884 .WithReservedBits(24, 8) 1885 .WithWriteCallback((_, __) => PROTIMER_HandleChangedParams()) 1886 }, 1887 {(long)ProtocolTimerRegisters.BaseCounterTopValue, new DoubleWordRegister(this, 0xFFFF) 1888 .WithValueField(0, 16, out PROTIMER_baseCounterTop, name: "BASECNTTOP") 1889 .WithReservedBits(16, 16) 1890 .WithWriteCallback((_, __) => PROTIMER_HandleChangedParams()) 1891 }, 1892 {(long)ProtocolTimerRegisters.WrapCounterTopValue, new DoubleWordRegister(this, 0xFFFFFFFF) 1893 .WithValueField(0, 32, out PROTIMER_wrapCounterTop, name: "WRAPCNTTOP") 1894 .WithWriteCallback((_, __) => PROTIMER_HandleChangedParams()) 1895 }, 1896 {(long)ProtocolTimerRegisters.LatchedWrapCounterValue, new DoubleWordRegister(this) 1897 .WithTag("LWRAPCNT", 0, 32) 1898 }, 1899 {(long)ProtocolTimerRegisters.PreCounterTopAdjustValue, new DoubleWordRegister(this) 1900 .WithTag("PRECNTTOPADJ", 0, 16) 1901 .WithReservedBits(16, 16) 1902 }, 1903 {(long)ProtocolTimerRegisters.Timeout0Counter, new DoubleWordRegister(this) 1904 .WithValueField(0, 16, out PROTIMER_timeoutCounter[0].preCounter, name: "TOUT0PCNT") 1905 .WithValueField(16, 16, out PROTIMER_timeoutCounter[0].counter, name: "TOUT0CNT") 1906 }, 1907 {(long)ProtocolTimerRegisters.Timeout0CounterTop, new DoubleWordRegister(this, 0x00FF00FF) 1908 .WithValueField(0, 16, out PROTIMER_timeoutCounter[0].preCounterTop, name: "TOUT0CNTTOP") 1909 .WithValueField(16, 16, out PROTIMER_timeoutCounter[0].counterTop, name: "TOUT0PCNTTOP") 1910 }, 1911 {(long)ProtocolTimerRegisters.Timeout0Compare, new DoubleWordRegister(this) 1912 .WithValueField(0, 16, out PROTIMER_timeoutCounter[0].preCounterCompare, name: "TOUT0PCNTCOMP") 1913 .WithValueField(16, 16, out PROTIMER_timeoutCounter[0].counterCompare, name: "TOUT0CNTCOMP") 1914 }, 1915 {(long)ProtocolTimerRegisters.Timeout1Counter, new DoubleWordRegister(this) 1916 .WithValueField(0, 16, out PROTIMER_timeoutCounter[1].preCounter, name: "TOUT1PCNT") 1917 .WithValueField(16, 16, out PROTIMER_timeoutCounter[1].counter, name: "TOUT1CNT") 1918 }, 1919 {(long)ProtocolTimerRegisters.Timeout1CounterTop, new DoubleWordRegister(this, 0x00FF00FF) 1920 .WithValueField(0, 16, out PROTIMER_timeoutCounter[1].preCounterTop, name: "TOUT1CNTTOP") 1921 .WithValueField(16, 16, out PROTIMER_timeoutCounter[1].counterTop, name: "TOUT1PCNTTOP") 1922 }, 1923 {(long)ProtocolTimerRegisters.Timeout1Compare, new DoubleWordRegister(this) 1924 .WithValueField(0, 16, out PROTIMER_timeoutCounter[1].preCounterCompare, name: "TOUT1PCNTCOMP") 1925 .WithValueField(16, 16, out PROTIMER_timeoutCounter[1].counterCompare, name: "TOUT1CNTCOMP") 1926 }, 1927 {(long)ProtocolTimerRegisters.InterruptFlags, new DoubleWordRegister(this) 1928 .WithFlag(0, out PROTIMER_preCounterOverflowInterrupt, name: "PRECNTOFIF") 1929 .WithFlag(1, out PROTIMER_baseCounterOverflowInterrupt, name: "BASECNTOFIF") 1930 .WithFlag(2, out PROTIMER_wrapCounterOverflowInterrupt, name: "WRAPCNTOFIF") 1931 .WithReservedBits(3, 1) 1932 .WithFlag(4, out PROTIMER_timeoutCounter[0].underflowInterrupt, name: "TOUT0IF") 1933 .WithFlag(5, out PROTIMER_timeoutCounter[1].underflowInterrupt, name: "TOUT1IF") 1934 .WithFlag(6, out PROTIMER_timeoutCounter[0].matchInterrupt, name: "TOUT0MATCHIF") 1935 .WithFlag(7, out PROTIMER_timeoutCounter[1].matchInterrupt, name: "TOUT1MATCHIF") 1936 .WithFlag(8, out PROTIMER_captureCompareChannel[0].interrupt, name: "CC0IF") 1937 .WithFlag(9, out PROTIMER_captureCompareChannel[1].interrupt, name: "CC1IF") 1938 .WithFlag(10, out PROTIMER_captureCompareChannel[2].interrupt, name: "CC2IF") 1939 .WithFlag(11, out PROTIMER_captureCompareChannel[3].interrupt, name: "CC3IF") 1940 .WithFlag(12, out PROTIMER_captureCompareChannel[4].interrupt, name: "CC4IF") 1941 .WithFlag(13, out PROTIMER_captureCompareChannel[5].interrupt, name: "CC5IF") 1942 .WithFlag(14, out PROTIMER_captureCompareChannel[6].interrupt, name: "CC6IF") 1943 .WithFlag(15, out PROTIMER_captureCompareChannel[7].interrupt, name: "CC7IF") 1944 .WithFlag(16, out PROTIMER_captureCompareChannel[0].overflowInterrupt, name: "COF0IF") 1945 .WithFlag(17, out PROTIMER_captureCompareChannel[1].overflowInterrupt, name: "COF1IF") 1946 .WithFlag(18, out PROTIMER_captureCompareChannel[2].overflowInterrupt, name: "COF2IF") 1947 .WithFlag(19, out PROTIMER_captureCompareChannel[3].overflowInterrupt, name: "COF3IF") 1948 .WithFlag(20, out PROTIMER_captureCompareChannel[4].overflowInterrupt, name: "COF4IF") 1949 .WithFlag(21, out PROTIMER_captureCompareChannel[5].overflowInterrupt, name: "COF5IF") 1950 .WithFlag(22, out PROTIMER_captureCompareChannel[6].overflowInterrupt, name: "COF6IF") 1951 .WithFlag(23, out PROTIMER_captureCompareChannel[7].overflowInterrupt, name: "COF7IF") 1952 .WithFlag(24, out PROTIMER_listenBeforeTalkSuccessInterrupt, name: "LBTSUCCESSIF") 1953 .WithFlag(25, out PROTIMER_listenBeforeTalkFailureInterrupt, name: "LBTFAILUREIF") 1954 .WithTaggedFlag("LBTPAUSEDIF", 26) 1955 .WithFlag(27, out PROTIMER_listenBeforeTalkRetryInterrupt, name: "LBTRETRYIF") 1956 .WithTaggedFlag("RTCCSYNCHEDIF", 28) 1957 .WithFlag(29, out PROTIMER_listenBeforeTalkTimeoutCounterMatchInterrupt, name: "TOUT0MATCHLBTIF") 1958 .WithReservedBits(30, 2) 1959 .WithChangeCallback((_, __) => UpdateInterrupts()) 1960 }, 1961 {(long)ProtocolTimerRegisters.InterruptEnable, new DoubleWordRegister(this) 1962 .WithFlag(0, out PROTIMER_preCounterOverflowInterruptEnable, name: "PRECNTOFIEN") 1963 .WithFlag(1, out PROTIMER_baseCounterOverflowInterruptEnable, name: "BASECNTOFIEN") 1964 .WithFlag(2, out PROTIMER_wrapCounterOverflowInterruptEnable, name: "WRAPCNTOFIEN") 1965 .WithReservedBits(3, 1) 1966 .WithFlag(4, out PROTIMER_timeoutCounter[0].underflowInterruptEnable, name: "TOUT0IEN") 1967 .WithFlag(5, out PROTIMER_timeoutCounter[1].underflowInterruptEnable, name: "TOUT1IEN") 1968 .WithFlag(6, out PROTIMER_timeoutCounter[0].matchInterruptEnable, name: "TOUT0MATCHIEN") 1969 .WithFlag(7, out PROTIMER_timeoutCounter[1].matchInterruptEnable, name: "TOUT1MATCHIEN") 1970 .WithFlag(8, out PROTIMER_captureCompareChannel[0].interruptEnable, name: "CC0IEN") 1971 .WithFlag(9, out PROTIMER_captureCompareChannel[1].interruptEnable, name: "CC1IEN") 1972 .WithFlag(10, out PROTIMER_captureCompareChannel[2].interruptEnable, name: "CC2IEN") 1973 .WithFlag(11, out PROTIMER_captureCompareChannel[3].interruptEnable, name: "CC3IEN") 1974 .WithFlag(12, out PROTIMER_captureCompareChannel[4].interruptEnable, name: "CC4IEN") 1975 .WithFlag(13, out PROTIMER_captureCompareChannel[5].interruptEnable, name: "CC5IEN") 1976 .WithFlag(14, out PROTIMER_captureCompareChannel[6].interruptEnable, name: "CC6IEN") 1977 .WithFlag(15, out PROTIMER_captureCompareChannel[7].interruptEnable, name: "CC7IEN") 1978 .WithFlag(16, out PROTIMER_captureCompareChannel[0].overflowInterruptEnable, name: "COF0IEN") 1979 .WithFlag(17, out PROTIMER_captureCompareChannel[1].overflowInterruptEnable, name: "COF1IEN") 1980 .WithFlag(18, out PROTIMER_captureCompareChannel[2].overflowInterruptEnable, name: "COF2IEN") 1981 .WithFlag(19, out PROTIMER_captureCompareChannel[3].overflowInterruptEnable, name: "COF3IEN") 1982 .WithFlag(20, out PROTIMER_captureCompareChannel[4].overflowInterruptEnable, name: "COF4IEN") 1983 .WithFlag(21, out PROTIMER_captureCompareChannel[5].overflowInterruptEnable, name: "COF5IEN") 1984 .WithFlag(22, out PROTIMER_captureCompareChannel[6].overflowInterruptEnable, name: "COF6IEN") 1985 .WithFlag(23, out PROTIMER_captureCompareChannel[7].overflowInterruptEnable, name: "COF7IEN") 1986 .WithFlag(24, out PROTIMER_listenBeforeTalkSuccessInterruptEnable, name: "LBTSUCCESSIEN") 1987 .WithFlag(25, out PROTIMER_listenBeforeTalkFailureInterruptEnable, name: "LBTFAILUREIEN") 1988 .WithTaggedFlag("LBTPAUSEDIEN", 26) 1989 .WithFlag(27, out PROTIMER_listenBeforeTalkRetryInterruptEnable, name: "LBTRETRYIEN") 1990 .WithTaggedFlag("RTCCSYNCHEDIEN", 28) 1991 .WithFlag(29, out PROTIMER_listenBeforeTalkTimeoutCounterMatchInterruptEnable, name: "TOUT0MATCHLBTIEN") 1992 .WithReservedBits(30, 2) 1993 .WithChangeCallback((_, __) => UpdateInterrupts()) 1994 }, 1995 {(long)ProtocolTimerRegisters.SequencerInterruptFlags, new DoubleWordRegister(this) 1996 .WithFlag(0, out PROTIMER_seqPreCounterOverflowInterrupt, name: "PRECNTOFSEQIF") 1997 .WithFlag(1, out PROTIMER_seqBaseCounterOverflowInterrupt, name: "BASECNTOFSEQIF") 1998 .WithFlag(2, out PROTIMER_seqWrapCounterOverflowInterrupt, name: "WRAPCNTOFSEQIF") 1999 .WithReservedBits(3, 1) 2000 .WithFlag(4, out PROTIMER_timeoutCounter[0].seqUnderflowInterrupt, name: "TOUT0SEQIF") 2001 .WithFlag(5, out PROTIMER_timeoutCounter[1].seqUnderflowInterrupt, name: "TOUT1SEQIF") 2002 .WithFlag(6, out PROTIMER_timeoutCounter[0].seqMatchInterrupt, name: "TOUT0MATCHSEQIF") 2003 .WithFlag(7, out PROTIMER_timeoutCounter[1].seqMatchInterrupt, name: "TOUT1MATCHSEQIF") 2004 .WithFlag(8, out PROTIMER_captureCompareChannel[0].seqInterrupt, name: "CC0SEQIF") 2005 .WithFlag(9, out PROTIMER_captureCompareChannel[1].seqInterrupt, name: "CC1SEQIF") 2006 .WithFlag(10, out PROTIMER_captureCompareChannel[2].seqInterrupt, name: "CC2SEQIF") 2007 .WithFlag(11, out PROTIMER_captureCompareChannel[3].seqInterrupt, name: "CC3SEQIF") 2008 .WithFlag(12, out PROTIMER_captureCompareChannel[4].seqInterrupt, name: "CC4SEQIF") 2009 .WithFlag(13, out PROTIMER_captureCompareChannel[5].seqInterrupt, name: "CC5SEQIF") 2010 .WithFlag(14, out PROTIMER_captureCompareChannel[6].seqInterrupt, name: "CC6SEQIF") 2011 .WithFlag(15, out PROTIMER_captureCompareChannel[7].seqInterrupt, name: "CC7SEQIF") 2012 .WithFlag(16, out PROTIMER_captureCompareChannel[0].seqOverflowInterrupt, name: "COF0SEQIF") 2013 .WithFlag(17, out PROTIMER_captureCompareChannel[1].seqOverflowInterrupt, name: "COF1SEQIF") 2014 .WithFlag(18, out PROTIMER_captureCompareChannel[2].seqOverflowInterrupt, name: "COF2SEQIF") 2015 .WithFlag(19, out PROTIMER_captureCompareChannel[3].seqOverflowInterrupt, name: "COF3SEQIF") 2016 .WithFlag(20, out PROTIMER_captureCompareChannel[4].seqOverflowInterrupt, name: "COF4SEQIF") 2017 .WithFlag(21, out PROTIMER_captureCompareChannel[5].seqOverflowInterrupt, name: "COF5SEQIF") 2018 .WithFlag(22, out PROTIMER_captureCompareChannel[6].seqOverflowInterrupt, name: "COF6SEQIF") 2019 .WithFlag(23, out PROTIMER_captureCompareChannel[7].seqOverflowInterrupt, name: "COF7SEQIF") 2020 .WithFlag(24, out PROTIMER_seqListenBeforeTalkSuccessInterrupt, name: "LBTSUCCESSSEQIF") 2021 .WithFlag(25, out PROTIMER_seqListenBeforeTalkFailureInterrupt, name: "LBTFAILURESEQIF") 2022 .WithTaggedFlag("LBTPAUSEDIF", 26) 2023 .WithFlag(27, out PROTIMER_seqListenBeforeTalkRetryInterrupt, name: "LBTRETRYSEQIF") 2024 .WithTaggedFlag("RTCCSYNCHEDSEQIF", 28) 2025 .WithFlag(29, out PROTIMER_seqListenBeforeTalkTimeoutCounterMatchInterrupt, name: "TOUT0MATCHLBTSEQIF") 2026 .WithReservedBits(30, 2) 2027 .WithChangeCallback((_, __) => UpdateInterrupts()) 2028 }, 2029 {(long)ProtocolTimerRegisters.SequencerInterruptEnable, new DoubleWordRegister(this) 2030 .WithFlag(0, out PROTIMER_seqPreCounterOverflowInterruptEnable, name: "PRECNTOFSEQIEN") 2031 .WithFlag(1, out PROTIMER_seqBaseCounterOverflowInterruptEnable, name: "BASECNTOFSEQIEN") 2032 .WithFlag(2, out PROTIMER_seqWrapCounterOverflowInterruptEnable, name: "WRAPCNTOFSEQIEN") 2033 .WithReservedBits(3, 1) 2034 .WithFlag(4, out PROTIMER_timeoutCounter[0].seqUnderflowInterruptEnable, name: "TOUT0SEQIEN") 2035 .WithFlag(5, out PROTIMER_timeoutCounter[1].seqUnderflowInterruptEnable, name: "TOUT1SEQIEN") 2036 .WithFlag(6, out PROTIMER_timeoutCounter[0].seqMatchInterruptEnable, name: "TOUT0MATCHSEQIEN") 2037 .WithFlag(7, out PROTIMER_timeoutCounter[1].seqMatchInterruptEnable, name: "TOUT1MATCHSEQIEN") 2038 .WithFlag(8, out PROTIMER_captureCompareChannel[0].seqInterruptEnable, name: "CC0SEQIEN") 2039 .WithFlag(9, out PROTIMER_captureCompareChannel[1].seqInterruptEnable, name: "CC1SEQIEN") 2040 .WithFlag(10, out PROTIMER_captureCompareChannel[2].seqInterruptEnable, name: "CC2SEQIEN") 2041 .WithFlag(11, out PROTIMER_captureCompareChannel[3].seqInterruptEnable, name: "CC3SEQIEN") 2042 .WithFlag(12, out PROTIMER_captureCompareChannel[4].seqInterruptEnable, name: "CC4SEQIEN") 2043 .WithFlag(13, out PROTIMER_captureCompareChannel[5].seqInterruptEnable, name: "CC5SEQIEN") 2044 .WithFlag(14, out PROTIMER_captureCompareChannel[6].seqInterruptEnable, name: "CC6SEQIEN") 2045 .WithFlag(15, out PROTIMER_captureCompareChannel[7].seqInterruptEnable, name: "CC7SEQIEN") 2046 .WithFlag(16, out PROTIMER_captureCompareChannel[0].seqOverflowInterruptEnable, name: "COF0SEQIEN") 2047 .WithFlag(17, out PROTIMER_captureCompareChannel[1].seqOverflowInterruptEnable, name: "COF1SEQIEN") 2048 .WithFlag(18, out PROTIMER_captureCompareChannel[2].seqOverflowInterruptEnable, name: "COF2SEQIEN") 2049 .WithFlag(19, out PROTIMER_captureCompareChannel[3].seqOverflowInterruptEnable, name: "COF3SEQIEN") 2050 .WithFlag(20, out PROTIMER_captureCompareChannel[4].seqOverflowInterruptEnable, name: "COF4SEQIEN") 2051 .WithFlag(21, out PROTIMER_captureCompareChannel[5].seqOverflowInterruptEnable, name: "COF5SEQIEN") 2052 .WithFlag(22, out PROTIMER_captureCompareChannel[6].seqOverflowInterruptEnable, name: "COF6SEQIEN") 2053 .WithFlag(23, out PROTIMER_captureCompareChannel[7].seqOverflowInterruptEnable, name: "COF7SEQIEN") 2054 .WithFlag(24, out PROTIMER_seqListenBeforeTalkSuccessInterruptEnable, name: "LBTSUCCESSSEQIEN") 2055 .WithFlag(25, out PROTIMER_seqListenBeforeTalkFailureInterruptEnable, name: "LBTFAILURESEQIEN") 2056 .WithTaggedFlag("LBTPAUSEDIEN", 26) 2057 .WithFlag(27, out PROTIMER_seqListenBeforeTalkRetryInterruptEnable, name: "LBTRETRYSEQIEN") 2058 .WithTaggedFlag("RTCCSYNCHEDSEQIEN", 28) 2059 .WithFlag(29, out PROTIMER_seqListenBeforeTalkTimeoutCounterMatchInterruptEnable, name: "TOUT0MATCHLBTSEQIEN") 2060 .WithReservedBits(30, 2) 2061 .WithChangeCallback((_, __) => UpdateInterrupts()) 2062 }, 2063 {(long)ProtocolTimerRegisters.RxControl, new DoubleWordRegister(this) 2064 .WithEnumField<DoubleWordRegister, PROTIMER_Event>(0, 5, out PROTIMER_rxSetEvent1, name: "RXSETEVENT1") 2065 .WithReservedBits(5, 3) 2066 .WithEnumField<DoubleWordRegister, PROTIMER_Event>(8, 5, out PROTIMER_rxSetEvent2, name: "RXSETEVENT2") 2067 .WithReservedBits(13, 3) 2068 .WithEnumField<DoubleWordRegister, PROTIMER_Event>(16, 5, out PROTIMER_rxClearEvent1, name: "RXCLREVENT1") 2069 .WithReservedBits(21, 3) 2070 .WithEnumField<DoubleWordRegister, PROTIMER_Event>(24, 5, out PROTIMER_rxClearEvent2, name: "RXCLREVENT2") 2071 .WithReservedBits(29, 3) 2072 .WithChangeCallback((_, __) => PROTIMER_UpdateRxRequestState()) 2073 }, 2074 {(long)ProtocolTimerRegisters.TxControl, new DoubleWordRegister(this) 2075 .WithEnumField<DoubleWordRegister, PROTIMER_Event>(0, 5, out PROTIMER_txSetEvent1, name: "TXSETEVENT1") 2076 .WithReservedBits(5, 3) 2077 .WithEnumField<DoubleWordRegister, PROTIMER_Event>(8, 5, out PROTIMER_txSetEvent2, name: "TXSETEVENT2") 2078 .WithReservedBits(13, 19) 2079 .WithChangeCallback((_, __) => PROTIMER_UpdateTxRequestState()) 2080 }, 2081 {(long)ProtocolTimerRegisters.ListenBeforeTalkWaitControl, new DoubleWordRegister(this) 2082 .WithValueField(0, 4, out PROTIMER_listenBeforeTalkStartExponent, name: "STARTEXP") 2083 .WithValueField(4, 4, out PROTIMER_listenBeforeTalkMaxExponent, name: "MAXEXP") 2084 .WithValueField(8, 5, out PROTIMER_ccaDelay, name: "CCADELAY") 2085 .WithReservedBits(13, 3) 2086 .WithValueField(16, 4, out PROTIMER_ccaRepeat, name: "CCAREPEAT") 2087 .WithFlag(20, out PROTIMER_fixedBackoff, name: "FIXEDBACKOFF") 2088 .WithReservedBits(21, 3) 2089 .WithValueField(24, 4, out PROTIMER_retryLimit, name: "RETRYLIMIT") 2090 .WithReservedBits(28, 4) 2091 }, 2092 {(long)ProtocolTimerRegisters.ListenBeforeTalkState, new DoubleWordRegister(this) 2093 .WithTag("TOUT0PCNT", 0, 16) 2094 .WithTag("TOUT0CNT", 16, 16) 2095 }, 2096 {(long)ProtocolTimerRegisters.PseudoRandomGeneratorValue, new DoubleWordRegister(this) 2097 .WithValueField(0, 16, valueProviderCallback: _ => {return (ushort)random.Next();}, name: "RANDOM") 2098 .WithReservedBits(16, 16) 2099 }, 2100 {(long)ProtocolTimerRegisters.ListenBeforeTalkState1, new DoubleWordRegister(this) 2101 .WithValueField(0, 4, out PROTIMER_ccaCounter, name: "CCACNT") 2102 .WithValueField(4, 4, out PROTIMER_listenBeforeTalkExponent, name: "EXP") 2103 .WithValueField(8, 4, out PROTIMER_listenBeforeTalkRetryCounter, name: "RETRYCNT") 2104 .WithReservedBits(12, 20) 2105 }, 2106 }; 2107 2108 var startOffset = (long)ProtocolTimerRegisters.CaptureCompareChannel0Control; 2109 var controlOffset = (long)ProtocolTimerRegisters.CaptureCompareChannel0Control - startOffset; 2110 var preOffset = (long)ProtocolTimerRegisters.CaptureCompareChannel0PreValue - startOffset; 2111 var baseOffset = (long)ProtocolTimerRegisters.CaptureCompareChannel0BaseValue - startOffset; 2112 var wrapOffset = (long)ProtocolTimerRegisters.CaptureCompareChannel0WrapValue - startOffset; 2113 var blockSize = (long)ProtocolTimerRegisters.CaptureCompareChannel1Control - (long)ProtocolTimerRegisters.CaptureCompareChannel0Control; 2114 for(var index = 0; index < PROTIMER_NumberOfCaptureCompareChannels; index++) 2115 { 2116 var i = index; 2117 // CaptureCompareChannel_n_Control 2118 registerDictionary.Add(startOffset + blockSize*i + controlOffset, 2119 new DoubleWordRegister(this) 2120 .WithFlag(0, out PROTIMER_captureCompareChannel[i].enable, name: "ENABLE") 2121 .WithEnumField<DoubleWordRegister, PROTIMER_CaptureCompareMode>(1, 1, out PROTIMER_captureCompareChannel[i].mode, name: "CCMODE") 2122 .WithFlag(2, out PROTIMER_captureCompareChannel[i].preMatchEnable, name: "PREMATCHEN") 2123 .WithFlag(3, out PROTIMER_captureCompareChannel[i].baseMatchEnable, name: "BASEMATCHEN") 2124 .WithFlag(4, out PROTIMER_captureCompareChannel[i].wrapMatchEnable, name: "WRAPMATCHEN") 2125 .WithTaggedFlag("OIST", 5) 2126 .WithTaggedFlag("OUTINV", 6) 2127 .WithReservedBits(7, 1) 2128 .WithTag("MOA", 8, 2) 2129 .WithTag("OFOA", 10, 2) 2130 .WithTag("OFSEL", 12, 2) 2131 .WithTaggedFlag("PRSCONF", 14) 2132 .WithReservedBits(15, 6) 2133 .WithEnumField<DoubleWordRegister, PROTIMER_CaptureInputSource>(21, 4, out PROTIMER_captureCompareChannel[i].captureInputSource, name: "INSEL") 2134 .WithTag("ICEDGE", 25, 2) 2135 .WithReservedBits(27, 5) 2136 .WithWriteCallback((_, __) => PROTIMER_UpdateCompareTimer(i)) 2137 ); 2138 // CaptureCompareChannel_n_Pre 2139 registerDictionary.Add(startOffset + blockSize*i + preOffset, 2140 new DoubleWordRegister(this) 2141 .WithValueField(0, 16, out PROTIMER_captureCompareChannel[i].preValue, 2142 writeCallback: (_, __) => 2143 { 2144 PROTIMER_captureCompareChannel[i].captureValid.Value = false; 2145 PROTIMER_UpdateCompareTimer(i); 2146 }, 2147 valueProviderCallback: _ => 2148 { 2149 PROTIMER_captureCompareChannel[i].captureValid.Value = false; 2150 return PROTIMER_captureCompareChannel[i].preValue.Value; 2151 }, name: "PRE") 2152 .WithReservedBits(16, 16) 2153 ); 2154 // CaptureCompareChannel_n_Base 2155 registerDictionary.Add(startOffset + blockSize*i + baseOffset, 2156 new DoubleWordRegister(this) 2157 .WithValueField(0, 16, out PROTIMER_captureCompareChannel[i].baseValue, 2158 writeCallback: (_, __) => { PROTIMER_captureCompareChannel[i].captureValid.Value = false; }, 2159 valueProviderCallback: _ => 2160 { 2161 PROTIMER_captureCompareChannel[i].captureValid.Value = false; 2162 return PROTIMER_captureCompareChannel[i].baseValue.Value; 2163 }, name: "BASE") 2164 .WithReservedBits(16, 16) 2165 ); 2166 // CaptureCompareChannel_n_Wrap 2167 registerDictionary.Add(startOffset + blockSize*i + wrapOffset, 2168 new DoubleWordRegister(this) 2169 .WithValueField(0, 32, out PROTIMER_captureCompareChannel[i].wrapValue, 2170 writeCallback: (_, __) => { PROTIMER_captureCompareChannel[i].captureValid.Value = false; }, 2171 valueProviderCallback: _ => 2172 { 2173 PROTIMER_captureCompareChannel[i].captureValid.Value = false; 2174 return PROTIMER_captureCompareChannel[i].wrapValue.Value; 2175 }, name: "WRAP") 2176 ); 2177 } 2178 2179 return new DoubleWordRegisterCollection(this, registerDictionary); 2180 } 2181 BuildModulatorAndDemodulatorRegistersCollection()2182 private DoubleWordRegisterCollection BuildModulatorAndDemodulatorRegistersCollection() 2183 { 2184 var registerDictionary = new Dictionary<long, DoubleWordRegister> 2185 { 2186 {(long)ModulatorAndDemodulatorRegisters.InterruptFlags, new DoubleWordRegister(this, 0x00000008) 2187 .WithFlag(0, out MODEM_txFrameSentInterrupt, name: "TXFRAMESENTIF") 2188 .WithFlag(1, out MODEM_txSyncSentInterrupt, name: "TXSYNCSENTIF") 2189 .WithFlag(2, out MODEM_txPreambleSentInterrupt, name: "TXPRESENTIF") 2190 .WithFlag(3, FieldMode.Read, valueProviderCallback: _ => MODEM_TxRampingDoneInterrupt, name: "TXRAMPDONEIF") 2191 .WithTaggedFlag("LDTNOARRIF", 4) 2192 .WithTaggedFlag("PHDSADETIF", 5) 2193 .WithTaggedFlag("PHYUNCODEDETIF", 6) 2194 .WithTaggedFlag("PHYCODEDETIF", 7) 2195 .WithTaggedFlag("RXTIMDETIF", 8) 2196 .WithFlag(9, out MODEM_rxPreambleDetectedInterrupt, name: "RXPREDETIF") 2197 .WithFlag(10, out MODEM_rxFrameWithSyncWord0DetectedInterrupt, name: "RXFRAMEDET0IF") 2198 .WithFlag(11, out MODEM_rxFrameWithSyncWord1DetectedInterrupt, name: "RXFRAMEDET1IF") 2199 .WithTaggedFlag("RXTIMLOSTIF", 12) 2200 .WithFlag(13, out MODEM_rxPreambleLostInterrupt, name: "RXPRELOSTIF") 2201 .WithTaggedFlag("RXFRAMEDETOFIF", 14) 2202 .WithTaggedFlag("RXTIMNFIF", 15) 2203 .WithTaggedFlag("FRCTIMOUTIF", 16) 2204 .WithTaggedFlag("ETSIF", 17) 2205 .WithTaggedFlag("CFGANTPATTRDIF", 18) 2206 .WithTaggedFlag("RXRESTARTRSSIMAPREIF", 19) 2207 .WithTaggedFlag("RXRESTARTRSSIMASYNCIF", 20) 2208 .WithTaggedFlag("SQDETIF", 21) 2209 .WithTaggedFlag("SQNOTDETIF", 22) 2210 .WithTaggedFlag("ANTDIVRDYIF", 23) 2211 .WithTaggedFlag("SOFTRESETDONEIF", 24) 2212 .WithTaggedFlag("SQPRENOTDETIF", 25) 2213 .WithTaggedFlag("SQFRAMENOTDETIF", 26) 2214 .WithTaggedFlag("SQAFCOUTOFBANDIF", 27) 2215 .WithTaggedFlag("SIDETIF", 28) 2216 .WithTaggedFlag("SIRESETIF", 29) 2217 .WithReservedBits(30, 2) 2218 .WithChangeCallback((_, __) => UpdateInterrupts()) 2219 }, 2220 {(long)ModulatorAndDemodulatorRegisters.InterruptEnable, new DoubleWordRegister(this) 2221 .WithFlag(0, out MODEM_txFrameSentInterruptEnable, name: "TXFRAMESENTIEN") 2222 .WithFlag(1, out MODEM_txSyncSentInterruptEnable, name: "TXSYNCSENTIEN") 2223 .WithFlag(2, out MODEM_txPreambleSentInterruptEnable, name: "TXPRESENTIEN") 2224 .WithFlag(3, out MODEM_txRampingDoneInterruptEnable, name: "TXRAMPDONEIEN") 2225 .WithTaggedFlag("LDTNOARRIEN", 4) 2226 .WithTaggedFlag("PHDSADETIEN", 5) 2227 .WithTaggedFlag("PHYUNCODEDETIEN", 6) 2228 .WithTaggedFlag("PHYCODEDETIEN", 7) 2229 .WithTaggedFlag("RXTIMDETIEN", 8) 2230 .WithFlag(9, out MODEM_rxPreambleDetectedInterruptEnable, name: "RXPREDETIEN") 2231 .WithFlag(10, out MODEM_rxFrameWithSyncWord0DetectedInterruptEnable, name: "RXFRAMEDET0IEN") 2232 .WithFlag(11, out MODEM_rxFrameWithSyncWord1DetectedInterruptEnable, name: "RXFRAMEDET1IEN") 2233 .WithTaggedFlag("RXTIMLOSTIEN", 12) 2234 .WithFlag(13, out MODEM_rxPreambleLostInterruptEnable, name: "RXPRELOSTIEN") 2235 .WithTaggedFlag("RXFRAMEDETOFIEN", 14) 2236 .WithTaggedFlag("RXTIMNFIEN", 15) 2237 .WithTaggedFlag("FRCTIMOUTIEN", 16) 2238 .WithTaggedFlag("ETSIEN", 17) 2239 .WithTaggedFlag("CFGANTPATTRDIEN", 18) 2240 .WithTaggedFlag("RXRESTARTRSSIMAPREIEN", 19) 2241 .WithTaggedFlag("RXRESTARTRSSIMASYNCIEN", 20) 2242 .WithTaggedFlag("SQDETIEN", 21) 2243 .WithTaggedFlag("SQNOTDETIEN", 22) 2244 .WithTaggedFlag("ANTDIVRDYIEN", 23) 2245 .WithTaggedFlag("SOFTRESETDONEIEN", 24) 2246 .WithTaggedFlag("SQPRENOTDETIEN", 25) 2247 .WithTaggedFlag("SQFRAMENOTDETIEN", 26) 2248 .WithTaggedFlag("SQAFCOUTOFBANDIEN", 27) 2249 .WithTaggedFlag("SIDETIEN", 28) 2250 .WithTaggedFlag("SIRESETIEN", 29) 2251 .WithReservedBits(30, 2) 2252 .WithChangeCallback((_, __) => UpdateInterrupts()) 2253 }, 2254 {(long)ModulatorAndDemodulatorRegisters.SequencerInterruptFlags, new DoubleWordRegister(this, 0x00000008) 2255 .WithFlag(0, out MODEM_seqTxFrameSentInterrupt, name: "TXFRAMESENTSEQIF") 2256 .WithFlag(1, out MODEM_seqTxSyncSentInterrupt, name: "TXSYNCSENTSEQIF") 2257 .WithFlag(2, out MODEM_seqTxPreambleSentInterrupt, name: "TXPRESENTSEQIF") 2258 .WithFlag(3, FieldMode.Read, valueProviderCallback: _ => MODEM_TxRampingDoneInterrupt, name: "TXRAMPDONESEQIF") 2259 .WithTaggedFlag("LDTNOARRSEQIF", 4) 2260 .WithTaggedFlag("PHDSADETSEQIF", 5) 2261 .WithTaggedFlag("PHYUNCODEDETSEQIF", 6) 2262 .WithTaggedFlag("PHYCODEDETSEQIF", 7) 2263 .WithTaggedFlag("RXTIMDETSEQIF", 8) 2264 .WithFlag(9, out MODEM_seqRxPreambleDetectedInterrupt, name: "RXPREDETSEQIF") 2265 .WithFlag(10, out MODEM_seqRxFrameWithSyncWord0DetectedInterrupt, name: "RXFRAMEDET0SEQIF") 2266 .WithFlag(11, out MODEM_seqRxFrameWithSyncWord1DetectedInterrupt, name: "RXFRAMEDET1SEQIF") 2267 .WithTaggedFlag("RXTIMLOSTSEQIF", 12) 2268 .WithFlag(13, out MODEM_seqRxPreambleLostInterrupt, name: "RXPRELOSTSEQIF") 2269 .WithTaggedFlag("RXFRAMEDETOFSEQIF", 14) 2270 .WithTaggedFlag("RXTIMNFSEQIF", 15) 2271 .WithTaggedFlag("FRCTIMOUTSEQIF", 16) 2272 .WithTaggedFlag("ETSSEQIF", 17) 2273 .WithTaggedFlag("CFGANTPATTRDSEQIF", 18) 2274 .WithTaggedFlag("RXRESTARTRSSIMAPRESEQIF", 19) 2275 .WithTaggedFlag("RXRESTARTRSSIMASYNCSEQIF", 20) 2276 .WithTaggedFlag("SQDETSEQIF", 21) 2277 .WithTaggedFlag("SQNOTDETSEQIF", 22) 2278 .WithTaggedFlag("ANTDIVRDYSEQIF", 23) 2279 .WithTaggedFlag("SOFTRESETDONESEQIF", 24) 2280 .WithTaggedFlag("SQPRENOTDETSEQIF", 25) 2281 .WithTaggedFlag("SQFRAMENOTDETSEQIF", 26) 2282 .WithTaggedFlag("SQAFCOUTOFBANDSEQIF", 27) 2283 .WithTaggedFlag("SIDETSEQIF", 28) 2284 .WithTaggedFlag("SIRESETSEQIF", 29) 2285 .WithReservedBits(30, 2) 2286 .WithChangeCallback((_, __) => UpdateInterrupts()) 2287 }, 2288 {(long)ModulatorAndDemodulatorRegisters.SequencerInterruptEnable, new DoubleWordRegister(this) 2289 .WithFlag(0, out MODEM_seqTxFrameSentInterruptEnable, name: "TXFRAMESENTSEQIEN") 2290 .WithFlag(1, out MODEM_seqTxSyncSentInterruptEnable, name: "TXSYNCSENTSEQIEN") 2291 .WithFlag(2, out MODEM_seqTxPreambleSentInterruptEnable, name: "TXPRESENTSEQIEN") 2292 .WithFlag(3, out MODEM_seqTxRampingDoneInterruptEnable, name: "TXRAMPDONESEQIEN") 2293 .WithTaggedFlag("LDTNOARRSEQIEN", 4) 2294 .WithTaggedFlag("PHDSADETSEQIEN", 5) 2295 .WithTaggedFlag("PHYUNCODEDETSEQIEN", 6) 2296 .WithTaggedFlag("PHYCODEDETSEQIEN", 7) 2297 .WithTaggedFlag("RXTIMDETSEQIEN", 8) 2298 .WithFlag(9, out MODEM_seqRxPreambleDetectedInterruptEnable, name: "RXPREDETSEQIEN") 2299 .WithFlag(10, out MODEM_seqRxFrameWithSyncWord0DetectedInterruptEnable, name: "RXFRAMEDET0SEQIEN") 2300 .WithFlag(11, out MODEM_seqRxFrameWithSyncWord1DetectedInterruptEnable, name: "RXFRAMEDET1SEQIEN") 2301 .WithTaggedFlag("RXTIMLOSTSEQIEN", 12) 2302 .WithFlag(13, out MODEM_seqRxPreambleLostInterruptEnable, name: "RXPRELOSTSEQIEN") 2303 .WithTaggedFlag("RXFRAMEDETOFSEQIEN", 14) 2304 .WithTaggedFlag("RXTIMNFSEQIEN", 15) 2305 .WithTaggedFlag("FRCTIMOUTSEQIEN", 16) 2306 .WithTaggedFlag("ETSSEQIEN", 17) 2307 .WithTaggedFlag("CFGANTPATTRDSEQIEN", 18) 2308 .WithTaggedFlag("RXRESTARTRSSIMAPRESEQIEN", 19) 2309 .WithTaggedFlag("RXRESTARTRSSIMASYNCSEQIEN", 20) 2310 .WithTaggedFlag("SQDETSEQIEN", 21) 2311 .WithTaggedFlag("SQNOTDETSEQIEN", 22) 2312 .WithTaggedFlag("ANTDIVRDYSEQIEN", 23) 2313 .WithTaggedFlag("SOFTRESETDONESEQIEN", 24) 2314 .WithTaggedFlag("SQPRENOTDETSEQIEN", 25) 2315 .WithTaggedFlag("SQFRAMENOTDETSEQIEN", 26) 2316 .WithTaggedFlag("SQAFCOUTOFBANDSEQIEN", 27) 2317 .WithTaggedFlag("SIDETSEQIEN", 28) 2318 .WithTaggedFlag("SIRESETSEQIEN", 29) 2319 .WithReservedBits(30, 2) 2320 .WithChangeCallback((_, __) => UpdateInterrupts()) 2321 }, 2322 {(long)ModulatorAndDemodulatorRegisters.Control1, new DoubleWordRegister(this) 2323 .WithValueField(0, 5, out MODEM_syncBits, name: "SYNCBITS") 2324 .WithTag("SYNCERRORS", 5, 4) 2325 .WithFlag(9, out MODEM_dualSync, name: "DUALSYNC") 2326 .WithFlag(10, out MODEM_txSync, name: "TXSYNC") 2327 .WithFlag(11, out MODEM_syncData, name: "SYNCDATA") 2328 .WithTaggedFlag("SYNC1INV", 12) 2329 .WithReservedBits(13, 1) 2330 .WithTag("COMPMODE", 14, 2) 2331 .WithTag("RESYNCPER", 16, 4) 2332 .WithTag("PHASEDEMOD", 20, 2) 2333 .WithTag("FREQOFFESTPER", 22, 3) 2334 .WithTag("FREQOFFESTLIM", 25, 7) 2335 }, 2336 {(long)ModulatorAndDemodulatorRegisters.Preamble, new DoubleWordRegister(this) 2337 .WithValueField(16, 16, out MODEM_txBases, name: "TXBASES") 2338 .WithTag("PREWNDERRORS", 14, 2) 2339 .WithTaggedFlag("PREAMBDETEN", 13) 2340 .WithTaggedFlag("SYNCSYMB4FSK", 12) 2341 .WithTaggedFlag("DSSSPRE", 11) 2342 .WithTag("PREERRORS", 7, 4) 2343 .WithTaggedFlag("PRESYMB4FSK", 6) 2344 .WithValueField(4, 2, out MODEM_baseBits, name: "BASEBITS") 2345 .WithTag("BASE", 0, 4) 2346 }, 2347 {(long)ModulatorAndDemodulatorRegisters.SyncWord0, new DoubleWordRegister(this) 2348 .WithValueField(0, 32, out MODEM_syncWord0, name: "SYNC0") 2349 }, 2350 {(long)ModulatorAndDemodulatorRegisters.SyncWord1, new DoubleWordRegister(this) 2351 .WithValueField(0, 32, out MODEM_syncWord1, name: "SYNC1") 2352 }, 2353 {(long)ModulatorAndDemodulatorRegisters.Command, new DoubleWordRegister(this) 2354 .WithTaggedFlag("PRESTOP", 0) 2355 .WithTaggedFlag("CHPWRACCUCLR", 1) 2356 .WithReservedBits(2, 1) 2357 .WithTaggedFlag("AFCTXLOCK", 3) 2358 .WithTaggedFlag("AFCTXCLEAR", 4) 2359 .WithTaggedFlag("AFCRXCLEAR", 5) 2360 .WithReservedBits(6, 26) 2361 }, 2362 {(long)ModulatorAndDemodulatorRegisters.Status, new DoubleWordRegister(this) 2363 .WithEnumField<DoubleWordRegister, MODEM_DemodulatorState>(0, 3, out MODEM_demodulatorState, FieldMode.Read, name: "DEMODSTATE") 2364 .WithTaggedFlag("BCRCFEDSADET", 3) 2365 .WithFlag(4, out MODEM_frameDetectedId, FieldMode.Read, name: "FRAMEDETID") 2366 .WithTaggedFlag("ANTSEL", 5) 2367 .WithTaggedFlag("TIMSEQINV", 6) 2368 .WithTaggedFlag("TIMLOSTCAUSE", 7) 2369 .WithTaggedFlag("DSADETECTED", 8) 2370 .WithTaggedFlag("DSAFREQESTDONE", 9) 2371 .WithTaggedFlag("VITERBIDEMODTIMDET", 10) 2372 .WithTaggedFlag("VITERBIDEMODFRAMEDET", 11) 2373 .WithTag("STAMPSTATE", 12, 3) 2374 .WithTaggedFlag("TRECSDSAADET", 15) 2375 .WithTag("CORR", 16, 8) 2376 .WithTag("WEAKSYMBOLS", 24, 8) 2377 }, 2378 {(long)ModulatorAndDemodulatorRegisters.RampingControl, new DoubleWordRegister(this) 2379 .WithValueField(0, 4, out MODEM_rampRate0, name: "RAMPRATE0") 2380 .WithValueField(4, 4, out MODEM_rampRate1, name: "RAMPRATE1") 2381 .WithValueField(8, 4, out MODEM_rampRate2, name: "RAMPRATE2") 2382 .WithFlag(12, out MODEM_rampDisable, name: "RAMPDIS") 2383 .WithReservedBits(13, 3) 2384 .WithValueField(16, 8, out MODEM_rampValue, name: "RAMPVAL") 2385 .WithReservedBits(24, 8) 2386 }, 2387 {(long)ModulatorAndDemodulatorRegisters.ViterbiDemodulator, new DoubleWordRegister(this) 2388 .WithFlag(0, out MODEM_viterbiDemodulatorEnable, name: "VTDEMODEN") 2389 .WithTaggedFlag("HARDDECISION", 1) 2390 .WithTag("VITERBIKSI1", 2, 7) 2391 .WithTag("VITERBIKSI2", 9, 7) 2392 .WithTag("VITERBIKSI3", 16, 7) 2393 .WithTaggedFlag("SYNTHAFC", 23) 2394 .WithTag("CORRCYCLE", 24, 4) 2395 .WithTag("CORRSTPSIZE", 28, 4) 2396 }, 2397 }; 2398 return new DoubleWordRegisterCollection(this, registerDictionary); 2399 } 2400 BuildAutomaticGainControlRegistersCollection()2401 private DoubleWordRegisterCollection BuildAutomaticGainControlRegistersCollection() 2402 { 2403 var registerDictionary = new Dictionary<long, DoubleWordRegister> 2404 { 2405 {(long)AutomaticGainControlRegisters.Status0, new DoubleWordRegister(this) 2406 .WithTag("GAININDEX", 0, 6) 2407 .WithTaggedFlag("RFPKDLOWLAT", 6) 2408 .WithTaggedFlag("RFPKDHILAT", 7) 2409 .WithTaggedFlag("IFPKDLOLAT", 8) 2410 .WithTaggedFlag("IFPKDHILAT", 9) 2411 .WithFlag(10, out AGC_cca, FieldMode.Read, name: "CCA") 2412 .WithTaggedFlag("GAINOK", 11) 2413 .WithTag("PGAINDEX", 12, 4) 2414 .WithTag("LNAINDEX", 16, 4) 2415 .WithTag("PNIINDEX", 20, 5) 2416 .WithTag("ADCINDEX", 25, 2) 2417 .WithReservedBits(27, 5) 2418 }, 2419 {(long)AutomaticGainControlRegisters.Status1, new DoubleWordRegister(this) 2420 .WithTag("CHPWR", 0, 8) 2421 .WithReservedBits(8, 1) 2422 .WithTag("FASTLOOPSTATE", 9, 4) 2423 .WithTag("CFLOOPSTATE", 13, 2) 2424 .WithEnumField<DoubleWordRegister, AGC_RssiState>(15, 3, out AGC_rssiState, name: "RSSISTATE") 2425 .WithTag("CFLOOPSTATE", 18, 12) 2426 .WithReservedBits(30, 2) 2427 }, 2428 {(long)AutomaticGainControlRegisters.InterruptFlags, new DoubleWordRegister(this) 2429 .WithFlag(0, out AGC_rssiValidInterrupt, name: "RSSIVALIDIF") 2430 .WithReservedBits(1, 1) 2431 .WithFlag(2, out AGC_ccaInterrupt, name: "CCAIF") 2432 .WithTaggedFlag("RSSIPOSSTEPIF", 3) 2433 .WithTaggedFlag("RSSINEGSTEPIF", 4) 2434 .WithFlag(5, out AGC_rssiDoneInterrupt, name: "RSSIDONEIF") 2435 .WithTaggedFlag("SHORTRSSIPOSSTEPIF", 6) 2436 .WithReservedBits(7, 1) 2437 .WithTaggedFlag("RFPKDPRDDONEIF", 8) 2438 .WithTaggedFlag("RFPKDCNTDONEIF", 9) 2439 .WithFlag(10, out AGC_rssiHighInterrupt, name: "RSSIHIGHIF") 2440 .WithFlag(11, out AGC_rssiLowInterrupt, name: "RSSILOWIF") 2441 .WithFlag(12, out AGC_ccaNotDetectedInterrupt, name: "CCANODETIF") 2442 .WithTaggedFlag("GAINBELOWGAINTHDIF", 13) 2443 .WithTaggedFlag("GAINUPDATEFRZIF", 14) 2444 .WithReservedBits(15, 17) 2445 }, 2446 {(long)AutomaticGainControlRegisters.InterruptEnable, new DoubleWordRegister(this) 2447 .WithFlag(0, out AGC_rssiValidInterruptEnable, name: "RSSIVALIDIEN") 2448 .WithReservedBits(1, 1) 2449 .WithFlag(2, out AGC_ccaInterruptEnable, name: "CCAIEN") 2450 .WithTaggedFlag("RSSIPOSSTEPIEN", 3) 2451 .WithTaggedFlag("RSSINEGSTEPIEN", 4) 2452 .WithFlag(5, out AGC_rssiDoneInterruptEnable, name: "RSSIDONEIEN") 2453 .WithTaggedFlag("SHORTRSSIPOSSTEPIEN", 6) 2454 .WithReservedBits(7, 1) 2455 .WithTaggedFlag("RFPKDPRDDONEIEN", 8) 2456 .WithTaggedFlag("RFPKDCNTDONEIEN", 9) 2457 .WithFlag(10, out AGC_rssiHighInterruptEnable, name: "RSSIHIGHIEN") 2458 .WithFlag(11, out AGC_rssiLowInterruptEnable, name: "RSSILOWIEN") 2459 .WithFlag(12, out AGC_ccaNotDetectedInterruptEnable, name: "CCANODETIEN") 2460 .WithTaggedFlag("GAINBELOWGAINTHDIEN", 13) 2461 .WithTaggedFlag("GAINUPDATEFRZIEN", 14) 2462 .WithReservedBits(15, 17) 2463 }, 2464 {(long)AutomaticGainControlRegisters.SequencerInterruptFlags, new DoubleWordRegister(this) 2465 .WithFlag(0, out AGC_seqRssiValidInterrupt, name: "RSSIVALIDSEQIF") 2466 .WithReservedBits(1, 1) 2467 .WithFlag(2, out AGC_seqCcaInterrupt, name: "CCASEQIF") 2468 .WithTaggedFlag("RSSIPOSSTEPSEQIF", 3) 2469 .WithTaggedFlag("RSSINEGSTEPSEQIF", 4) 2470 .WithFlag(5, out AGC_seqRssiDoneInterrupt, name: "RSSIDONESEQIF") 2471 .WithTaggedFlag("SHORTRSSIPOSSTEPSEQIF", 6) 2472 .WithReservedBits(7, 1) 2473 .WithTaggedFlag("RFPKDPRDDONESEQIF", 8) 2474 .WithTaggedFlag("RFPKDCNTDONESEQIF", 9) 2475 .WithFlag(10, out AGC_seqRssiHighInterrupt, name: "RSSIHIGHSEQIF") 2476 .WithFlag(11, out AGC_seqRssiLowInterrupt, name: "RSSILOWSEQIF") 2477 .WithFlag(12, out AGC_seqCcaNotDetectedInterrupt, name: "CCANODETSEQIF") 2478 .WithTaggedFlag("GAINBELOWGAINTHDSEQIF", 13) 2479 .WithTaggedFlag("GAINUPDATEFRZSEQIF", 14) 2480 .WithReservedBits(15, 17) 2481 }, 2482 {(long)AutomaticGainControlRegisters.SequencerInterruptEnable, new DoubleWordRegister(this) 2483 .WithFlag(0, out AGC_seqRssiValidInterruptEnable, name: "RSSIVALIDSEQIEN") 2484 .WithReservedBits(1, 1) 2485 .WithFlag(2, out AGC_seqCcaInterruptEnable, name: "CCASEQIEN") 2486 .WithTaggedFlag("RSSIPOSSTEPSEQIEN", 3) 2487 .WithTaggedFlag("RSSINEGSTEPSEQIEN", 4) 2488 .WithFlag(5, out AGC_seqRssiDoneInterruptEnable, name: "RSSIDONESEQIEN") 2489 .WithTaggedFlag("SHORTRSSIPOSSTEPSEQIEN", 6) 2490 .WithReservedBits(7, 1) 2491 .WithTaggedFlag("RFPKDPRDDONESEQIEN", 8) 2492 .WithTaggedFlag("RFPKDCNTDONESEQIEN", 9) 2493 .WithFlag(10, out AGC_seqRssiHighInterruptEnable, name: "RSSIHIGHSEQIEN") 2494 .WithFlag(11, out AGC_seqRssiLowInterruptEnable, name: "RSSILOWSEQIEN") 2495 .WithFlag(12, out AGC_seqCcaNotDetectedInterruptEnable, name: "CCANODETSEQIEN") 2496 .WithTaggedFlag("GAINBELOWGAINTHDSEQIEN", 13) 2497 .WithTaggedFlag("GAINUPDATEFRZSEQIEN", 14) 2498 .WithReservedBits(15, 17) 2499 }, 2500 {(long)AutomaticGainControlRegisters.ListenBeforeTalkConfiguration, new DoubleWordRegister(this) 2501 .WithValueField(0, 4, out AGC_ccaRssiPeriod, name: "CCARSSIPERIOD") 2502 .WithFlag(4, out AGC_ccaRssiPeriodEnable, name: "ENCCARSSIPERIOD") 2503 .WithTaggedFlag("ENCCAGAINREDUCED", 5) 2504 .WithTaggedFlag("ENCCARSSIMAX", 6) 2505 .WithReservedBits(7, 25) 2506 }, 2507 {(long)AutomaticGainControlRegisters.Control0, new DoubleWordRegister(this, 0x2132727F) 2508 .WithTag("PWRTARGET", 0, 8) 2509 .WithTag("MODE", 8, 3) 2510 .WithValueField(11, 8, out AGC_rssiShift, name: "RSSISHIFT") 2511 .WithTaggedFlag("DISCFLOOPADJ", 19) 2512 .WithTaggedFlag("CFLOOPNFADJ", 20) 2513 .WithTaggedFlag("CFLOOPNEWCALC", 21) 2514 .WithTaggedFlag("DISRESETCHPWR", 22) 2515 .WithTaggedFlag("ADCATTENMODE", 23) 2516 .WithTaggedFlag("FENOTCHMODESEL", 24) 2517 .WithTag("ADCATTENCODE", 25, 2) 2518 .WithTaggedFlag("ENRSSIRESET", 27) 2519 .WithTaggedFlag("DSADISCFLOOP", 28) 2520 .WithTaggedFlag("DISPNGAINUP", 29) 2521 .WithTaggedFlag("DISPNDWNCOMP", 30) 2522 .WithTaggedFlag("AGCRST", 31) 2523 }, 2524 {(long)AutomaticGainControlRegisters.Control1, new DoubleWordRegister(this, 0x00001300) 2525 .WithValueField(0, 8, out AGC_ccaThreshold, name: "CCATHRSH") 2526 .WithValueField(8, 4, out AGC_rssiMeasurePeriod, name: "RSSIPERIOD") 2527 .WithValueField(12, 3, out AGC_powerMeasurePeriod, name: "PWRPERIOD") 2528 .WithEnumField<DoubleWordRegister, AGC_CcaMode>(15, 2, out AGC_ccaMode, name: "CCAMODE") 2529 .WithEnumField<DoubleWordRegister, AGC_CcaMode3Logic>(17, 1, out AGC_ccaMode3Logic, name: "CCAMODE3LOGIC") 2530 .WithFlag(18, out AGC_ccaSoftwareControl, name: "CCASWCTRL") 2531 .WithReservedBits(19, 13) 2532 }, 2533 {(long)AutomaticGainControlRegisters.Control7, new DoubleWordRegister(this) 2534 .WithTag("SUBDEN", 0, 8) 2535 .WithValueField(8, 8, out AGC_subPeriodInteger, name: "SUBINT") 2536 .WithTag("SUBNUM", 16, 8) 2537 .WithFlag(24, out AGC_subPeriod, name: "SUBPERIOD") 2538 .WithReservedBits(25, 7) 2539 }, 2540 {(long)AutomaticGainControlRegisters.ReceivedSignalStrengthIndicator, new DoubleWordRegister(this, 0x00008000) 2541 .WithReservedBits(0, 6) 2542 .WithValueField(6, 2, FieldMode.Read, valueProviderCallback: _ => (uint)AGC_RssiFractionalPart, name: "RSSIFRAC") 2543 .WithValueField(8, 8, FieldMode.Read, valueProviderCallback: _ => (uint)AGC_RssiIntegerPartAdjusted, name: "RSSIINT") 2544 .WithReservedBits(16, 16) 2545 }, 2546 {(long)AutomaticGainControlRegisters.FrameReceivedSignalStrengthIndicator, new DoubleWordRegister(this, 0x00008000) 2547 .WithReservedBits(0, 6) 2548 .WithValueField(6, 2, FieldMode.Read, valueProviderCallback: _ => (uint)AGC_FrameRssiFractionalPart, name: "FRAMERSSIFRAC") 2549 .WithValueField(8, 8, FieldMode.Read, valueProviderCallback: _ => (uint)AGC_FrameRssiIntegerPartAdjusted, name: "FRAMERSSIINT") 2550 .WithReservedBits(16, 16) 2551 }, 2552 {(long)AutomaticGainControlRegisters.Command, new DoubleWordRegister(this) 2553 .WithFlag(0, FieldMode.Set, writeCallback: (_, value) => { if (value) {AGC_RssiStartCommand();} }, name: "RSSISTART") 2554 .WithReservedBits(1, 31) 2555 }, 2556 {(long)AutomaticGainControlRegisters.ReceivedSignalStrengthIndicatorAbsoluteThreshold, new DoubleWordRegister(this) 2557 .WithValueField(0, 8, out AGC_rssiHighThreshold, name: "RSSIHIGHTHRSH") 2558 .WithValueField(8, 8, out AGC_rssiLowThreshold, name: "RSSILOWTHRSH") 2559 .WithTag("SIRSSIHIGHTHR", 16, 8) 2560 .WithTag("SIRSSINEGSTEPTHR", 24, 8) 2561 }, 2562 }; 2563 return new DoubleWordRegisterCollection(this, registerDictionary); 2564 } 2565 BuildHostMailboxRegistersCollection()2566 private DoubleWordRegisterCollection BuildHostMailboxRegistersCollection() 2567 { 2568 var registerDictionary = new Dictionary<long, DoubleWordRegister> 2569 { 2570 {(long)HostMailboxRegisters.MessagePointer0, new DoubleWordRegister(this) 2571 .WithValueField(0, 32, out HOSTMAILBOX_messagePointer[0], name: "MSGPTR0") 2572 }, 2573 {(long)HostMailboxRegisters.MessagePointer1, new DoubleWordRegister(this) 2574 .WithValueField(0, 32, out HOSTMAILBOX_messagePointer[1], name: "MSGPTR1") 2575 }, 2576 {(long)HostMailboxRegisters.MessagePointer2, new DoubleWordRegister(this) 2577 .WithValueField(0, 32, out HOSTMAILBOX_messagePointer[2], name: "MSGPTR2") 2578 }, 2579 {(long)HostMailboxRegisters.MessagePointer3, new DoubleWordRegister(this) 2580 .WithValueField(0, 32, out HOSTMAILBOX_messagePointer[3], name: "MSGPTR3") 2581 }, 2582 {(long)HostMailboxRegisters.InterruptFlags, new DoubleWordRegister(this) 2583 .WithFlag(0, out HOSTMAILBOX_messageInterrupt[0], name: "MBOXIF0") 2584 .WithFlag(1, out HOSTMAILBOX_messageInterrupt[1], name: "MBOXIF1") 2585 .WithFlag(2, out HOSTMAILBOX_messageInterrupt[2], name: "MBOXIF2") 2586 .WithFlag(3, out HOSTMAILBOX_messageInterrupt[3], name: "MBOXIF3") 2587 .WithReservedBits(4, 28) 2588 .WithChangeCallback((_, __) => UpdateInterrupts()) 2589 }, 2590 {(long)HostMailboxRegisters.InterruptEnable, new DoubleWordRegister(this) 2591 .WithFlag(0, out HOSTMAILBOX_messageInterruptEnable[0], name: "MBOXIEN0") 2592 .WithFlag(1, out HOSTMAILBOX_messageInterruptEnable[1], name: "MBOXIEN1") 2593 .WithFlag(2, out HOSTMAILBOX_messageInterruptEnable[2], name: "MBOXIEN2") 2594 .WithFlag(3, out HOSTMAILBOX_messageInterruptEnable[3], name: "MBOXIEN3") 2595 .WithReservedBits(4, 28) 2596 .WithChangeCallback((_, __) => UpdateInterrupts()) 2597 }, 2598 }; 2599 2600 return new DoubleWordRegisterCollection(this, registerDictionary); 2601 } 2602 BuildRadioMailboxRegistersCollection()2603 private DoubleWordRegisterCollection BuildRadioMailboxRegistersCollection() 2604 { 2605 var registerDictionary = new Dictionary<long, DoubleWordRegister> 2606 { 2607 {(long)RadioMailboxRegisters.MessagePointer0, new DoubleWordRegister(this) 2608 .WithValueField(0, 32, out RFMAILBOX_messagePointer[0], name: "MSGPTR0") 2609 }, 2610 {(long)RadioMailboxRegisters.MessagePointer1, new DoubleWordRegister(this) 2611 .WithValueField(0, 32, out RFMAILBOX_messagePointer[1], name: "MSGPTR1") 2612 }, 2613 {(long)RadioMailboxRegisters.MessagePointer2, new DoubleWordRegister(this) 2614 .WithValueField(0, 32, out RFMAILBOX_messagePointer[2], name: "MSGPTR2") 2615 }, 2616 {(long)RadioMailboxRegisters.MessagePointer3, new DoubleWordRegister(this) 2617 .WithValueField(0, 32, out RFMAILBOX_messagePointer[3], name: "MSGPTR3") 2618 }, 2619 {(long)RadioMailboxRegisters.InterruptFlags, new DoubleWordRegister(this) 2620 .WithFlag(0, out RFMAILBOX_messageInterrupt[0], name: "MBOXIF0") 2621 .WithFlag(1, out RFMAILBOX_messageInterrupt[1], name: "MBOXIF1") 2622 .WithFlag(2, out RFMAILBOX_messageInterrupt[2], name: "MBOXIF2") 2623 .WithFlag(3, out RFMAILBOX_messageInterrupt[3], name: "MBOXIF3") 2624 .WithReservedBits(4, 28) 2625 .WithChangeCallback((_, __) => UpdateInterrupts()) 2626 }, 2627 {(long)HostMailboxRegisters.InterruptEnable, new DoubleWordRegister(this) 2628 .WithFlag(0, out RFMAILBOX_messageInterruptEnable[0], name: "MBOXIEN0") 2629 .WithFlag(1, out RFMAILBOX_messageInterruptEnable[1], name: "MBOXIEN1") 2630 .WithFlag(2, out RFMAILBOX_messageInterruptEnable[2], name: "MBOXIEN2") 2631 .WithFlag(3, out RFMAILBOX_messageInterruptEnable[3], name: "MBOXIEN3") 2632 .WithReservedBits(4, 28) 2633 .WithChangeCallback((_, __) => UpdateInterrupts()) 2634 }, 2635 }; 2636 2637 return new DoubleWordRegisterCollection(this, registerDictionary); 2638 } 2639 #endregion 2640 2641 private uint Read<T>(DoubleWordRegisterCollection registersCollection, string regionName, long offset, bool internal_read = false) 2642 where T : struct, IComparable, IFormattable 2643 { 2644 var result = 0U; 2645 long internal_offset = offset; 2646 2647 // Set, Clear, Toggle registers should only be used for write operations. But just in case we convert here as well. 2648 if (offset >= SetRegisterOffset && offset < ClearRegisterOffset) 2649 { 2650 // Set register 2651 internal_offset = offset - SetRegisterOffset; 2652 if(!internal_read) 2653 { 2654 this.Log(LogLevel.Noisy, "SET Operation on {0}, offset=0x{1:X}, internal_offset=0x{2:X}", Enum.Format(typeof(T), internal_offset, "G"), offset, internal_offset); 2655 } 2656 } else if (offset >= ClearRegisterOffset && offset < ToggleRegisterOffset) 2657 { 2658 // Clear register 2659 internal_offset = offset - ClearRegisterOffset; 2660 if(!internal_read) 2661 { 2662 this.Log(LogLevel.Noisy, "CLEAR Operation on {0}, offset=0x{1:X}, internal_offset=0x{2:X}", Enum.Format(typeof(T), internal_offset, "G"), offset, internal_offset); 2663 } 2664 } else if (offset >= ToggleRegisterOffset) 2665 { 2666 // Toggle register 2667 internal_offset = offset - ToggleRegisterOffset; 2668 if(!internal_read) 2669 { 2670 this.Log(LogLevel.Noisy, "TOGGLE Operation on {0}, offset=0x{1:X}, internal_offset=0x{2:X}", Enum.Format(typeof(T), internal_offset, "G"), offset, internal_offset); 2671 } 2672 } 2673 2674 if(!registersCollection.TryRead(internal_offset, out result)) 2675 { 2676 if(!internal_read) 2677 { 2678 this.Log(LogLevel.Noisy, "Unhandled read from {0} at offset 0x{1:X} ({2}).", regionName, internal_offset, Enum.Format(typeof(T), internal_offset, "G")); 2679 } 2680 } 2681 else 2682 { 2683 if(!internal_read) 2684 { 2685 this.Log(LogLevel.Noisy, "{0}: Read from {1} at offset 0x{2:X} ({3}), returned 0x{4:X}", 2686 this.GetTime(), regionName, internal_offset, Enum.Format(typeof(T), internal_offset, "G"), result); 2687 } 2688 } 2689 2690 return result; 2691 } 2692 2693 private byte ReadByte<T>(DoubleWordRegisterCollection registersCollection, string regionName, long offset, bool internal_read = false) 2694 where T : struct, IComparable, IFormattable 2695 { 2696 int byteOffset = (int)(offset & 0x3); 2697 // TODO: single byte reads are treated as internal reads for now to avoid flooding the log during debugging. 2698 uint registerValue = Read<T>(registersCollection, regionName, offset - byteOffset, true); 2699 byte result = (byte)((registerValue >> byteOffset*8) & 0xFF); 2700 return result; 2701 } 2702 2703 private void Write<T>(DoubleWordRegisterCollection registersCollection, string regionName, long offset, uint value) 2704 where T : struct, IComparable, IFormattable 2705 { machine.ClockSource.ExecuteInLockAntmicro.Renode.Peripherals.Wireless.EFR32xG24_Radio.IFormattable2706 machine.ClockSource.ExecuteInLock(delegate { 2707 long internal_offset = offset; 2708 uint internal_value = value; 2709 2710 if (offset >= SetRegisterOffset && offset < ClearRegisterOffset) 2711 { 2712 // Set register 2713 internal_offset = offset - SetRegisterOffset; 2714 uint old_value = Read<T>(registersCollection, regionName, internal_offset, true); 2715 internal_value = old_value | value; 2716 this.Log(LogLevel.Noisy, "SET Operation on {0}, offset=0x{1:X}, internal_offset=0x{2:X}, SET_value=0x{3:X}, old_value=0x{4:X}, new_value=0x{5:X}", Enum.Format(typeof(T), internal_offset, "G"), offset, internal_offset, value, old_value, internal_value); 2717 } else if (offset >= ClearRegisterOffset && offset < ToggleRegisterOffset) 2718 { 2719 // Clear register 2720 internal_offset = offset - ClearRegisterOffset; 2721 uint old_value = Read<T>(registersCollection, regionName, internal_offset, true); 2722 internal_value = old_value & ~value; 2723 this.Log(LogLevel.Noisy, "CLEAR Operation on {0}, offset=0x{1:X}, internal_offset=0x{2:X}, CLEAR_value=0x{3:X}, old_value=0x{4:X}, new_value=0x{5:X}", Enum.Format(typeof(T), internal_offset, "G"), offset, internal_offset, value, old_value, internal_value); 2724 } else if (offset >= ToggleRegisterOffset) 2725 { 2726 // Toggle register 2727 internal_offset = offset - ToggleRegisterOffset; 2728 uint old_value = Read<T>(registersCollection, regionName, internal_offset, true); 2729 internal_value = old_value ^ value; 2730 this.Log(LogLevel.Noisy, "TOGGLE Operation on {0}, offset=0x{1:X}, internal_offset=0x{2:X}, TOGGLE_value=0x{3:X}, old_value=0x{4:X}, new_value=0x{5:X}", Enum.Format(typeof(T), internal_offset, "G"), offset, internal_offset, value, old_value, internal_value); 2731 } 2732 2733 this.Log(LogLevel.Debug, "{0}: Write to {1} at offset 0x{2:X} ({3}), value 0x{4:X}", 2734 this.GetTime(), regionName, internal_offset, Enum.Format(typeof(T), internal_offset, "G"), internal_value); 2735 2736 if(!registersCollection.TryWrite(internal_offset, internal_value)) 2737 { 2738 this.Log(LogLevel.Debug, "Unhandled write to {0} at offset 0x{1:X} ({2}), value 0x{3:X}.", regionName, internal_offset, Enum.Format(typeof(T), internal_offset, "G"), internal_value); 2739 return; 2740 } 2741 }); 2742 } 2743 SequencerIsRunning()2744 private bool SequencerIsRunning() 2745 { 2746 return (SeqOffIRQ.IsSet || SeqRxWarmIRQ.IsSet || SeqRxSearchIRQ.IsSet || SeqRxFrameIRQ.IsSet 2747 || SeqRxPoweringDownIRQ.IsSet || SeqRx2RxIRQ.IsSet || SeqRxOverflowIRQ.IsSet || SeqRx2TxIRQ.IsSet 2748 || SeqTxWarmIRQ.IsSet || SeqTxIRQ.IsSet || SeqTxPoweringDownIRQ.IsSet || SeqTx2RxIRQ.IsSet 2749 || SeqTx2TxIRQ.IsSet || SeqShutdownIRQ.IsSet); 2750 } 2751 UpdateInterrupts()2752 public void UpdateInterrupts() 2753 { 2754 machine.ClockSource.ExecuteInLock(delegate { 2755 FRC_CheckPacketCaptureBufferThreshold(); 2756 2757 //------------------------------- 2758 // Main core interrupts 2759 //------------------------------- 2760 2761 // RAC_RSM interrupts 2762 var irq = ((RAC_radioStateChangeInterrupt.Value && RAC_radioStateChangeInterruptEnable.Value) 2763 || (RAC_stimerCompareEventInterrupt.Value && RAC_stimerCompareEventInterruptEnable.Value)); 2764 if(irq) 2765 { 2766 this.Log(LogLevel.Debug, "{0}: IRQ RAC_RSM set (IF=0x{1:X}, IEN=0x{2:X})", 2767 this.GetTime(), 2768 (uint)(RAC_radioStateChangeInterrupt.Value 2769 | RAC_stimerCompareEventInterrupt.Value ? 0x2 : 0), 2770 (uint)(RAC_radioStateChangeInterruptEnable.Value 2771 | RAC_stimerCompareEventInterruptEnable.Value ? 0x2 : 0)); 2772 } 2773 RadioControllerRadioStateMachineIRQ.Set(irq); 2774 2775 irq = ((RAC_mainCoreSeqInterrupts.Value & RAC_mainCoreSeqInterruptsEnable.Value) > 0); 2776 if(irq) 2777 { 2778 this.Log(LogLevel.Debug, "{0}: IRQ RAC_SEQ set (IF=0x{1:X}, IEN=0x{2:X})", 2779 this.GetTime(), 2780 (uint)(RAC_mainCoreSeqInterrupts.Value << 16), 2781 (uint)(RAC_mainCoreSeqInterruptsEnable.Value << 16)); 2782 } 2783 RadioControllerSequencerIRQ.Set(irq); 2784 2785 // FRC interrupt 2786 irq = ((FRC_txDoneInterrupt.Value && FRC_txDoneInterruptEnable.Value) 2787 || (FRC_txAfterFrameDoneInterrupt.Value && FRC_txAfterFrameDoneInterruptEnable.Value) 2788 || (FRC_txUnderflowInterrupt.Value && FRC_txUnderflowInterruptEnable.Value) 2789 || (FRC_rxDoneInterrupt.Value && FRC_rxDoneInterruptEnable.Value) 2790 || (FRC_rxAbortedInterrupt.Value && FRC_rxAbortedInterruptEnable.Value) 2791 || (FRC_frameErrorInterrupt.Value && FRC_frameErrorInterruptEnable.Value) 2792 || (FRC_rxOverflowInterrupt.Value && FRC_rxOverflowInterruptEnable.Value) 2793 || (FRC_rxRawEventInterrupt.Value && FRC_rxRawEventInterruptEnable.Value) 2794 || (FRC_txRawEventInterrupt.Value && FRC_txRawEventInterruptEnable.Value) 2795 || (FRC_packetBufferStartInterrupt.Value && FRC_packetBufferStartInterruptEnable.Value) 2796 || (FRC_packetBufferThresholdInterrupt.Value && FRC_packetBufferThresholdInterruptEnable.Value)); 2797 if(irq) 2798 { 2799 var IF = 0U; 2800 var IEN = 0U; 2801 frameControllerRegistersCollection.TryRead((long)FrameControllerRegisters.InterruptFlags, out IF); 2802 frameControllerRegistersCollection.TryRead((long)FrameControllerRegisters.InterruptEnable, out IEN); 2803 this.Log(LogLevel.Debug, "{0}: IRQ FRC set (IF=0x{1:X}, IEN=0x{2:X})", this.GetTime(), IF, IEN); 2804 } 2805 FrameControllerIRQ.Set(irq); 2806 2807 // MODEM interrupt 2808 irq = ((MODEM_txFrameSentInterrupt.Value && MODEM_txFrameSentInterruptEnable.Value) 2809 || (MODEM_txSyncSentInterrupt.Value && MODEM_txSyncSentInterruptEnable.Value) 2810 || (MODEM_txPreambleSentInterrupt.Value && MODEM_txPreambleSentInterruptEnable.Value) 2811 || (MODEM_TxRampingDoneInterrupt && MODEM_txRampingDoneInterruptEnable.Value) 2812 || (MODEM_rxPreambleDetectedInterrupt.Value && MODEM_rxPreambleDetectedInterruptEnable.Value) 2813 || (MODEM_rxFrameWithSyncWord0DetectedInterrupt.Value && MODEM_rxFrameWithSyncWord0DetectedInterruptEnable.Value) 2814 || (MODEM_rxFrameWithSyncWord1DetectedInterrupt.Value && MODEM_rxFrameWithSyncWord1DetectedInterruptEnable.Value) 2815 || (MODEM_rxPreambleLostInterrupt.Value && MODEM_rxPreambleLostInterruptEnable.Value)); 2816 if(irq) 2817 { 2818 var IF = 0U; 2819 var IEN = 0U; 2820 modulatorAndDemodulatorRegistersCollection.TryRead((long)ModulatorAndDemodulatorRegisters.InterruptFlags, out IF); 2821 modulatorAndDemodulatorRegistersCollection.TryRead((long)ModulatorAndDemodulatorRegisters.InterruptEnable, out IEN); 2822 this.Log(LogLevel.Debug, "{0}: IRQ MODEM set (IF=0x{1:X}, IEN=0x{2:X})", this.GetTime(), IF, IEN); 2823 } 2824 ModulatorAndDemodulatorIRQ.Set(irq); 2825 2826 // PROTIMER interrupt 2827 irq = (PROTIMER_preCounterOverflowInterrupt.Value && PROTIMER_preCounterOverflowInterruptEnable.Value) 2828 || (PROTIMER_baseCounterOverflowInterrupt.Value && PROTIMER_baseCounterOverflowInterruptEnable.Value) 2829 || (PROTIMER_wrapCounterOverflowInterrupt.Value && PROTIMER_wrapCounterOverflowInterruptEnable.Value) 2830 || (PROTIMER_listenBeforeTalkSuccessInterrupt.Value && PROTIMER_listenBeforeTalkSuccessInterruptEnable.Value) 2831 || (PROTIMER_listenBeforeTalkFailureInterrupt.Value && PROTIMER_listenBeforeTalkFailureInterruptEnable.Value) 2832 || (PROTIMER_listenBeforeTalkRetryInterrupt.Value && PROTIMER_listenBeforeTalkRetryInterruptEnable.Value) 2833 || (PROTIMER_listenBeforeTalkTimeoutCounterMatchInterrupt.Value && PROTIMER_listenBeforeTalkTimeoutCounterMatchInterruptEnable.Value); 2834 Array.ForEach(PROTIMER_timeoutCounter, x => irq |= x.Interrupt); 2835 Array.ForEach(PROTIMER_captureCompareChannel, x => irq |= x.Interrupt); 2836 if(irq) 2837 { 2838 var IF = 0U; 2839 var IEN = 0U; 2840 protocolTimerRegistersCollection.TryRead((long)ProtocolTimerRegisters.InterruptFlags, out IF); 2841 protocolTimerRegistersCollection.TryRead((long)ProtocolTimerRegisters.InterruptEnable, out IEN); 2842 this.Log(LogLevel.Debug, "{0}: IRQ PROTIMER set (IF=0x{1:X}, IEN=0x{2:X})", this.GetTime(), IF, IEN); 2843 } 2844 ProtocolTimerIRQ.Set(irq); 2845 2846 // BUFC interrupt 2847 irq = false; 2848 Array.ForEach(BUFC_buffer, x => irq |= x.Interrupt); 2849 if(irq) 2850 { 2851 var IF = 0U; 2852 var IEN = 0U; 2853 bufferControllerRegistersCollection.TryRead((long)BufferControllerRegisters.InterruptFlags, out IF); 2854 bufferControllerRegistersCollection.TryRead((long)BufferControllerRegisters.InterruptEnable, out IEN); 2855 this.Log(LogLevel.Debug, "{0}: IRQ BUFC set (IF=0x{1:X}, IEN=0x{2:X})", this.GetTime(), IF, IEN); 2856 } 2857 BufferControllerIRQ.Set(irq); 2858 2859 // AGC interrupt 2860 irq = ((AGC_rssiValidInterrupt.Value && AGC_rssiValidInterruptEnable.Value) 2861 || (AGC_ccaInterrupt.Value && AGC_ccaInterruptEnable.Value) 2862 || (AGC_rssiDoneInterrupt.Value && AGC_rssiDoneInterruptEnable.Value) 2863 || (AGC_rssiHighInterrupt.Value && AGC_rssiHighInterruptEnable.Value) 2864 || (AGC_rssiLowInterrupt.Value && AGC_rssiLowInterruptEnable.Value) 2865 || (AGC_ccaNotDetectedInterrupt.Value && AGC_ccaNotDetectedInterruptEnable.Value)); 2866 if(irq) 2867 { 2868 var IF = 0U; 2869 var IEN = 0U; 2870 automaticGainControlRegistersCollection.TryRead((long)AutomaticGainControlRegisters.InterruptFlags, out IF); 2871 automaticGainControlRegistersCollection.TryRead((long)AutomaticGainControlRegisters.InterruptEnable, out IEN); 2872 this.Log(LogLevel.Debug, "{0}: IRQ AGC set (IF=0x{1:X}, IEN=0x{2:X})", this.GetTime(), IF, IEN); 2873 } 2874 AutomaticGainControlIRQ.Set(irq); 2875 2876 // HOSTMAILBOX interrupt 2877 int index; 2878 irq = false; 2879 for(index = 0; index < MailboxMessageNumber; index++) 2880 { 2881 if (HOSTMAILBOX_messageInterrupt[index].Value && HOSTMAILBOX_messageInterruptEnable[index].Value) 2882 { 2883 irq = true; 2884 break; 2885 } 2886 } 2887 if(irq) 2888 { 2889 var IF = 0U; 2890 var IEN = 0U; 2891 hostMailboxRegistersCollection.TryRead((long)HostMailboxRegisters.InterruptFlags, out IF); 2892 hostMailboxRegistersCollection.TryRead((long)HostMailboxRegisters.InterruptEnable, out IEN); 2893 this.Log(LogLevel.Debug, "{0}: IRQ HOSTMAILBOX set (IF=0x{1:X}, IEN=0x{2:X})", this.GetTime(), IF, IEN); 2894 } 2895 HostMailboxIRQ.Set(irq); 2896 2897 //------------------------------- 2898 // Sequencer interrupts 2899 //------------------------------- 2900 2901 // RAC interrupt 2902 irq = ((RAC_seqRadioStateChangeInterrupt.Value && RAC_seqRadioStateChangeInterruptEnable.Value) 2903 || (RAC_seqStimerCompareEventInterrupt.Value && RAC_seqStimerCompareEventInterruptEnable.Value)); 2904 if(irq) 2905 { 2906 this.Log(LogLevel.Debug, "{0}: SEQ_IRQ RAC set (IF=0x{1:X}, IEN=0x{2:X})", 2907 this.GetTime(), 2908 ((RAC_seqRadioStateChangeInterrupt.Value ? 0x1 : 0) | (RAC_seqStimerCompareEventInterrupt.Value ? 0x2 : 0)), 2909 ((RAC_seqRadioStateChangeInterruptEnable.Value ? 0x1 : 0) | (RAC_seqStimerCompareEventInterruptEnable.Value ? 0x2 : 0))); 2910 } 2911 SeqRadioControllerIRQ.Set(irq); 2912 2913 // FRC interrupt 2914 irq = ((FRC_seqTxDoneInterrupt.Value && FRC_seqTxDoneInterruptEnable.Value) 2915 || (FRC_seqTxAfterFrameDoneInterrupt.Value && FRC_seqTxAfterFrameDoneInterruptEnable.Value) 2916 || (FRC_seqTxUnderflowInterrupt.Value && FRC_seqTxUnderflowInterruptEnable.Value) 2917 || (FRC_seqRxDoneInterrupt.Value && FRC_seqRxDoneInterruptEnable.Value) 2918 || (FRC_seqRxAbortedInterrupt.Value && FRC_seqRxAbortedInterruptEnable.Value) 2919 || (FRC_seqFrameErrorInterrupt.Value && FRC_seqFrameErrorInterruptEnable.Value) 2920 || (FRC_seqRxOverflowInterrupt.Value && FRC_seqRxOverflowInterruptEnable.Value) 2921 || (FRC_seqRxRawEventInterrupt.Value && FRC_seqRxRawEventInterruptEnable.Value) 2922 || (FRC_seqTxRawEventInterrupt.Value && FRC_seqTxRawEventInterruptEnable.Value) 2923 || (FRC_seqPacketBufferStartInterrupt.Value && FRC_seqPacketBufferStartInterruptEnable.Value) 2924 || (FRC_seqPacketBufferThresholdInterrupt.Value && FRC_seqPacketBufferThresholdInterruptEnable.Value)); 2925 if(irq) 2926 { 2927 var IF = 0U; 2928 var IEN = 0U; 2929 frameControllerRegistersCollection.TryRead((long)FrameControllerRegisters.SequencerInterruptFlags, out IF); 2930 frameControllerRegistersCollection.TryRead((long)FrameControllerRegisters.SequencerInterruptEnable, out IEN); 2931 this.Log(LogLevel.Debug, "{0}: SEQ_IRQ FRC set (IF=0x{1:X}, IEN=0x{2:X})", this.GetTime(), IF, IEN); 2932 } 2933 SeqFrameControllerIRQ.Set(irq); 2934 2935 // MODEM interrupt 2936 irq = ((MODEM_seqTxFrameSentInterrupt.Value && MODEM_seqTxFrameSentInterruptEnable.Value) 2937 || (MODEM_seqTxSyncSentInterrupt.Value && MODEM_seqTxSyncSentInterruptEnable.Value) 2938 || (MODEM_seqTxPreambleSentInterrupt.Value && MODEM_seqTxPreambleSentInterruptEnable.Value) 2939 || (MODEM_TxRampingDoneInterrupt && MODEM_seqTxRampingDoneInterruptEnable.Value) 2940 || (MODEM_seqRxPreambleDetectedInterrupt.Value && MODEM_seqRxPreambleDetectedInterruptEnable.Value) 2941 || (MODEM_seqRxFrameWithSyncWord0DetectedInterrupt.Value && MODEM_seqRxFrameWithSyncWord0DetectedInterruptEnable.Value) 2942 || (MODEM_seqRxFrameWithSyncWord1DetectedInterrupt.Value && MODEM_seqRxFrameWithSyncWord1DetectedInterruptEnable.Value) 2943 || (MODEM_seqRxPreambleLostInterrupt.Value && MODEM_seqRxPreambleLostInterruptEnable.Value)); 2944 if(irq) 2945 { 2946 var IF = 0U; 2947 var IEN = 0U; 2948 modulatorAndDemodulatorRegistersCollection.TryRead((long)ModulatorAndDemodulatorRegisters.SequencerInterruptFlags, out IF); 2949 modulatorAndDemodulatorRegistersCollection.TryRead((long)ModulatorAndDemodulatorRegisters.SequencerInterruptEnable, out IEN); 2950 this.Log(LogLevel.Debug, "{0}: SEQ_IRQ MODEM set (IF=0x{1:X}, IEN=0x{2:X})", this.GetTime(), IF, IEN); 2951 } 2952 SeqModulatorAndDemodulatorIRQ.Set(irq); 2953 2954 // PROTIMER interrupt 2955 irq = (PROTIMER_seqPreCounterOverflowInterrupt.Value && PROTIMER_seqPreCounterOverflowInterruptEnable.Value) 2956 || (PROTIMER_seqBaseCounterOverflowInterrupt.Value && PROTIMER_seqBaseCounterOverflowInterruptEnable.Value) 2957 || (PROTIMER_seqWrapCounterOverflowInterrupt.Value && PROTIMER_seqWrapCounterOverflowInterruptEnable.Value) 2958 || (PROTIMER_seqListenBeforeTalkSuccessInterrupt.Value && PROTIMER_seqListenBeforeTalkSuccessInterruptEnable.Value) 2959 || (PROTIMER_seqListenBeforeTalkFailureInterrupt.Value && PROTIMER_seqListenBeforeTalkFailureInterruptEnable.Value) 2960 || (PROTIMER_seqListenBeforeTalkRetryInterrupt.Value && PROTIMER_seqListenBeforeTalkRetryInterruptEnable.Value) 2961 || (PROTIMER_seqListenBeforeTalkTimeoutCounterMatchInterrupt.Value && PROTIMER_seqListenBeforeTalkTimeoutCounterMatchInterruptEnable.Value); 2962 Array.ForEach(PROTIMER_timeoutCounter, x => irq |= x.SeqInterrupt); 2963 Array.ForEach(PROTIMER_captureCompareChannel, x => irq |= x.SeqInterrupt); 2964 if(irq) 2965 { 2966 var IF = 0U; 2967 var IEN = 0U; 2968 protocolTimerRegistersCollection.TryRead((long)ProtocolTimerRegisters.SequencerInterruptFlags, out IF); 2969 protocolTimerRegistersCollection.TryRead((long)ProtocolTimerRegisters.SequencerInterruptEnable, out IEN); 2970 this.Log(LogLevel.Debug, "{0}: SEQ_IRQ PROTIMER set (IF=0x{1:X}, IEN=0x{2:X})", this.GetTime(), IF, IEN); 2971 } 2972 SeqProtocolTimerIRQ.Set(irq); 2973 2974 // BUFC interrupt 2975 irq = false; 2976 Array.ForEach(BUFC_buffer, x => irq |= x.SeqInterrupt); 2977 if(irq) 2978 { 2979 var IF = 0U; 2980 var IEN = 0U; 2981 bufferControllerRegistersCollection.TryRead((long)BufferControllerRegisters.SequencerInterruptFlags, out IF); 2982 bufferControllerRegistersCollection.TryRead((long)BufferControllerRegisters.SequencerInterruptEnable, out IEN); 2983 this.Log(LogLevel.Debug, "{0}: SEQ_IRQ BUFC set (IF=0x{1:X}, IEN=0x{2:X})", this.GetTime(), IF, IEN); 2984 } 2985 SeqBufferControllerIRQ.Set(irq); 2986 2987 // AGC interrupt 2988 irq = ((AGC_seqRssiValidInterrupt.Value && AGC_seqRssiValidInterruptEnable.Value) 2989 || (AGC_seqCcaInterrupt.Value && AGC_seqCcaInterruptEnable.Value) 2990 || (AGC_seqRssiDoneInterrupt.Value && AGC_seqRssiDoneInterruptEnable.Value) 2991 || (AGC_seqRssiHighInterrupt.Value && AGC_seqRssiHighInterruptEnable.Value) 2992 || (AGC_seqRssiLowInterrupt.Value && AGC_seqRssiLowInterruptEnable.Value) 2993 || (AGC_seqCcaNotDetectedInterrupt.Value && AGC_seqCcaNotDetectedInterruptEnable.Value)); 2994 if(irq) 2995 { 2996 var IF = 0U; 2997 var IEN = 0U; 2998 automaticGainControlRegistersCollection.TryRead((long)AutomaticGainControlRegisters.SequencerInterruptFlags, out IF); 2999 automaticGainControlRegistersCollection.TryRead((long)AutomaticGainControlRegisters.SequencerInterruptEnable, out IEN); 3000 this.Log(LogLevel.Debug, "{0}: SEQ_IRQ AGC set (IF=0x{1:X}, IEN=0x{2:X})", this.GetTime(), IF, IEN); 3001 } 3002 SeqAutomaticGainControlIRQ.Set(irq); 3003 3004 // RFMAILBOX interrupt 3005 irq = false; 3006 for(index = 0; index < MailboxMessageNumber; index++) 3007 { 3008 if (RFMAILBOX_messageInterrupt[index].Value && RFMAILBOX_messageInterruptEnable[index].Value) 3009 { 3010 irq = true; 3011 break; 3012 } 3013 } 3014 if(irq) 3015 { 3016 var IF = 0U; 3017 var IEN = 0U; 3018 radioMailboxRegistersCollection.TryRead((long)RadioMailboxRegisters.InterruptFlags, out IF); 3019 radioMailboxRegistersCollection.TryRead((long)RadioMailboxRegisters.InterruptEnable, out IEN); 3020 this.Log(LogLevel.Debug, "{0}: SEQ_IRQ RFMAILBOX set (IF=0x{1:X}, IEN=0x{2:X})", this.GetTime(), IF, IEN); 3021 } 3022 SeqRfMailboxIRQ.Set(irq); 3023 3024 // Sequencer Radio State Machine interrupts 3025 irq = RAC_seqStateOffInterrupt.Value && RAC_seqStateOffInterruptEnable.Value; 3026 if(irq) 3027 { 3028 this.Log(LogLevel.Debug, "{0}: SEQ_IRQ OFF set", this.GetTime()); 3029 } 3030 SeqOffIRQ.Set(irq); 3031 3032 irq = RAC_seqStateRxWarmInterrupt.Value && RAC_seqStateRxWarmInterruptEnable.Value; 3033 if(irq) 3034 { 3035 this.Log(LogLevel.Debug, "{0}: SEQ_IRQ RX_WARM set", this.GetTime()); 3036 } 3037 SeqRxWarmIRQ.Set(irq); 3038 3039 irq = RAC_seqStateRxSearchInterrupt.Value && RAC_seqStateRxSearchInterruptEnable.Value; 3040 if(irq) 3041 { 3042 this.Log(LogLevel.Debug, "{0}: SEQ_IRQ RX_SEARCH set", this.GetTime()); 3043 } 3044 SeqRxSearchIRQ.Set(irq); 3045 3046 irq = RAC_seqStateRxFrameInterrupt.Value && RAC_seqStateRxFrameInterruptEnable.Value; 3047 if(irq) 3048 { 3049 this.Log(LogLevel.Debug, "{0}: SEQ_IRQ RX_FRAME set", this.GetTime()); 3050 } 3051 SeqRxFrameIRQ.Set(irq); 3052 3053 irq = RAC_seqStateRxPoweringDownInterrupt.Value && RAC_seqStateRxPoweringDownInterruptEnable.Value; 3054 if(irq) 3055 { 3056 this.Log(LogLevel.Debug, "{0}: SEQ_IRQ RX_PD set", this.GetTime()); 3057 } 3058 SeqRxPoweringDownIRQ.Set(irq); 3059 3060 irq = RAC_seqStateRx2RxInterrupt.Value && RAC_seqStateRx2RxInterruptEnable.Value; 3061 if(irq) 3062 { 3063 this.Log(LogLevel.Debug, "{0}: SEQ_IRQ RX_2_RX set", this.GetTime()); 3064 } 3065 SeqRx2RxIRQ.Set(irq); 3066 3067 irq = RAC_seqStateRxOverflowInterrupt.Value && RAC_seqStateRxOverflowInterruptEnable.Value; 3068 if(irq) 3069 { 3070 this.Log(LogLevel.Debug, "{0}: SEQ_IRQ RX_OVERFLOW set", this.GetTime()); 3071 } 3072 SeqRxOverflowIRQ.Set(irq); 3073 3074 irq = RAC_seqStateRx2TxInterrupt.Value && RAC_seqStateRx2TxInterruptEnable.Value; 3075 if(irq) 3076 { 3077 this.Log(LogLevel.Debug, "{0}: SEQ_IRQ RX_2_TX set", this.GetTime()); 3078 } 3079 SeqRx2TxIRQ.Set(irq); 3080 3081 irq = RAC_seqStateTxWarmInterrupt.Value && RAC_seqStateTxWarmInterruptEnable.Value; 3082 if(irq) 3083 { 3084 this.Log(LogLevel.Debug, "{0}: SEQ_IRQ TX_WARM set", this.GetTime()); 3085 } 3086 SeqTxWarmIRQ.Set(irq); 3087 3088 irq = RAC_seqStateTxInterrupt.Value && RAC_seqStateTxInterruptEnable.Value; 3089 if(irq) 3090 { 3091 this.Log(LogLevel.Debug, "{0}: SEQ_IRQ TX set", this.GetTime()); 3092 } 3093 SeqTxIRQ.Set(irq); 3094 3095 irq = RAC_seqStateTxPoweringDownInterrupt.Value && RAC_seqStateTxPoweringDownInterruptEnable.Value; 3096 if(irq) 3097 { 3098 this.Log(LogLevel.Debug, "{0}: SEQ_IRQ TX_PD set", this.GetTime()); 3099 } 3100 SeqTxPoweringDownIRQ.Set(irq); 3101 3102 irq = RAC_seqStateTx2RxInterrupt.Value && RAC_seqStateTx2RxInterruptEnable.Value; 3103 if(irq) 3104 { 3105 this.Log(LogLevel.Debug, "{0}: SEQ_IRQ TX_2_RX set", this.GetTime()); 3106 } 3107 SeqTx2RxIRQ.Set(irq); 3108 3109 irq = RAC_seqStateTx2TxInterrupt.Value && RAC_seqStateTx2TxInterruptEnable.Value; 3110 if(irq) 3111 { 3112 this.Log(LogLevel.Debug, "{0}: SEQ_IRQ TX_2_TX set", this.GetTime()); 3113 } 3114 SeqTx2TxIRQ.Set(irq); 3115 3116 irq = RAC_seqStateShutDownInterrupt.Value && RAC_seqStateShutDownInterruptEnable.Value; 3117 if(irq) 3118 { 3119 this.Log(LogLevel.Debug, "{0}: SEQ_IRQ SHUTDOWN set", this.GetTime()); 3120 } 3121 SeqShutdownIRQ.Set(irq); 3122 }); 3123 } 3124 TrySyncTime()3125 private bool TrySyncTime() 3126 { 3127 if(machine.SystemBus.TryGetCurrentCPU(out var cpu)) 3128 { 3129 cpu.SyncTime(); 3130 return true; 3131 } 3132 return false; 3133 } 3134 3135 #region FRC methods 3136 private int FRC_ActiveTransmitFrameDescriptor 3137 { 3138 // ACTIVETXFCD == 0 => FCD0 3139 // ACTIVETXFCD == 1 => FCD1 3140 get 3141 { 3142 return FRC_activeTransmitFrameDescriptor.Value ? 1 : 0; 3143 } 3144 set 3145 { 3146 if(value != 0 && value != 1) 3147 { 3148 this.Log(LogLevel.Error, "Setting illegal FRC_ActiveTransmitFrameDescriptor value."); 3149 return; 3150 } 3151 3152 FRC_activeTransmitFrameDescriptor.Value = (value == 1); 3153 } 3154 } 3155 3156 private int FRC_ActiveReceiveFrameDescriptor 3157 { 3158 // ACTIVERXFCD == 0 => FCD2 3159 // ACTIVERXFCD == 1 => FCD3 3160 get 3161 { 3162 return FRC_activeReceiveFrameDescriptor.Value ? 3 : 2; 3163 } 3164 set 3165 { 3166 if(value != 2 && value != 3) 3167 { 3168 this.Log(LogLevel.Error, "Setting illegal FRC_ActiveReceiveFrameDescriptor value."); 3169 return; 3170 } 3171 3172 FRC_activeReceiveFrameDescriptor.Value = (value == 3); 3173 } 3174 } 3175 FRC_UpdateRawMode()3176 private void FRC_UpdateRawMode() 3177 { 3178 if(!FRC_enableRawDataRandomNumberGenerator.Value || FRC_rxRawBlocked.Value || RAC_currentRadioState != RAC_RadioState.RxSearch) 3179 { 3180 return; 3181 } 3182 3183 switch(FRC_rxRawDataSelect.Value) { 3184 case FRC_RxRawDataMode.SingleItem: 3185 if(FRC_rxRawDataTriggerSelect.Value == FRC_RxRawDataTriggerMode.Immediate) 3186 { 3187 FRC_rxRawEventInterrupt.Value = true; 3188 FRC_rxRawBlocked.Value = true; 3189 } 3190 break; 3191 default: 3192 return; 3193 } 3194 UpdateInterrupts(); 3195 } 3196 FRC_AssembleFrame()3197 private byte[] FRC_AssembleFrame() 3198 { 3199 var frame = Enumerable.Empty<byte>(); 3200 3201 // MODEM_CONTROL1->SYNCDATA Defines if the sync word is part of the transmit payload or not. 3202 // If not, modulator adds SYNC in transmit. 3203 if(!MODEM_syncData.Value) 3204 { 3205 frame = frame.Concat(BitHelper.GetBytesFromValue(MODEM_TxSyncWord, (int)MODEM_SyncWordBytes, reverse: true)); 3206 } 3207 3208 var descriptor = FRC_frameDescriptor[FRC_ActiveTransmitFrameDescriptor]; 3209 var frameLength = 0u; 3210 var dynamicFrameLength = true; 3211 3212 switch(FRC_dynamicFrameLengthMode.Value) 3213 { 3214 case FRC_DynamicFrameLengthMode.Disable: 3215 dynamicFrameLength = false; 3216 break; 3217 case FRC_DynamicFrameLengthMode.SingleByte: 3218 case FRC_DynamicFrameLengthMode.SingleByteMSB: 3219 frameLength = BUFC_buffer[descriptor.BufferIndex].Peek((uint)FRC_lengthFieldLocation.Value); 3220 break; 3221 case FRC_DynamicFrameLengthMode.DualByteLSBFirst: 3222 case FRC_DynamicFrameLengthMode.DualByteMSBFirst: 3223 frameLength = ((BUFC_buffer[descriptor.BufferIndex].Peek((uint)FRC_lengthFieldLocation.Value + 1) << 8) 3224 | (BUFC_buffer[descriptor.BufferIndex].Peek((uint)FRC_lengthFieldLocation.Value))); 3225 3226 break; 3227 default: 3228 this.Log(LogLevel.Error, "Unimplemented DFL mode."); 3229 this.Log(LogLevel.Error, "Failed to assemble a frame, partial frame: {0}", BitConverter.ToString(frame.ToArray())); 3230 return new byte[0]; 3231 } 3232 3233 if(dynamicFrameLength && !FRC_TrySetFrameLength(frameLength)) 3234 { 3235 this.Log(LogLevel.Error, "Failed to assemble a frame, partial frame: {0}", BitConverter.ToString(frame.ToArray())); 3236 return new byte[0]; 3237 } 3238 3239 FRC_wordCounter.Value = 0; 3240 for(var subframe = 0; FRC_wordCounter.Value < FRC_FrameLength; ++subframe) 3241 { 3242 var crcLength = (descriptor.includeCrc.Value && dynamicFrameLength && FRC_dynamicFrameCrcIncluded.Value) ? CRC_CrcWidth : 0; 3243 // Assemble subframe 3244 var length = (uint)(FRC_FrameLength - FRC_wordCounter.Value); 3245 if(descriptor.Words.HasValue) 3246 { 3247 length = Math.Min(length, descriptor.Words.Value); 3248 } 3249 3250 length -= crcLength; 3251 if(length < 0) 3252 { 3253 this.Log(LogLevel.Error, "adding crc would exceed DFL"); 3254 this.Log(LogLevel.Error, "Failed to assemble a frame, partial frame: {0}", BitConverter.ToString(frame.ToArray())); 3255 return new byte[0]; 3256 } 3257 if(!BUFC_buffer[descriptor.BufferIndex].TryReadBytes(length, out var payload)) 3258 { 3259 this.Log(LogLevel.Error, "Read only {0} bytes of {1}, total length={2}", payload.Length, length, FRC_FrameLength); 3260 this.Log(LogLevel.Error, "Failed to assemble a frame, partial frame: {0}", BitConverter.ToString(frame.Concat(payload).ToArray())); 3261 FRC_txUnderflowInterrupt.Value = true; 3262 return new byte[0]; 3263 } 3264 frame = frame.Concat(payload); 3265 FRC_wordCounter.Value += length; 3266 3267 if(descriptor.includeCrc.Value) 3268 { 3269 frame = frame.Concat(CRC_CalculateCRC()); 3270 FRC_wordCounter.Value += crcLength; 3271 } 3272 3273 // Select next frame descriptor 3274 switch(FRC_txFrameDescriptorMode.Value) 3275 { 3276 case FRC_FrameDescriptorMode.FrameDescriptorMode0: 3277 case FRC_FrameDescriptorMode.FrameDescriptorMode3: 3278 break; 3279 case FRC_FrameDescriptorMode.FrameDescriptorMode1: 3280 FRC_ActiveTransmitFrameDescriptor = subframe % 2; 3281 break; 3282 case FRC_FrameDescriptorMode.FrameDescriptorMode2: 3283 FRC_ActiveTransmitFrameDescriptor = 1; 3284 break; 3285 } 3286 descriptor = FRC_frameDescriptor[FRC_ActiveTransmitFrameDescriptor]; 3287 } 3288 3289 // Prepare for next frame 3290 switch(FRC_txFrameDescriptorMode.Value) 3291 { 3292 case FRC_FrameDescriptorMode.FrameDescriptorMode0: 3293 case FRC_FrameDescriptorMode.FrameDescriptorMode1: 3294 case FRC_FrameDescriptorMode.FrameDescriptorMode2: 3295 FRC_ActiveTransmitFrameDescriptor = 0; 3296 break; 3297 case FRC_FrameDescriptorMode.FrameDescriptorMode3: 3298 FRC_ActiveTransmitFrameDescriptor = 1; 3299 break; 3300 } 3301 3302 this.Log(LogLevel.Noisy, "Frame assembled: {0}", BitConverter.ToString(frame.ToArray())); 3303 return frame.ToArray(); 3304 } 3305 FRC_SaveRxDescriptorsBufferWriteOffset()3306 private void FRC_SaveRxDescriptorsBufferWriteOffset() 3307 { 3308 // Descriptors 2 and 3 are used for RX. 3309 BUFC_buffer[FRC_frameDescriptor[2].BufferIndex].UpdateWriteStartOffset(); 3310 BUFC_buffer[FRC_frameDescriptor[3].BufferIndex].UpdateWriteStartOffset(); 3311 } 3312 FRC_RestoreRxDescriptorsBufferWriteOffset()3313 private void FRC_RestoreRxDescriptorsBufferWriteOffset() 3314 { 3315 // Descriptors 2 and 3 are used for RX. 3316 BUFC_buffer[FRC_frameDescriptor[2].BufferIndex].UpdateWriteStartOffset(); 3317 BUFC_buffer[FRC_frameDescriptor[3].BufferIndex].UpdateWriteStartOffset(); 3318 } 3319 FRC_DisassembleCurrentFrame(bool forceCrcError)3320 private void FRC_DisassembleCurrentFrame(bool forceCrcError) 3321 { 3322 var frameLength = 0u; 3323 var dynamicFrameLength = true; 3324 switch(FRC_dynamicFrameLengthMode.Value) 3325 { 3326 case FRC_DynamicFrameLengthMode.Disable: 3327 dynamicFrameLength = false; 3328 break; 3329 case FRC_DynamicFrameLengthMode.SingleByte: 3330 case FRC_DynamicFrameLengthMode.SingleByteMSB: 3331 frameLength = (uint)currentFrame[currentFrameOffset + FRC_lengthFieldLocation.Value]; 3332 break; 3333 case FRC_DynamicFrameLengthMode.DualByteLSBFirst: 3334 case FRC_DynamicFrameLengthMode.DualByteMSBFirst: 3335 frameLength = (uint)currentFrame[currentFrameOffset + FRC_lengthFieldLocation.Value + 1] << 8 3336 | (uint)currentFrame[currentFrameOffset + FRC_lengthFieldLocation.Value]; 3337 break; 3338 default: 3339 this.Log(LogLevel.Error, "Unimplemented DFL mode."); 3340 return; 3341 } 3342 if(dynamicFrameLength && !FRC_TrySetFrameLength(frameLength)) 3343 { 3344 this.Log(LogLevel.Error, "DisassembleFrame FRAMEERROR"); 3345 return; // FRAMEERROR 3346 } 3347 3348 FRC_wordCounter.Value = 0; 3349 for(var subframe = 0; FRC_wordCounter.Value < FRC_FrameLength; ++subframe) 3350 { 3351 var descriptor = FRC_frameDescriptor[FRC_ActiveReceiveFrameDescriptor]; 3352 var startingWriteOffset = BUFC_buffer[descriptor.BufferIndex].WriteOffset; 3353 3354 // Assemble subframe 3355 var length = FRC_FrameLength - FRC_wordCounter.Value; 3356 if(descriptor.Words.HasValue) 3357 { 3358 length = Math.Min(length, descriptor.Words.Value); 3359 } 3360 else if(dynamicFrameLength && descriptor.includeCrc.Value && FRC_dynamicFrameCrcIncluded.Value) 3361 { 3362 length = checked(length - CRC_CrcWidth); // TODO: what happends when length < CrcWidth? 3363 } 3364 if(currentFrameOffset + length > (uint)currentFrame.Length) 3365 { 3366 this.Log(LogLevel.Error, "frame too small, payload"); 3367 return; 3368 } 3369 var payload = currentFrame.Skip((int)currentFrameOffset).Take((int)length); 3370 var skipCount = (FRC_wordCounter.Value < FRC_packetBufferStartAddress.Value) 3371 ? (FRC_packetBufferStartAddress.Value - FRC_wordCounter.Value) : 0; 3372 var pktCaptureBuff = currentFrame.Skip((int)(currentFrameOffset + skipCount)).Take((int)(length - skipCount)); 3373 currentFrameOffset += (uint)length; 3374 FRC_wordCounter.Value += length; 3375 3376 FRC_WritePacketCaptureBuffer(pktCaptureBuff.ToArray()); 3377 3378 if(!BUFC_buffer[descriptor.BufferIndex].TryWriteBytes(payload.ToArray(), out var written)) 3379 { 3380 this.Log(LogLevel.Error, "Written only {0} bytes from {1}", written, length); 3381 if(BUFC_buffer[descriptor.BufferIndex].overflow.Value) 3382 { 3383 FRC_rxOverflowInterrupt.Value = true; 3384 FRC_seqRxOverflowInterrupt.Value = true; 3385 UpdateInterrupts(); 3386 RAC_UpdateRadioStateMachine(RAC_RadioStateMachineSignal.RxOverflow); 3387 } 3388 } 3389 else if(descriptor.includeCrc.Value) 3390 { 3391 var crc = currentFrame.Skip((int)currentFrameOffset).Take((int)CRC_CrcWidth).ToArray(); 3392 // TODO: Check CRC 3393 // FRC_frameErrorInterrupt.Value |= crc check failed 3394 currentFrameOffset += (uint)crc.Length; 3395 if(crc.Length != CRC_CrcWidth) 3396 { 3397 this.Log(LogLevel.Error, "frame too small, crc"); 3398 } 3399 if(dynamicFrameLength && FRC_dynamicFrameCrcIncluded.Value) 3400 { 3401 FRC_wordCounter.Value += (uint)crc.Length; 3402 } 3403 if(FRC_rxStoreCrc.Value) 3404 { 3405 if(!BUFC_buffer[descriptor.BufferIndex].TryWriteBytes(crc, out written)) 3406 { 3407 this.Log(LogLevel.Error, "Written only {0} bytes from {1}", written, crc.Length); 3408 if(BUFC_buffer[descriptor.BufferIndex].overflow.Value) 3409 { 3410 FRC_rxOverflowInterrupt.Value = true; 3411 FRC_seqRxOverflowInterrupt.Value = true; 3412 UpdateInterrupts(); 3413 RAC_UpdateRadioStateMachine(RAC_RadioStateMachineSignal.RxOverflow); 3414 } 3415 } 3416 } 3417 } 3418 3419 // Select next frame descriptor 3420 switch(FRC_rxFrameDescriptorMode.Value) 3421 { 3422 case FRC_FrameDescriptorMode.FrameDescriptorMode0: 3423 case FRC_FrameDescriptorMode.FrameDescriptorMode3: 3424 break; 3425 case FRC_FrameDescriptorMode.FrameDescriptorMode1: 3426 FRC_ActiveReceiveFrameDescriptor = 2 + subframe % 2; 3427 break; 3428 case FRC_FrameDescriptorMode.FrameDescriptorMode2: 3429 FRC_ActiveReceiveFrameDescriptor = 3; 3430 break; 3431 } 3432 } 3433 3434 // RX TRAIL DATA 3435 { 3436 // Appended ascending order of field's bit index 3437 var descriptor = FRC_frameDescriptor[FRC_ActiveReceiveFrameDescriptor]; 3438 if(FRC_rxAppendRssi.Value) 3439 { 3440 // AGC RSSI register value? or RSSIINT field? 3441 // RSSI value [...] represented as a signed 2-complement integer dB number. 3442 BUFC_buffer[descriptor.BufferIndex].WriteData = 0x0; 3443 } 3444 if(FRC_rxAppendStatus.Value) 3445 { 3446 BUFC_buffer[descriptor.BufferIndex].WriteData = (forceCrcError) ? 0x00U : 0x80U; 3447 } 3448 if (FRC_rxAppendProtimerCc0base.Value) 3449 { 3450 BUFC_buffer[descriptor.BufferIndex].WriteData = ((uint)PROTIMER_captureCompareChannel[0].baseValue.Value & 0xFF); 3451 BUFC_buffer[descriptor.BufferIndex].WriteData = (((uint)PROTIMER_captureCompareChannel[0].baseValue.Value >> 8) & 0xFF); 3452 } 3453 if(FRC_rxAppendProtimerCc0LowWrap.Value) 3454 { 3455 BUFC_buffer[descriptor.BufferIndex].WriteData = ((uint)PROTIMER_captureCompareChannel[0].wrapValue.Value & 0xFF); 3456 BUFC_buffer[descriptor.BufferIndex].WriteData = (((uint)PROTIMER_captureCompareChannel[0].wrapValue.Value >> 8) & 0xFF); 3457 } 3458 if(FRC_rxAppendProtimerCc0HighWrap.Value) 3459 { 3460 BUFC_buffer[descriptor.BufferIndex].WriteData = (((uint)PROTIMER_captureCompareChannel[0].wrapValue.Value >> 16) & 0xFF); 3461 BUFC_buffer[descriptor.BufferIndex].WriteData = (((uint)PROTIMER_captureCompareChannel[0].wrapValue.Value >> 24) & 0xFF); 3462 } 3463 } 3464 3465 // Prepare for next frame 3466 switch(FRC_rxFrameDescriptorMode.Value) 3467 { 3468 case FRC_FrameDescriptorMode.FrameDescriptorMode0: 3469 case FRC_FrameDescriptorMode.FrameDescriptorMode1: 3470 case FRC_FrameDescriptorMode.FrameDescriptorMode2: 3471 FRC_ActiveReceiveFrameDescriptor = 2; 3472 break; 3473 case FRC_FrameDescriptorMode.FrameDescriptorMode3: 3474 FRC_ActiveReceiveFrameDescriptor = 3; 3475 break; 3476 } 3477 3478 this.Log(LogLevel.Noisy, "Frame disassembled, frame descriptor now is {0}", FRC_ActiveReceiveFrameDescriptor); 3479 } 3480 FRC_TrySetFrameLength(uint frameLength)3481 private bool FRC_TrySetFrameLength(uint frameLength) 3482 { 3483 switch(FRC_dynamicFrameLengthMode.Value) 3484 { 3485 case FRC_DynamicFrameLengthMode.SingleByte: 3486 case FRC_DynamicFrameLengthMode.DualByteLSBFirst: 3487 break; 3488 case FRC_DynamicFrameLengthMode.SingleByteMSB: 3489 case FRC_DynamicFrameLengthMode.DualByteMSBFirst: 3490 frameLength = (frameLength >> 8) | ((frameLength & 0xFF) << 8); 3491 break; 3492 default: 3493 this.Log(LogLevel.Error, "Invalid DFL mode."); 3494 return false; 3495 } 3496 frameLength >>= (byte)FRC_dynamicFrameLengthBitShift.Value; 3497 frameLength &= (1u << (byte)FRC_dynamicFrameLengthBits.Value) - 1; 3498 frameLength += (uint)FRC_dynamicFrameLengthOffset.Value; // TODO signed 2's complement 3499 if(frameLength < FRC_minDecodedLength.Value || FRC_maxDecodedLength.Value < frameLength) 3500 { 3501 FRC_frameErrorInterrupt.Value = true; 3502 FRC_seqFrameErrorInterrupt.Value = true; 3503 UpdateInterrupts(); 3504 return false; 3505 } 3506 3507 FRC_frameLength.Value = frameLength; 3508 return true; 3509 } 3510 FRC_CheckSyncWords(byte[] frame)3511 private bool FRC_CheckSyncWords(byte[] frame) 3512 { 3513 if(frame.Length < (int)MODEM_SyncWordBytes) 3514 { 3515 return false; 3516 } 3517 var syncWord = BitHelper.ToUInt32(frame, 0, (int)MODEM_SyncWordBytes, true); 3518 var foundSyncWord0 = (syncWord == MODEM_SyncWord0); 3519 var foundSyncWord1 = (MODEM_dualSync.Value && (syncWord == MODEM_SyncWord1)); 3520 3521 if(!foundSyncWord0 && !foundSyncWord1) 3522 { 3523 return false; 3524 } 3525 3526 MODEM_rxPreambleDetectedInterrupt.Value = true; 3527 MODEM_seqRxPreambleDetectedInterrupt.Value = true; 3528 3529 if(foundSyncWord0) 3530 { 3531 PROTIMER_TriggerEvent(PROTIMER_Event.Syncword0Detected); 3532 } 3533 3534 if(foundSyncWord1) 3535 { 3536 PROTIMER_TriggerEvent(PROTIMER_Event.Syncword1Detected); 3537 } 3538 PROTIMER_TriggerEvent(PROTIMER_Event.Syncword0Or1Detected); 3539 3540 for(var i = 0; i < PROTIMER_NumberOfCaptureCompareChannels; ++i) 3541 { 3542 if(PROTIMER_captureCompareChannel[i].enable.Value && PROTIMER_captureCompareChannel[i].mode.Value == PROTIMER_CaptureCompareMode.Capture) 3543 { 3544 var triggered = false; 3545 switch(PROTIMER_captureCompareChannel[i].captureInputSource.Value) 3546 { 3547 case PROTIMER_CaptureInputSource.DemodulatorFoundSyncWord0: 3548 triggered |= foundSyncWord0; 3549 break; 3550 case PROTIMER_CaptureInputSource.DemodulatorFoundSyncWord1: 3551 triggered |= foundSyncWord1; 3552 break; 3553 case PROTIMER_CaptureInputSource.DemodulatorFoundSyncWord0or1: 3554 triggered = true; 3555 break; 3556 } 3557 if(triggered) 3558 { 3559 PROTIMER_captureCompareChannel[i].Capture((ushort)PROTIMER_PreCounterValue, PROTIMER_BaseCounterValue, PROTIMER_WrapCounterValue); 3560 PROTIMER_TriggerEvent((PROTIMER_Event)((uint)PROTIMER_Event.CaptureCompareChannel0Event + i)); 3561 } 3562 } 3563 } 3564 3565 MODEM_rxFrameWithSyncWord0DetectedInterrupt.Value |= foundSyncWord0; 3566 MODEM_seqRxFrameWithSyncWord0DetectedInterrupt.Value = MODEM_rxFrameWithSyncWord0DetectedInterrupt.Value; 3567 MODEM_rxFrameWithSyncWord1DetectedInterrupt.Value |= foundSyncWord1; 3568 MODEM_seqRxFrameWithSyncWord1DetectedInterrupt.Value = MODEM_rxFrameWithSyncWord1DetectedInterrupt.Value; 3569 MODEM_frameDetectedId.Value = !foundSyncWord0 && foundSyncWord1; 3570 UpdateInterrupts(); 3571 3572 return true; 3573 } 3574 FRC_WritePacketCaptureBuffer(byte[] data)3575 private void FRC_WritePacketCaptureBuffer(byte[] data) 3576 { 3577 if (FRC_packetBufferCount.Value > FRC_PacketBufferCaptureSize) 3578 { 3579 this.Log(LogLevel.Error, "FRC_packetBufferCount exceeded max value!"); 3580 } 3581 3582 for(var i = 0; i < data.Length; i++) 3583 { 3584 if (FRC_packetBufferCount.Value == FRC_PacketBufferCaptureSize) 3585 { 3586 break; 3587 } 3588 3589 FRC_packetBufferCapture[FRC_packetBufferCount.Value] = data[i]; 3590 FRC_packetBufferCount.Value++; 3591 3592 if (FRC_packetBufferCount.Value == 1) 3593 { 3594 FRC_packetBufferStartInterrupt.Value = true; 3595 FRC_seqPacketBufferStartInterrupt.Value = true; 3596 UpdateInterrupts(); 3597 } 3598 } 3599 } 3600 FRC_CheckPacketCaptureBufferThreshold()3601 private void FRC_CheckPacketCaptureBufferThreshold() 3602 { 3603 if (FRC_packetBufferThresholdEnable.Value 3604 && FRC_packetBufferCount.Value >= FRC_packetBufferThreshold.Value) 3605 { 3606 FRC_packetBufferThresholdInterrupt.Value = true; 3607 FRC_seqPacketBufferThresholdInterrupt.Value = true; 3608 } 3609 } 3610 FRC_RxAbortCommand()3611 private void FRC_RxAbortCommand() 3612 { 3613 // CMD_RXABORT takes effect when FRC is active. When RAC in RXWARM and RXSEARCH state, 3614 // since FRC is still in IDLE state this command doesn't do anything. 3615 if (RAC_currentRadioState != RAC_RadioState.RxFrame) 3616 { 3617 return; 3618 } 3619 3620 // When set, the active receive BUFC buffer is restored for received frames that trigger the RXABORTED interrupt flag. This 3621 // means that the WRITEOFFSET is restored to the value prior to receiving this frame. READOFFSET is not modified. 3622 if (FRC_rxBufferRestoreOnRxAborted.Value) 3623 { 3624 FRC_RestoreRxDescriptorsBufferWriteOffset(); 3625 } 3626 3627 // RENODE-354 3628 //if (TRACKABFRAME) 3629 //{ 3630 // TODO 3631 //} 3632 3633 FRC_rxAbortedInterrupt.Value = true; 3634 FRC_seqRxAbortedInterrupt.Value = true; 3635 RAC_UpdateRadioStateMachine(RAC_RadioStateMachineSignal.RxAbort); 3636 UpdateInterrupts(); 3637 } 3638 #endregion 3639 3640 #region RAC methods RAC_ChangeRadioState(RAC_RadioState newState)3641 private void RAC_ChangeRadioState(RAC_RadioState newState) 3642 { 3643 if (newState != RAC_currentRadioState) 3644 { 3645 RAC_previous3RadioState = RAC_previous2RadioState; 3646 RAC_previous2RadioState = RAC_previous1RadioState; 3647 RAC_previous1RadioState = RAC_currentRadioState; 3648 RAC_currentRadioState = newState; 3649 } 3650 } 3651 RAC_ClearOngoingTxOrRx()3652 private void RAC_ClearOngoingTxOrRx() 3653 { 3654 RAC_ClearOngoingRx(); 3655 RAC_ClearOngoingTx(); 3656 } 3657 RAC_ClearOngoingRx()3658 private void RAC_ClearOngoingRx() 3659 { 3660 FRC_rxFrameIrqClearedPending = false; 3661 FRC_rxDonePending = false; 3662 rxTimer.Enabled = false; 3663 RAC_ongoingRxCollided = false; 3664 RAC_internalRxState = RAC_InternalRxState.Idle; 3665 } 3666 RAC_ClearOngoingTx()3667 private void RAC_ClearOngoingTx() 3668 { 3669 txTimer.Enabled = false; 3670 if (RAC_internalTxState != RAC_InternalTxState.Idle) 3671 { 3672 InterferenceQueue.Remove(this); 3673 } 3674 RAC_internalTxState = RAC_InternalTxState.Idle; 3675 } 3676 RAC_UpdateRadioStateMachine(RAC_RadioStateMachineSignal signal = RAC_RadioStateMachineSignal.None)3677 private void RAC_UpdateRadioStateMachine(RAC_RadioStateMachineSignal signal = RAC_RadioStateMachineSignal.None) 3678 { 3679 //this.Log(LogLevel.Debug, "RAC_UpdateRadioStateMachine signal={0} current state={1} at {2}", signal, RAC_currentRadioState, GetTime()); 3680 3681 machine.ClockSource.ExecuteInLock(delegate { 3682 RAC_RadioState previousState = RAC_currentRadioState; 3683 3684 // Super State Transition Priority 3685 // 1. RESET 3686 // 2. Sequencer breakpoint triggered 3687 // 3. FORCESTATE 3688 // 4. FORCEDISABLE 3689 // 5. FORCETX 3690 if (signal == RAC_RadioStateMachineSignal.Reset) 3691 { 3692 RAC_ClearOngoingTxOrRx(); 3693 RAC_ChangeRadioState(RAC_RadioState.Off); 3694 } 3695 //else if (sequencer breakpoint triggered) 3696 //{ 3697 // When a sequencer breakpoint is triggered, the RSM will not change state. This allows debugging and 3698 // single stepping to be performed, without state transitions changing the sequencer program flow. 3699 //} 3700 else if (RAC_forceStateActive.Value) 3701 { 3702 RAC_ClearOngoingTxOrRx(); 3703 RAC_ChangeRadioState(RAC_forceStateTransition.Value); 3704 RAC_forceStateActive.Value = false; 3705 } 3706 else if (RAC_forceDisable.Value && RAC_currentRadioState == RAC_RadioState.Off) 3707 { 3708 // The RSM remains in OFF as long as the FORCEDISABLE bit is set. 3709 } 3710 else if (RAC_forceDisable.Value && RAC_currentRadioState != RAC_RadioState.Shutdown) 3711 { 3712 RAC_ClearOngoingTxOrRx(); 3713 RAC_ChangeRadioState(RAC_RadioState.Shutdown); 3714 } 3715 // FORCETX will make the RSM enter TX. If already in TX, TX is entered through TX2TX. For any other state, 3716 // the transition goes through the TXWARM state. The FORCETX is active by issuing the FORCETX command in RAC_CMD 3717 // or by triggering by Peripheral Reflex System (PRS). PRS triggering is configured by setting the PRSFORCETX 3718 // and setting the PRSFORCETXSEL, both in RAC_CTRL. 3719 else if (signal == RAC_RadioStateMachineSignal.ForceTx /* TODO: || (PRSFORCETX && PRSFORCETXSEL)*/) 3720 { 3721 if (RAC_currentRadioState == RAC_RadioState.Tx) 3722 { 3723 RAC_ClearOngoingTx(); 3724 RAC_ChangeRadioState(RAC_RadioState.Tx2Tx); 3725 } 3726 else 3727 { 3728 RAC_ChangeRadioState(RAC_RadioState.TxWarm); 3729 } 3730 } 3731 else 3732 { 3733 switch(RAC_currentRadioState) 3734 { 3735 case RAC_RadioState.Shutdown: 3736 { 3737 if (!RAC_exitShutdownDisable.Value) 3738 { 3739 RAC_ChangeRadioState(RAC_RadioState.Off); 3740 } 3741 break; 3742 } 3743 case RAC_RadioState.Off: 3744 { 3745 if (signal == RAC_RadioStateMachineSignal.TxEnable) 3746 { 3747 RAC_ChangeRadioState(RAC_RadioState.TxWarm); 3748 } else if (RAC_RxEnable) 3749 { 3750 RAC_ChangeRadioState(RAC_RadioState.RxWarm); 3751 } 3752 break; 3753 } 3754 case RAC_RadioState.TxWarm: 3755 { 3756 if (signal == RAC_RadioStateMachineSignal.TxWarmIrqCleared) 3757 { 3758 if (RAC_TxEnable) 3759 { 3760 RAC_ChangeRadioState(RAC_RadioState.Tx); 3761 } 3762 else 3763 { 3764 RAC_ChangeRadioState(RAC_RadioState.TxPoweringDown); 3765 } 3766 } 3767 break; 3768 } 3769 case RAC_RadioState.RxWarm: 3770 { 3771 if (signal == RAC_RadioStateMachineSignal.RxWarmIrqCleared) 3772 { 3773 RAC_ChangeRadioState(RAC_RadioState.RxSearch); 3774 } 3775 break; 3776 } 3777 case RAC_RadioState.RxPoweringDown: 3778 { 3779 if (signal == RAC_RadioStateMachineSignal.RxPowerDownIrqCleared) 3780 { 3781 RAC_ChangeRadioState(RAC_RadioState.Off); 3782 } 3783 break; 3784 } 3785 case RAC_RadioState.TxPoweringDown: 3786 { 3787 if (signal == RAC_RadioStateMachineSignal.TxPowerDownIrqCleared) 3788 { 3789 RAC_ChangeRadioState(RAC_RadioState.Off); 3790 } 3791 break; 3792 } 3793 case RAC_RadioState.RxOverflow: 3794 { 3795 if (signal == RAC_RadioStateMachineSignal.ClearRxOverflow) 3796 { 3797 RAC_ChangeRadioState(RAC_RadioState.Off); 3798 } 3799 break; 3800 } 3801 case RAC_RadioState.Rx2Rx: 3802 { 3803 if (signal == RAC_RadioStateMachineSignal.Rx2RxIrqCleared) 3804 { 3805 RAC_ChangeRadioState(RAC_RadioState.RxSearch); 3806 } 3807 break; 3808 } 3809 case RAC_RadioState.Rx2Tx: 3810 { 3811 if (signal == RAC_RadioStateMachineSignal.RxOverflow) 3812 { 3813 RAC_ChangeRadioState(RAC_RadioState.RxOverflow); 3814 } 3815 else if (signal == RAC_RadioStateMachineSignal.Rx2TxIrqCleared) 3816 { 3817 if (RAC_TxEnable || RAC_txAfterFrameActive.Value) 3818 { 3819 RAC_ChangeRadioState(RAC_RadioState.Tx); 3820 } 3821 else if (RAC_RxEnable) 3822 { 3823 RAC_ChangeRadioState(RAC_RadioState.Tx2Rx); 3824 } 3825 else 3826 { 3827 RAC_ChangeRadioState(RAC_RadioState.TxPoweringDown); 3828 } 3829 } 3830 break; 3831 } 3832 case RAC_RadioState.Tx2Rx: 3833 { 3834 if (signal == RAC_RadioStateMachineSignal.Tx2RxIrqCleared) 3835 { 3836 RAC_ChangeRadioState(RAC_RadioState.RxSearch); 3837 } 3838 break; 3839 } 3840 case RAC_RadioState.Tx2Tx: 3841 { 3842 if (signal == RAC_RadioStateMachineSignal.Tx2TxIrqCleared) 3843 { 3844 if (RAC_TxEnable) 3845 { 3846 RAC_ChangeRadioState(RAC_RadioState.Tx); 3847 } 3848 else if (RAC_RxEnable) 3849 { 3850 RAC_ChangeRadioState(RAC_RadioState.Tx2Rx); 3851 } 3852 else 3853 { 3854 RAC_ChangeRadioState(RAC_RadioState.TxPoweringDown); 3855 } 3856 } 3857 break; 3858 } 3859 case RAC_RadioState.RxSearch: 3860 { 3861 if (signal == RAC_RadioStateMachineSignal.FrameDetected) 3862 { 3863 RAC_ChangeRadioState(RAC_RadioState.RxFrame); 3864 } 3865 else if (signal == RAC_RadioStateMachineSignal.TxEnable) 3866 { 3867 RAC_ChangeRadioState(RAC_RadioState.Rx2Tx); 3868 } 3869 else if (signal == RAC_RadioStateMachineSignal.RxCalibration) 3870 { 3871 RAC_ChangeRadioState(RAC_RadioState.RxWarm); 3872 } 3873 else 3874 { 3875 if (!RAC_RxEnable) 3876 { 3877 RAC_ChangeRadioState(RAC_RadioState.RxPoweringDown); 3878 } 3879 3880 } 3881 break; 3882 } 3883 case RAC_RadioState.RxFrame: 3884 { 3885 if (signal == RAC_RadioStateMachineSignal.RxOverflow) 3886 { 3887 RAC_ClearOngoingRx(); 3888 RAC_ChangeRadioState(RAC_RadioState.RxOverflow); 3889 } 3890 // Here we should just move to the next state when the FRC fully received a frame. 3891 // However, we have a race condition for which firing the RXFRAME_IrqHandler() with the radio state 3892 // already transitioned to the next state results in unexpected behavior from a software perspective 3893 // (which results in the RX_Complete() firing from RXFRAME_IrqHandler()). 3894 // To cope with this we progress to the next state only if both the RXFRAME IRQ flag has been cleared 3895 // and the FRC has completed RXing a frame. 3896 else if (signal == RAC_RadioStateMachineSignal.RxFrameIrqCleared 3897 || signal == RAC_RadioStateMachineSignal.RxDone 3898 || signal == RAC_RadioStateMachineSignal.RxAbort) 3899 { 3900 if (signal == RAC_RadioStateMachineSignal.RxFrameIrqCleared) 3901 { 3902 FRC_rxFrameIrqClearedPending = true; 3903 3904 } 3905 if (signal == RAC_RadioStateMachineSignal.RxDone) 3906 { 3907 FRC_rxDonePending = true; 3908 } 3909 3910 if (signal == RAC_RadioStateMachineSignal.RxAbort 3911 || (FRC_rxFrameIrqClearedPending && FRC_rxDonePending)) 3912 { 3913 RAC_ClearOngoingRx(); 3914 3915 if (RAC_TxEnable || RAC_txAfterFramePending.Value) 3916 { 3917 RAC_ChangeRadioState(RAC_RadioState.Rx2Tx); 3918 } 3919 else if (RAC_RxEnable) 3920 { 3921 RAC_ChangeRadioState(RAC_RadioState.Rx2Rx); 3922 } 3923 else 3924 { 3925 RAC_ChangeRadioState(RAC_RadioState.RxPoweringDown); 3926 } 3927 } 3928 } 3929 break; 3930 } 3931 case RAC_RadioState.Tx: 3932 { 3933 if (signal == RAC_RadioStateMachineSignal.TxDisable) 3934 { 3935 RAC_ClearOngoingTx(); 3936 3937 if (RAC_RxEnable) 3938 { 3939 RAC_ChangeRadioState(RAC_RadioState.Tx2Rx); 3940 } 3941 else 3942 { 3943 RAC_ChangeRadioState(RAC_RadioState.TxPoweringDown); 3944 } 3945 } 3946 else if (signal == RAC_RadioStateMachineSignal.TxDone) // FRC ends TX 3947 { 3948 if (RAC_TxEnable || RAC_txAfterFramePending.Value) 3949 { 3950 RAC_ChangeRadioState(RAC_RadioState.Tx2Tx); 3951 } 3952 else if (RAC_RxEnable) 3953 { 3954 RAC_ChangeRadioState(RAC_RadioState.Tx2Rx); 3955 } 3956 else 3957 { 3958 RAC_ChangeRadioState(RAC_RadioState.TxPoweringDown); 3959 } 3960 } 3961 break; 3962 } 3963 default: 3964 { 3965 this.Log(LogLevel.Error, "RAC Radio State Machine Update, invalid state"); 3966 break; 3967 } 3968 } 3969 } 3970 3971 if (previousState != RAC_currentRadioState) 3972 { 3973 this.Log(LogBasicRadioActivityAsError ? LogLevel.Error : LogLevel.Info, "RSM Update at {0}, signal:{1} seqTimer={2} channel={3} ({4}), transition: {5}->{6} (TX={7} RX={8}) Lbt={9}", 3974 GetTime(), signal, seqTimer.Value, Channel, (MODEM_viterbiDemodulatorEnable.Value ? "BLE" : "802.15.4"), previousState, RAC_currentRadioState, RAC_internalTxState, RAC_internalRxState, PROTIMER_listenBeforeTalkState); 3975 3976 // On a state transition, the STimer is always restarted from 0 3977 RAC_SeqTimerRestart(0, RAC_seqTimerLimit); 3978 3979 switch(RAC_currentRadioState) 3980 { 3981 case RAC_RadioState.Off: 3982 RAC_seqStateOffInterrupt.Value = true; 3983 break; 3984 case RAC_RadioState.RxWarm: 3985 RAC_seqStateRxWarmInterrupt.Value = true; 3986 break; 3987 case RAC_RadioState.RxSearch: 3988 // Reset PKTBUFCOUNT when entering in RxSearch 3989 FRC_packetBufferCount.Value = 0; 3990 RAC_seqStateRxSearchInterrupt.Value = true; 3991 MODEM_demodulatorState.Value = MODEM_DemodulatorState.PreambleSearch; 3992 FRC_UpdateRawMode(); 3993 break; 3994 case RAC_RadioState.RxFrame: 3995 RAC_seqStateRxFrameInterrupt.Value = true; 3996 MODEM_demodulatorState.Value = MODEM_DemodulatorState.RxFrame; 3997 break; 3998 case RAC_RadioState.RxPoweringDown: 3999 RAC_seqStateRxPoweringDownInterrupt.Value = true; 4000 break; 4001 case RAC_RadioState.Rx2Rx: 4002 RAC_seqStateRx2RxInterrupt.Value = true; 4003 break; 4004 case RAC_RadioState.RxOverflow: 4005 RAC_seqStateRxOverflowInterrupt.Value = true; 4006 break; 4007 case RAC_RadioState.Rx2Tx: 4008 RAC_seqStateRx2TxInterrupt.Value = true; 4009 break; 4010 case RAC_RadioState.TxWarm: 4011 RAC_seqStateTxWarmInterrupt.Value = true; 4012 break; 4013 case RAC_RadioState.Tx: 4014 RAC_seqStateTxInterrupt.Value = true; 4015 // We assemble and "transmit" the frame immediately so that receiver nodes 4016 // can transition from RX_SEARCH to RX_FRAME immediately. 4017 // We use timers to properly time the completion of the transmission process. 4018 var frame = FRC_AssembleFrame(); 4019 TransmitFrame(frame); 4020 break; 4021 case RAC_RadioState.TxPoweringDown: 4022 RAC_seqStateTxPoweringDownInterrupt.Value = true; 4023 break; 4024 case RAC_RadioState.Tx2Rx: 4025 RAC_seqStateTx2RxInterrupt.Value = true; 4026 break; 4027 case RAC_RadioState.Tx2Tx: 4028 RAC_seqStateTx2TxInterrupt.Value = true; 4029 break; 4030 case RAC_RadioState.Shutdown: 4031 RAC_seqStateShutDownInterrupt.Value = true; 4032 break; 4033 default: 4034 this.Log(LogLevel.Error, "Invalid Radio State ({0}).", RAC_currentRadioState); 4035 break; 4036 } 4037 4038 if (RAC_currentRadioState != RAC_RadioState.RxSearch && RAC_currentRadioState != RAC_RadioState.RxFrame) 4039 { 4040 MODEM_demodulatorState.Value = MODEM_DemodulatorState.Off; 4041 } 4042 4043 AGC_UpdateRssiState(); 4044 4045 // If we just entered RxSearch state, we should restart RSSI sampling. 4046 // However, for performance reasons, we rely on the InterferenceQueue notifications, 4047 // so we simply update the RSSI here. 4048 if (RAC_currentRadioState == RAC_RadioState.RxSearch) 4049 { 4050 AGC_UpdateRssi(); 4051 } 4052 // If entered a state other than RxSearch or RxFrame, we stop the Rssi sampling. 4053 else if (RAC_currentRadioState != RAC_RadioState.RxSearch && RAC_currentRadioState != RAC_RadioState.RxFrame) 4054 { 4055 AGC_StopRssiTimer(); 4056 } 4057 } 4058 4059 UpdateInterrupts(); 4060 }); 4061 } 4062 RAC_SeqTimerStart()4063 private void RAC_SeqTimerStart() => RAC_SeqTimerRestart(0, RAC_SeqTimerLimit); 4064 RAC_SeqTimerRestart(ushort startValue, ushort limit)4065 private void RAC_SeqTimerRestart(ushort startValue, ushort limit) 4066 { 4067 // Little hack: when the limit is set to 0, we actually set to 0xFFFF. 4068 // STimer triggers on value transition, so it the event will fire when a full wrap around occurs. 4069 // In practice, by setting the limit to 0xFFFF, it will expire one tick earlier. 4070 if (limit == 0) 4071 { 4072 limit = 0xFFFF; 4073 } 4074 4075 seqTimer.Enabled = false; 4076 4077 seqTimer.Divider = (int)RAC_seqTimerPrescaler.Value + 1; 4078 seqTimer.Limit = limit; 4079 seqTimer.Enabled = true; 4080 seqTimer.Value = startValue; 4081 } 4082 RAC_SeqTimerHandleLimitReached()4083 private void RAC_SeqTimerHandleLimitReached() 4084 { 4085 // Handle 16-bit wrap around 4086 if (seqTimer.Limit == 0xFFFF) 4087 { 4088 RAC_SeqTimerRestart(0, RAC_seqTimerLimit); 4089 4090 // We actually hit the compare value, fire the interrupt. 4091 if (RAC_seqTimerLimit == 0 || RAC_seqTimerLimit == 0xFFFF) 4092 { 4093 RAC_seqStimerCompareEventInterrupt.Value = true; 4094 UpdateInterrupts(); 4095 } 4096 } 4097 else 4098 { 4099 if (RAC_seqTimerCompareAction.Value == RAC_SeqTimerCompareAction.Continue) 4100 { 4101 RAC_SeqTimerRestart((ushort)seqTimer.Limit, 0xFFFF); 4102 } 4103 else if (RAC_seqTimerCompareAction.Value == RAC_SeqTimerCompareAction.Wrap) 4104 { 4105 RAC_SeqTimerRestart(0, RAC_seqTimerLimit); 4106 } 4107 else 4108 { 4109 this.Log(LogLevel.Error, "RAC_SeqTimerHandleLimitReached(), invalid compare action mode {0}", RAC_seqTimerCompareAction.Value); 4110 return; 4111 } 4112 4113 RAC_seqStimerCompareEventInterrupt.Value = true; 4114 UpdateInterrupts(); 4115 } 4116 } 4117 4118 private uint RAC_SeqTimerValue 4119 { 4120 get 4121 { 4122 TrySyncTime(); 4123 return (uint)seqTimer.Value; 4124 } 4125 } 4126 4127 private ushort RAC_SeqTimerLimit 4128 { 4129 get 4130 { 4131 return RAC_seqTimerLimit; 4132 } 4133 4134 set 4135 { 4136 RAC_seqTimerLimit = value; 4137 ushort limit; 4138 4139 TrySyncTime(); 4140 4141 if (RAC_seqTimerLimit == 0 || RAC_seqTimerLimit < seqTimer.Value) { 4142 limit = 0xFFFF; 4143 } 4144 else 4145 { 4146 limit = RAC_seqTimerLimit; 4147 } 4148 4149 RAC_SeqTimerRestart((ushort)seqTimer.Value, limit); 4150 } 4151 } 4152 RAC_PaRampingTimerHandleLimitReached()4153 private void RAC_PaRampingTimerHandleLimitReached() 4154 { 4155 paRampingTimer.Enabled = false; 4156 this.Log(LogLevel.Noisy, "PA ramping up/down DONE at {0}", GetTime()); 4157 // Done ramping the PA up or down, set TXRAMPDONE level interrupt back high. 4158 MODEM_TxRampingDoneInterrupt = true; 4159 RAC_paRampingDone.Value = RAC_paOutputLevelRamping; 4160 UpdateInterrupts(); 4161 } 4162 4163 private bool RAC_PaOutputLevelRamping 4164 { 4165 get 4166 { 4167 return RAC_paOutputLevelRamping; 4168 } 4169 4170 set 4171 { 4172 // Ramping the PA up or down 4173 if (value != RAC_paOutputLevelRamping) 4174 { 4175 RAC_paOutputLevelRamping = value; 4176 4177 // TODO: if the MODEM PA ramping is disabled, we should ramp up using the MODEM->RAMPCTRL.RAMPVAL value. 4178 if (!MODEM_rampDisable.Value) 4179 { 4180 // TXRAMPDONE is a level interrupt, it goes low during ramping, otherwise is always high. 4181 MODEM_TxRampingDoneInterrupt = false; 4182 UpdateInterrupts(); 4183 4184 paRampingTimer.Enabled = false; 4185 this.Log(LogLevel.Noisy, "Starting PA ramping up/down at {0}", GetTime()); 4186 // This is initially set 0 if ramping up, 1 if ramping down. Once PA ramping completed, it gets flipped. 4187 RAC_paRampingDone.Value = !value; 4188 paRampingTimer.Value = 0; 4189 paRampingTimer.Limit = RAC_PowerAmplifierRampingTimeUs; 4190 paRampingTimer.Enabled = true; 4191 } 4192 } 4193 } 4194 } 4195 4196 private bool RAC_PaOutputLevelRampingInProgress => paRampingTimer.Enabled; 4197 RAC_HandleTxAfterFrameCommand()4198 private void RAC_HandleTxAfterFrameCommand() 4199 { 4200 if (RAC_currentRadioState == RAC_RadioState.Tx || RAC_currentRadioState == RAC_RadioState.RxFrame) 4201 { 4202 RAC_txAfterFramePending.Value = true; 4203 } 4204 } 4205 RAC_TxTimerLimitReached()4206 private void RAC_TxTimerLimitReached() 4207 { 4208 txTimer.Enabled = false; 4209 4210 RAC_ClearOngoingTx(); 4211 4212 MODEM_txFrameSentInterrupt.Value = true; 4213 MODEM_seqTxFrameSentInterrupt.Value = true; 4214 // TODO: how to check if TXAFTERFRAMEDONE IRQ should be set instead, TXAFTERFRAME command cannot be set (TX is instantaneous) 4215 FRC_txDoneInterrupt.Value = true; 4216 FRC_seqTxDoneInterrupt.Value = true; 4217 if (RAC_txAfterFramePending.Value) 4218 { 4219 FRC_txAfterFrameDoneInterrupt.Value = true; 4220 FRC_seqTxAfterFrameDoneInterrupt.Value = true; 4221 } 4222 4223 for(var i = 0; i < PROTIMER_NumberOfCaptureCompareChannels; ++i) 4224 { 4225 if(PROTIMER_captureCompareChannel[i].enable.Value && PROTIMER_captureCompareChannel[i].mode.Value == PROTIMER_CaptureCompareMode.Capture) 4226 { 4227 switch(PROTIMER_captureCompareChannel[i].captureInputSource.Value) 4228 { 4229 case PROTIMER_CaptureInputSource.TxDone: 4230 case PROTIMER_CaptureInputSource.TxOrRxDone: 4231 PROTIMER_captureCompareChannel[i].Capture((ushort)PROTIMER_PreCounterValue, PROTIMER_BaseCounterValue, PROTIMER_WrapCounterValue); 4232 PROTIMER_TriggerEvent((PROTIMER_Event)((uint)PROTIMER_Event.CaptureCompareChannel0Event + i)); 4233 break; 4234 } 4235 } 4236 } 4237 PROTIMER_TriggerEvent(PROTIMER_Event.TxDone); 4238 PROTIMER_TriggerEvent(PROTIMER_Event.TxOrRxDone); 4239 4240 RAC_UpdateRadioStateMachine(RAC_RadioStateMachineSignal.TxDone); 4241 } 4242 RAC_RxTimerLimitReached()4243 private void RAC_RxTimerLimitReached() 4244 { 4245 rxTimer.Enabled = false; 4246 4247 // We went through the preamble delay which was scheduled in ReceiveFrame(). 4248 // We can now check radio state and sync word. 4249 if (RAC_internalRxState == RAC_InternalRxState.PreambleAndSyncWord) 4250 { 4251 if(RAC_currentRadioState != RAC_RadioState.RxSearch) 4252 { 4253 RAC_ClearOngoingRx(); 4254 this.Log(LogBasicRadioActivityAsError ? LogLevel.Error : LogLevel.Info, "Dropping (not in RXSEARCH): at {0} (channel {1}): {2}", GetTime(), Channel, BitConverter.ToString(currentFrame)); 4255 return; 4256 } 4257 4258 if (RAC_ongoingRxCollided) 4259 { 4260 RAC_ClearOngoingRx(); 4261 this.Log(LogBasicRadioActivityAsError ? LogLevel.Error : LogLevel.Info, "Dropping (PRE/SYNC COLLISION): at {0} (channel {1}): {2}", GetTime(), Channel, BitConverter.ToString(currentFrame)); 4262 return; 4263 } 4264 4265 if(!FRC_CheckSyncWords(currentFrame)) 4266 { 4267 RAC_ClearOngoingRx(); 4268 this.Log(LogBasicRadioActivityAsError ? LogLevel.Error : LogLevel.Info, "Dropping (SYNC MISMATCH): at {0} (channel {1}): {2}", GetTime(), Channel, BitConverter.ToString(currentFrame)); 4269 return; 4270 } 4271 4272 RAC_UpdateRadioStateMachine(RAC_RadioStateMachineSignal.FrameDetected); 4273 RAC_internalRxState = RAC_InternalRxState.Frame; 4274 FRC_SaveRxDescriptorsBufferWriteOffset(); 4275 currentFrameOffset = MODEM_SyncWordBytes; 4276 4277 // After having transitioned to RX_FRAME as result of the "beginning" of a packet being 4278 // received, we stay in RX_FRAME for the duration of the transmission. 4279 // We don't include the preamble time and sync word time here since we already delayed for that 4280 // (and possibly some extra time indicated in RAC_rxTimeAlreadyPassedUs). 4281 // We add the rxDoneChainDelay here so we correctly delay the RXDONE signal. 4282 double overTheAirFrameTimeUs = MODEM_GetFrameOverTheAirTimeUs(currentFrame, false, false); 4283 double rxDoneDelayUs = MODEM_GetRxDoneDelayUs(); 4284 if (overTheAirFrameTimeUs + rxDoneDelayUs > RAC_rxTimeAlreadyPassedUs 4285 && PROTIMER_UsToPreCntOverflowTicks(overTheAirFrameTimeUs + rxDoneDelayUs - RAC_rxTimeAlreadyPassedUs) > 0) 4286 { 4287 this.Log(LogLevel.Noisy, "scheduled rxTimer for FRAME: {0}us OTA={1} rxDoneDelay={2} rxTimeAlreadyPassed={3}", 4288 overTheAirFrameTimeUs + rxDoneDelayUs - RAC_rxTimeAlreadyPassedUs, overTheAirFrameTimeUs, rxDoneDelayUs, RAC_rxTimeAlreadyPassedUs); 4289 rxTimer.Frequency = PROTIMER_GetPreCntOverflowFrequency(); 4290 rxTimer.Limit = PROTIMER_UsToPreCntOverflowTicks(overTheAirFrameTimeUs + rxDoneDelayUs - RAC_rxTimeAlreadyPassedUs); 4291 rxTimer.Enabled = true; 4292 return; 4293 } 4294 4295 // If the time we already spent in RX because of the quantum time already accounts 4296 // for the whole frame, we fall through and process the end of RX immediately. 4297 } 4298 4299 // Packet is fully received now and we have already delayed for the RX done chain delay. 4300 4301 if (RAC_internalRxState != RAC_InternalRxState.Frame) 4302 { 4303 this.Log(LogLevel.Error, "RAC_RxTimerLimitReached: unexpected RX state"); 4304 return; 4305 } 4306 4307 RAC_internalRxState = RAC_InternalRxState.Idle; 4308 4309 for(var i = 0; i < PROTIMER_NumberOfCaptureCompareChannels; ++i) 4310 { 4311 if(PROTIMER_captureCompareChannel[i].enable.Value && PROTIMER_captureCompareChannel[i].mode.Value == PROTIMER_CaptureCompareMode.Capture) 4312 { 4313 switch(PROTIMER_captureCompareChannel[i].captureInputSource.Value) 4314 { 4315 case PROTIMER_CaptureInputSource.RxAtEndOfFrameFromDemodulator: 4316 case PROTIMER_CaptureInputSource.RxDone: 4317 case PROTIMER_CaptureInputSource.TxOrRxDone: 4318 PROTIMER_captureCompareChannel[i].Capture((ushort)PROTIMER_PreCounterValue, PROTIMER_BaseCounterValue, PROTIMER_WrapCounterValue); 4319 PROTIMER_TriggerEvent((PROTIMER_Event)((uint)PROTIMER_Event.CaptureCompareChannel0Event + i)); 4320 break; 4321 } 4322 } 4323 } 4324 PROTIMER_TriggerEvent(PROTIMER_Event.RxDone); 4325 PROTIMER_TriggerEvent(PROTIMER_Event.TxOrRxDone); 4326 4327 if (RAC_ongoingRxCollided) 4328 { 4329 // The received frame collided with another one (that we already dropped). Here we are simulating a CRC error. 4330 FRC_frameErrorInterrupt.Value = true; 4331 FRC_seqFrameErrorInterrupt.Value = true; 4332 4333 this.Log(LogBasicRadioActivityAsError ? LogLevel.Error : LogLevel.Info, "Dropping at {0}: RX collision", GetTime()); 4334 4335 if(FRC_rxBufferRestoreOnFrameError.Value & !FRC_rxAcceptCrcErrors.Value) 4336 { 4337 FRC_RestoreRxDescriptorsBufferWriteOffset(); 4338 } 4339 } 4340 4341 // When a CRC error is detected, the FRAMEERROR interrupt flag is set. Normally, frames with CRC errors are discarded. 4342 // However, by setting ACCEPTCRCERRORS in FRC_RXCTRL, frames with CRC errors are still accepted and a RXDONE interrupt 4343 // is generated at the end of the frame reception, in addition to the FRAMERROR interrupt. 4344 if (!RAC_ongoingRxCollided || FRC_rxAcceptCrcErrors.Value) 4345 { 4346 this.Log(LogBasicRadioActivityAsError ? LogLevel.Error : LogLevel.Info, "Received at {0} on channel {1} (RSSI={2}, collided={3}): {4}", 4347 GetTime(), Channel, AGC_FrameRssiIntegerPart, RAC_ongoingRxCollided, BitConverter.ToString(currentFrame)); 4348 4349 // No collision detected or ACCEPTCRCERRORS is set: disassemble the incoming frame and raise the RXDONE interrupt. 4350 FRC_DisassembleCurrentFrame(RAC_ongoingRxCollided); 4351 4352 FRC_rxDoneInterrupt.Value = true; 4353 FRC_seqRxDoneInterrupt.Value = true; 4354 } 4355 4356 UpdateInterrupts(); 4357 RAC_UpdateRadioStateMachine(RAC_RadioStateMachineSignal.RxDone); 4358 } 4359 #endregion 4360 4361 #region PROTIMER methods 4362 // TODOs: 4363 // 1. The PROTIMER is started by either using the START command in the PROTIMER_CMD register or through 4364 // a PRS event on a selectable PRS channel. 4365 // 2. PRECNTTOPADJ 4366 // 3. RTCC sync for EM2 support 4367 // 4. LBT/CSMA logic 4368 // 5. TX/RX requests 4369 // 6. Protocol timer Events 4370 private bool PROTIMER_Enabled 4371 { 4372 get 4373 { 4374 return proTimer.Enabled; 4375 } 4376 4377 set 4378 { 4379 if (value) 4380 { 4381 // First stop the timer 4382 proTimer.Enabled = false; 4383 4384 // TODO: If it is already running, do we need to update the BASECNT,WRAPCNT,etc? 4385 4386 // The proTimer timer is configured so that each tick corresponds to a PRECNT overflow. 4387 // The PRECNTTOP value is 1 less than the intended value. 4388 double frequency = (double)HfxoFrequency / (PROTIMER_preCounterTopInteger.Value + 1 + ((double)PROTIMER_preCounterTopFractional.Value / 256)); 4389 4390 proTimer.Frequency = (uint)frequency; 4391 proTimer.Limit = PROTIMER_ComputeTimerLimit(); 4392 proTimer.Value = 0; 4393 } 4394 4395 proTimer.Enabled = value; 4396 } 4397 } 4398 PROTIMER_GetPreCntOverflowFrequency()4399 private uint PROTIMER_GetPreCntOverflowFrequency() 4400 { 4401 // The PRECNTTOP value is 1 less than the intended value. 4402 double frequency = (double)HfxoFrequency / (PROTIMER_preCounterTopInteger.Value + 1 + ((double)PROTIMER_preCounterTopFractional.Value / 65536)); 4403 return Convert.ToUInt32(frequency); 4404 } 4405 PROTIMER_UsToPreCntOverflowTicks(double timeUs)4406 private ulong PROTIMER_UsToPreCntOverflowTicks(double timeUs) 4407 { 4408 return Convert.ToUInt64((timeUs * (double)PROTIMER_GetPreCntOverflowFrequency()) / (double)MicrosecondFrequency); 4409 } 4410 4411 public uint PROTIMER_PreCounterValue 4412 { 4413 get 4414 { 4415 // We don't tick the PRECNT value, so we just return always 0. 4416 return 0; 4417 } 4418 4419 set 4420 { 4421 // We don't tick the PRECNT so we just ignore a set. 4422 } 4423 } 4424 4425 public ushort PROTIMER_BaseCounterValue 4426 { 4427 get 4428 { 4429 ulong ret = PROTIMER_baseCounterValue; 4430 if (PROTIMER_baseCounterSource.Value == PROTIMER_BaseCounterSource.PreCounterOverflow 4431 && proTimer.Enabled) 4432 { 4433 TrySyncTime(); 4434 ret += proTimer.Value; 4435 } 4436 return (ushort)ret; 4437 } 4438 4439 set 4440 { 4441 PROTIMER_baseCounterValue = value; 4442 } 4443 } 4444 4445 public uint PROTIMER_WrapCounterValue 4446 { 4447 get 4448 { 4449 ulong ret = PROTIMER_wrapCounterValue; 4450 if (PROTIMER_wrapCounterSource.Value == PROTIMER_WrapCounterSource.PreCounterOverflow 4451 && proTimer.Enabled) 4452 { 4453 TrySyncTime(); 4454 ret += proTimer.Value; 4455 } 4456 return (uint)ret; 4457 } 4458 4459 set 4460 { 4461 PROTIMER_wrapCounterValue = value; 4462 } 4463 } 4464 4465 private bool PROTIMER_RxEnable => (PROTIMER_rxRequestState == PROTIMER_TxRxRequestState.Set 4466 || PROTIMER_rxRequestState == PROTIMER_TxRxRequestState.ClearEvent1); 4467 4468 private bool PROTIMER_TxEnable 4469 { 4470 get => PROTIMER_txEnable; 4471 set 4472 { 4473 PROTIMER_txEnable = value; 4474 if (PROTIMER_txEnable) 4475 { 4476 RAC_TxEnable = true; 4477 } 4478 } 4479 } 4480 PROTIMER_HandleChangedParams()4481 public void PROTIMER_HandleChangedParams() 4482 { 4483 // Timer is not running, nothing to do 4484 if (!PROTIMER_Enabled) 4485 { 4486 return; 4487 } 4488 4489 TrySyncTime(); 4490 uint currentIncrement = (uint)proTimer.Value; 4491 proTimer.Enabled = false; 4492 4493 // First handle the current increment 4494 if (currentIncrement > 0) 4495 { 4496 PROTIMER_HandlePreCntOverflows(currentIncrement); 4497 } 4498 4499 // Then restart the protimer 4500 proTimer.Value = 0; 4501 proTimer.Limit = PROTIMER_ComputeTimerLimit(); 4502 proTimer.Enabled = true; 4503 } 4504 PROTIMER_ComputeTimerLimit()4505 private uint PROTIMER_ComputeTimerLimit() 4506 { 4507 if (proTimer.Enabled) 4508 { 4509 this.Log(LogLevel.Error, "PROTIMER_ComputeTimerLimit invoked while the proTimer running"); 4510 return uint.MaxValue; 4511 } 4512 4513 uint limit = PROTIMER_DefaultLightWeightTimerLimit; 4514 PROTIMER_preCounterSourcedBitmask = 0; 4515 4516 if (PROTIMER_baseCounterSource.Value == PROTIMER_BaseCounterSource.PreCounterOverflow) 4517 { 4518 if (PROTIMER_baseCounterValue > PROTIMER_baseCounterTop.Value) 4519 { 4520 this.Log(LogLevel.Error, "BASECNT > BASECNTTOP {0} {1}", PROTIMER_baseCounterValue, PROTIMER_baseCounterTop.Value); 4521 return uint.MaxValue; 4522 } 4523 4524 uint temp = (uint)PROTIMER_baseCounterTop.Value - PROTIMER_baseCounterValue; 4525 if (temp != 0 && temp < limit) 4526 { 4527 limit = temp; 4528 } 4529 PROTIMER_preCounterSourcedBitmask |= (uint)PROTIMER_PreCountOverflowSourced.BaseCounter; 4530 } 4531 4532 if (PROTIMER_wrapCounterSource.Value == PROTIMER_WrapCounterSource.PreCounterOverflow) 4533 { 4534 if (PROTIMER_wrapCounterValue > PROTIMER_wrapCounterTop.Value) 4535 { 4536 this.Log(LogLevel.Error, "WRAPCNT > WRAPCNTTOP {0} {1}", PROTIMER_wrapCounterValue, PROTIMER_wrapCounterTop.Value); 4537 return uint.MaxValue; 4538 } 4539 4540 uint temp = (uint)PROTIMER_wrapCounterTop.Value - PROTIMER_wrapCounterValue; 4541 if (temp != 0 && temp < limit) 4542 { 4543 limit = temp; 4544 } 4545 PROTIMER_preCounterSourcedBitmask |= (uint)PROTIMER_PreCountOverflowSourced.WrapCounter; 4546 } 4547 4548 // RENODE-19: for now if a Timeout Timer is active and sourced by PRE overflow, 4549 // we switch to a minimum ticks interval. 4550 // What we really want is to compute the number of PRE overflows to the timeout 4551 // or the match event. 4552 for(int i = 0; i < PROTIMER_NumberOfTimeoutCounters; i++) 4553 { 4554 if ((PROTIMER_timeoutCounter[i].synchronizing.Value 4555 && PROTIMER_timeoutCounter[i].syncSource.Value == PROTIMER_TimeoutCounterSource.PreCounterOverflow) 4556 || (PROTIMER_timeoutCounter[i].running.Value 4557 && PROTIMER_timeoutCounter[i].source.Value == PROTIMER_TimeoutCounterSource.PreCounterOverflow)) 4558 { 4559 limit = PROTIMER_MinimumTimeoutCounterDelay; 4560 PROTIMER_preCounterSourcedBitmask |= ((uint)PROTIMER_PreCountOverflowSourced.TimeoutCounter0 << i); 4561 } 4562 } 4563 4564 // Check for Capture/Compare channels that are enabled and set in Compare mode 4565 for(int i = 0; i < PROTIMER_NumberOfCaptureCompareChannels; i++) 4566 { 4567 if (PROTIMER_captureCompareChannel[i].enable.Value 4568 && PROTIMER_captureCompareChannel[i].mode.Value == PROTIMER_CaptureCompareMode.Compare) 4569 { 4570 // Base match enabled and base counter is sourced by pre counter overflows 4571 if (PROTIMER_captureCompareChannel[i].baseMatchEnable.Value 4572 && PROTIMER_baseCounterSource.Value == PROTIMER_BaseCounterSource.PreCounterOverflow 4573 && PROTIMER_captureCompareChannel[i].baseValue.Value > PROTIMER_baseCounterValue) 4574 { 4575 uint temp = (uint)(PROTIMER_captureCompareChannel[i].baseValue.Value - PROTIMER_baseCounterValue); 4576 if (temp < limit) 4577 { 4578 limit = temp; 4579 } 4580 PROTIMER_preCounterSourcedBitmask |= ((uint)PROTIMER_PreCountOverflowSourced.CaptureCompareChannel0 << i); 4581 } 4582 4583 // Wrap match enabled and wrap counter is sourced by pre counter overflows 4584 if (PROTIMER_captureCompareChannel[i].wrapMatchEnable.Value 4585 && PROTIMER_wrapCounterSource.Value == PROTIMER_WrapCounterSource.PreCounterOverflow 4586 && PROTIMER_captureCompareChannel[i].wrapValue.Value > PROTIMER_wrapCounterValue) 4587 { 4588 uint temp = (uint)(PROTIMER_captureCompareChannel[i].wrapValue.Value - PROTIMER_wrapCounterValue); 4589 if (temp < limit) 4590 { 4591 limit = temp; 4592 } 4593 PROTIMER_preCounterSourcedBitmask |= ((uint)PROTIMER_PreCountOverflowSourced.CaptureCompareChannel0 << i); 4594 } 4595 } 4596 } 4597 4598 return limit; 4599 } 4600 PROTIMER_HandlePreCntOverflows(uint overflowCount)4601 private void PROTIMER_HandlePreCntOverflows(uint overflowCount) 4602 { 4603 if (proTimer.Enabled) 4604 { 4605 this.Log(LogLevel.Error, "PROTIMER_HandlePreCntOverflows invoked while the proTimer running"); 4606 return; 4607 } 4608 4609 // this.Log(LogLevel.Debug, "PROTIMER_HandlePreCntOverflows cnt={0} mask=0x{1:X} base={2}", 4610 // overflowCount, PROTIMER_preCounterSourcedBitmask, 4611 // (PROTIMER_preCounterSourcedBitmask & (uint)PROTIMER_PreCountOverflowSourced.BaseCounter)); 4612 4613 if((PROTIMER_preCounterSourcedBitmask & (uint)PROTIMER_PreCountOverflowSourced.BaseCounter) > 0) 4614 { 4615 PROTIMER_IncrementBaseCounter(overflowCount); 4616 } 4617 if((PROTIMER_preCounterSourcedBitmask & (uint)PROTIMER_PreCountOverflowSourced.WrapCounter) > 0) 4618 { 4619 PROTIMER_IncrementWrapCounter(overflowCount); 4620 } 4621 4622 for(int i = 0; i < PROTIMER_NumberOfTimeoutCounters; i++) 4623 { 4624 if ((PROTIMER_preCounterSourcedBitmask & ((uint)PROTIMER_PreCountOverflowSourced.TimeoutCounter0 << i)) > 0) 4625 { 4626 PROTIMER_timeoutCounter[i].Update(PROTIMER_TimeoutCounterSource.PreCounterOverflow, overflowCount); 4627 } 4628 } 4629 4630 // TODO: for now we don't handle CaptureCompare channels being sourced by PreCount 4631 } 4632 PROTIMER_HandleTimerLimitReached()4633 private void PROTIMER_HandleTimerLimitReached() 4634 { 4635 proTimer.Enabled = false; 4636 4637 // In lightweight mode the timer fires when N PRECNT overflows have occurred. 4638 // The number N is set when we start/restart the proTimer 4639 4640 //this.Log(LogLevel.Debug, "proTimer overflow limit={0} baseTop={1} wrapTop={2}", proTimer.Limit, PROTIMER_baseCounterTop.Value, PROTIMER_wrapCounterTop.Value); 4641 4642 PROTIMER_HandlePreCntOverflows((uint)proTimer.Limit); 4643 4644 proTimer.Value = 0; 4645 proTimer.Limit = PROTIMER_ComputeTimerLimit(); 4646 proTimer.Enabled = true; 4647 } 4648 PROTIMER_HandlePreCounterOverflow()4649 private void PROTIMER_HandlePreCounterOverflow() 4650 { 4651 PROTIMER_TriggerEvent(PROTIMER_Event.PreCounterOverflow); 4652 4653 if(PROTIMER_baseCounterSource.Value == PROTIMER_BaseCounterSource.PreCounterOverflow) 4654 { 4655 PROTIMER_IncrementBaseCounter(); 4656 } 4657 if(PROTIMER_wrapCounterSource.Value == PROTIMER_WrapCounterSource.PreCounterOverflow) 4658 { 4659 PROTIMER_IncrementWrapCounter(); 4660 } 4661 4662 Array.ForEach(PROTIMER_timeoutCounter, x => x.Update(PROTIMER_TimeoutCounterSource.PreCounterOverflow)); 4663 4664 UpdateInterrupts(); 4665 } 4666 PROTIMER_HandleBaseCounterOverflow()4667 private void PROTIMER_HandleBaseCounterOverflow() 4668 { 4669 // this.Log(LogLevel.Debug, "PROTIMER_HandleBaseCounterOverflow baseValue={0} topValue={1} at {2}", 4670 // PROTIMER_BaseCounterValue, PROTIMER_baseCounterTop.Value, GetTime()); 4671 4672 PROTIMER_TriggerEvent(PROTIMER_Event.BaseCounterOverflow); 4673 4674 if(PROTIMER_wrapCounterSource.Value == PROTIMER_WrapCounterSource.BaseCounterOverflow) 4675 { 4676 PROTIMER_IncrementWrapCounter(); 4677 } 4678 4679 Array.ForEach(PROTIMER_timeoutCounter, x => x.Update(PROTIMER_TimeoutCounterSource.BaseCounterOverflow)); 4680 } 4681 PROTIMER_HandleWrapCounterOverflow()4682 private void PROTIMER_HandleWrapCounterOverflow() 4683 { 4684 //this.Log(LogLevel.Debug, "PROTIMER_HandleWrapCounterOverflow wrapValue={0} at {1}", PROTIMER_WrapCounterValue, GetTime()); 4685 4686 PROTIMER_TriggerEvent(PROTIMER_Event.WrapCounterOverflow); 4687 4688 Array.ForEach(PROTIMER_timeoutCounter, x => x.Update(PROTIMER_TimeoutCounterSource.WrapCounterOverflow)); 4689 } 4690 PROTIMER_IncrementBaseCounter(uint increment = 1)4691 private void PROTIMER_IncrementBaseCounter(uint increment = 1) 4692 { 4693 if (proTimer.Enabled) 4694 { 4695 this.Log(LogLevel.Error, "PROTIMER_IncrementBaseCounter invoked while the proTimer running"); 4696 return; 4697 } 4698 4699 PROTIMER_baseCounterValue += (ushort)increment; 4700 4701 for(var i = 0; i < PROTIMER_NumberOfCaptureCompareChannels; ++i) 4702 { 4703 var triggered = PROTIMER_captureCompareChannel[i].enable.Value 4704 && PROTIMER_captureCompareChannel[i].baseMatchEnable.Value 4705 && PROTIMER_captureCompareChannel[i].mode.Value == PROTIMER_CaptureCompareMode.Compare 4706 && PROTIMER_baseCounterValue == PROTIMER_captureCompareChannel[i].baseValue.Value; 4707 4708 if(triggered) 4709 { 4710 PROTIMER_captureCompareChannel[i].interrupt.Value = true; 4711 PROTIMER_captureCompareChannel[i].seqInterrupt.Value = true; 4712 UpdateInterrupts(); 4713 PROTIMER_TriggerEvent((PROTIMER_Event)((uint)PROTIMER_Event.CaptureCompareChannel0Event + i)); 4714 } 4715 } 4716 4717 if(PROTIMER_baseCounterValue >= PROTIMER_baseCounterTop.Value) 4718 { 4719 PROTIMER_HandleBaseCounterOverflow(); 4720 PROTIMER_baseCounterValue = 0x0; 4721 } 4722 } 4723 PROTIMER_IncrementWrapCounter(uint increment = 1)4724 private void PROTIMER_IncrementWrapCounter(uint increment = 1) 4725 { 4726 if (proTimer.Enabled) 4727 { 4728 this.Log(LogLevel.Error, "PROTIMER_IncrementWrapCounter invoked while the proTimer running"); 4729 return; 4730 } 4731 4732 PROTIMER_wrapCounterValue += increment; 4733 4734 for(var i = 0; i < PROTIMER_NumberOfCaptureCompareChannels; ++i) 4735 { 4736 var triggered = PROTIMER_captureCompareChannel[i].enable.Value 4737 && PROTIMER_captureCompareChannel[i].wrapMatchEnable.Value 4738 && PROTIMER_captureCompareChannel[i].mode.Value == PROTIMER_CaptureCompareMode.Compare 4739 && PROTIMER_wrapCounterValue == PROTIMER_captureCompareChannel[i].wrapValue.Value; 4740 4741 if(triggered) 4742 { 4743 PROTIMER_captureCompareChannel[i].interrupt.Value = true; 4744 PROTIMER_captureCompareChannel[i].seqInterrupt.Value = true; 4745 UpdateInterrupts(); 4746 PROTIMER_TriggerEvent((PROTIMER_Event)((uint)PROTIMER_Event.CaptureCompareChannel0Event + i)); 4747 } 4748 } 4749 4750 if(PROTIMER_wrapCounterValue >= PROTIMER_wrapCounterTop.Value) 4751 { 4752 PROTIMER_HandleWrapCounterOverflow(); 4753 PROTIMER_wrapCounterValue = 0x0; 4754 } 4755 } 4756 4757 PROTIMER_UpdateCompareTimer(int index, bool syncTime = true)4758 private void PROTIMER_UpdateCompareTimer(int index, bool syncTime = true) 4759 { 4760 // We don't support preMatch in Compare Timers, instead we checks that preMatch is not enabled, 4761 // and if base/wrap match are enabled, we recalculate the protimer limit. 4762 if (PROTIMER_captureCompareChannel[index].enable.Value 4763 && PROTIMER_captureCompareChannel[index].mode.Value == PROTIMER_CaptureCompareMode.Compare 4764 && PROTIMER_captureCompareChannel[index].preMatchEnable.Value) 4765 { 4766 this.Log(LogLevel.Error, "CC{0} PRE match enabled, NOT SUPPORTED!", index); 4767 } 4768 4769 PROTIMER_HandleChangedParams(); 4770 } 4771 PROTIMER_TimeoutCounter0HandleSynchronize()4772 private void PROTIMER_TimeoutCounter0HandleSynchronize() 4773 { 4774 if (PROTIMER_listenBeforeTalkSync.Value) 4775 { 4776 PROTIMER_listenBeforeTalkSync.Value = false; 4777 PROTIMER_listenBeforeTalkRunning.Value = true; 4778 } 4779 } 4780 PROTIMER_TimeoutCounter0HandleUnderflow()4781 private void PROTIMER_TimeoutCounter0HandleUnderflow() 4782 { 4783 if (!PROTIMER_listenBeforeTalkRunning.Value) 4784 { 4785 return; 4786 } 4787 4788 PROTIMER_timeoutCounter[0].Stop(); 4789 4790 switch(PROTIMER_listenBeforeTalkState) 4791 { 4792 case PROTIMER_ListenBeforeTalkState.Backoff: 4793 { 4794 // CCACNT = 0 4795 PROTIMER_ccaCounter.Value = 0; 4796 4797 PROTIMER_listenBeforeTalkState = PROTIMER_ListenBeforeTalkState.CcaDelay; 4798 4799 // If the RSSI_START command failed to start (for example, radio is not in RX), we don't 4800 // start TOUT0 here, we expect to be back in backoff or to be done with retry attempts. 4801 if (AGC_RssiStartCommand(true)) 4802 { 4803 // Wait for CCDELAY+1 BASECNTOF events 4804 PROTIMER_timeoutCounter[0].counterTop.Value = PROTIMER_ccaDelay.Value; 4805 PROTIMER_timeoutCounter[0].Start(); 4806 } 4807 4808 break; 4809 } 4810 case PROTIMER_ListenBeforeTalkState.CcaDelay: 4811 { 4812 // If we get here is because CCA was successful, otherwise we would have retried the backoff or failed LBT 4813 4814 // CCACNT == CCAREPEAT-1 4815 if (PROTIMER_ccaCounter.Value == (PROTIMER_ccaRepeat.Value - 1)) 4816 { 4817 PROTIMER_listenBeforeTalkState = PROTIMER_ListenBeforeTalkState.Idle; 4818 PROTIMER_listenBeforeTalkSync.Value = false; 4819 PROTIMER_listenBeforeTalkRunning.Value = false; 4820 PROTIMER_listenBeforeTalkSuccessInterrupt.Value = true; 4821 PROTIMER_seqListenBeforeTalkSuccessInterrupt.Value = true; 4822 UpdateInterrupts(); 4823 PROTIMER_TriggerEvent(PROTIMER_Event.ListenBeforeTalkSuccess); 4824 // Trigger the CCA cmpleted event after the LBT success event so that the radio 4825 // does not leave RX and goes directly to RX2TX. 4826 PROTIMER_TriggerEvent(PROTIMER_Event.ClearChannelAssessmentMeasurementCompleted); 4827 } 4828 else 4829 { 4830 // CCACNT++ 4831 PROTIMER_ccaCounter.Value += 1; 4832 4833 // If the RSSI_START command failed to start (for example, radio is not in RX), we don't 4834 // start TOUT0 here, we expect to be back in backoff or to be done with retry attempts. 4835 if (AGC_RssiStartCommand(true)) 4836 { 4837 // Wait for CCDELAY+1 BASECNTOF events 4838 PROTIMER_timeoutCounter[0].counterTop.Value = PROTIMER_ccaDelay.Value; 4839 PROTIMER_timeoutCounter[0].Start(); 4840 } 4841 } 4842 4843 break; 4844 } 4845 default: 4846 { 4847 this.Log(LogLevel.Error, "Unreachable. Invalid LBT state in PROTIMER_TimeoutCounter0HandleUnderflow"); 4848 break; 4849 } 4850 } 4851 } 4852 PROTIMER_TimeoutCounter0HandleFinish()4853 private void PROTIMER_TimeoutCounter0HandleFinish() 4854 { 4855 if (PROTIMER_listenBeforeTalkPending) 4856 { 4857 PROTIMER_listenBeforeTalkPending = false; 4858 PROTIMER_ListenBeforeTalkStartCommand(); 4859 } 4860 } 4861 PROTIMER_ListenBeforeTalkStartCommand()4862 private void PROTIMER_ListenBeforeTalkStartCommand() 4863 { 4864 if(PROTIMER_timeoutCounter[0].running.Value || PROTIMER_timeoutCounter[0].synchronizing.Value) 4865 { 4866 PROTIMER_listenBeforeTalkPending = true; 4867 return; 4868 } 4869 4870 PROTIMER_listenBeforeTalkSync.Value = false; 4871 PROTIMER_listenBeforeTalkRunning.Value = false; 4872 PROTIMER_listenBeforeTalkPaused.Value = false; 4873 // EXP = STARTEXP 4874 PROTIMER_listenBeforeTalkExponent.Value = PROTIMER_listenBeforeTalkStartExponent.Value; 4875 // RETRYCNT = 0 4876 PROTIMER_listenBeforeTalkRetryCounter.Value = 0; 4877 4878 PROTIMER_listenBeforeTalkState = PROTIMER_ListenBeforeTalkState.Backoff; 4879 4880 if (PROTIMER_timeoutCounter[0].syncSource.Value == PROTIMER_TimeoutCounterSource.Disabled) 4881 { 4882 PROTIMER_listenBeforeTalkRunning.Value = true; 4883 } 4884 else 4885 { 4886 PROTIMER_listenBeforeTalkSync.Value = true; 4887 } 4888 4889 // TODO: implement FIXED BACKOFF here if needed: 4890 // "It is possible to have a fixed (non-random) backoff, by setting FIXEDBACKOFF in PROTIMER_LBTCTRL. 4891 // This will prevent hardware from updating the EXP and RANDOM register fields when the LBT backoff 4892 // value is calculated for each LBT attempt. Software can con- figure a fixed LBT backoff value by 4893 // writing to the EXP (in PROTIMER_LBTSTATE) and RANDOM register fields. 4894 // Note: When using the FIXEDBACKOFF setting, the TOUT0CNT register is still decremented during the 4895 // backoff period. The EXP and RANDOM register fields will remain constant for each retry." 4896 4897 // BACKOFF = RANDOM & (2^EXP – 1) 4898 var rand = (uint)random.Next(); 4899 var backoff = (rand & ((1u << (byte)PROTIMER_listenBeforeTalkExponent.Value) - 1)); 4900 4901 // Wait for BACKOFF+1 BASECNTOF events 4902 PROTIMER_timeoutCounter[0].counterTop.Value = backoff; 4903 PROTIMER_timeoutCounter[0].Start(); 4904 } 4905 PROTIMER_ListenBeforeTalkPauseCommand()4906 private void PROTIMER_ListenBeforeTalkPauseCommand() 4907 { 4908 this.Log(LogLevel.Error, "LBT Pausing not supported"); 4909 } 4910 PROTIMER_ListenBeforeTalkStopCommand()4911 private void PROTIMER_ListenBeforeTalkStopCommand() 4912 { 4913 PROTIMER_timeoutCounter[0].Stop(); 4914 PROTIMER_listenBeforeTalkState = PROTIMER_ListenBeforeTalkState.Idle; 4915 PROTIMER_listenBeforeTalkSync.Value = false; 4916 PROTIMER_listenBeforeTalkRunning.Value = false; 4917 } 4918 PROTIMER_ListenBeforeTalkCcaCompleted(bool forceFailure = false)4919 private void PROTIMER_ListenBeforeTalkCcaCompleted(bool forceFailure = false) 4920 { 4921 if (PROTIMER_listenBeforeTalkState == PROTIMER_ListenBeforeTalkState.Idle) 4922 { 4923 this.Log(LogLevel.Error, "PROTIMER_ListenBeforeTalkCcaCompleted while LBT_STATE=idle"); 4924 return; 4925 } 4926 4927 if (forceFailure) 4928 { 4929 AGC_cca.Value = false; 4930 } 4931 else 4932 { 4933 AGC_cca.Value = (AGC_RssiIntegerPartAdjusted < (sbyte)AGC_ccaThreshold.Value); 4934 } 4935 4936 // If the channel is clear, nothing to do here, we let CCADELAY complete. 4937 4938 // Channel not clear 4939 if (!AGC_cca.Value) 4940 { 4941 PROTIMER_timeoutCounter[0].Stop(); 4942 PROTIMER_TriggerEvent(PROTIMER_Event.ClearChannelAssessmentMeasurementCompleted); 4943 4944 // RETRYCNT == RETRYLIMIT? 4945 if (PROTIMER_listenBeforeTalkRetryCounter.Value == PROTIMER_retryLimit.Value) 4946 { 4947 PROTIMER_listenBeforeTalkState = PROTIMER_ListenBeforeTalkState.Idle; 4948 PROTIMER_listenBeforeTalkSync.Value = false; 4949 PROTIMER_listenBeforeTalkRunning.Value = false; 4950 PROTIMER_listenBeforeTalkFailureInterrupt.Value = true; 4951 PROTIMER_seqListenBeforeTalkFailureInterrupt.Value = true; 4952 UpdateInterrupts(); 4953 PROTIMER_TriggerEvent(PROTIMER_Event.ListenBeforeTalkFailure); 4954 } 4955 else 4956 { 4957 PROTIMER_listenBeforeTalkRetryInterrupt.Value = true; 4958 PROTIMER_seqListenBeforeTalkRetryInterrupt.Value = true; 4959 UpdateInterrupts(); 4960 PROTIMER_TriggerEvent(PROTIMER_Event.ListenBeforeTalkRetry); 4961 4962 PROTIMER_listenBeforeTalkState = PROTIMER_ListenBeforeTalkState.Backoff; 4963 4964 // RETRYCNT++ 4965 PROTIMER_listenBeforeTalkRetryCounter.Value += 1; 4966 4967 // EXP - min(EXP+1, MAXEXP) 4968 if (PROTIMER_listenBeforeTalkExponent.Value + 1 <= PROTIMER_listenBeforeTalkMaxExponent.Value) 4969 { 4970 PROTIMER_listenBeforeTalkExponent.Value += 1; 4971 } 4972 else 4973 { 4974 PROTIMER_listenBeforeTalkExponent.Value = PROTIMER_listenBeforeTalkMaxExponent.Value; 4975 } 4976 4977 // BACKOFF = RANDOM & (2^EXP – 1) 4978 var rand = (uint)random.Next(); 4979 var backoff = (rand & ((1u << (byte)PROTIMER_listenBeforeTalkExponent.Value) - 1)); 4980 4981 // Wait for BACKOFF+1 BASECNTOF events 4982 PROTIMER_timeoutCounter[0].counterTop.Value = backoff; 4983 PROTIMER_timeoutCounter[0].Start(); 4984 } 4985 } 4986 } 4987 PROTIMER_TriggerEvent(PROTIMER_Event ev)4988 public void PROTIMER_TriggerEvent(PROTIMER_Event ev) 4989 { 4990 if(ev < PROTIMER_Event.PreCounterOverflow || ev > PROTIMER_Event.InternalTrigger) 4991 { 4992 this.Log(LogLevel.Error, "Unreachable. Invalid event value for PROTIMER_TriggerEvent."); 4993 return; 4994 } 4995 4996 // if a Timeout Counter 0 match occurs during LBT, we change the event accordingly. 4997 if (ev == PROTIMER_Event.TimeoutCounter0Match && PROTIMER_listenBeforeTalkRunning.Value) 4998 { 4999 ev = PROTIMER_Event.TimeoutCounter0MatchListenBeforeTalk; 5000 PROTIMER_listenBeforeTalkTimeoutCounterMatchInterrupt.Value = true; 5001 PROTIMER_seqListenBeforeTalkTimeoutCounterMatchInterrupt.Value = true; 5002 UpdateInterrupts(); 5003 } 5004 5005 switch(PROTIMER_rxRequestState) 5006 { 5007 case PROTIMER_TxRxRequestState.Idle: 5008 { 5009 if (PROTIMER_rxSetEvent1.Value == PROTIMER_Event.Always) 5010 { 5011 PROTIMER_rxRequestState = PROTIMER_TxRxRequestState.SetEvent1; 5012 goto case PROTIMER_TxRxRequestState.SetEvent1; 5013 } 5014 if (PROTIMER_rxSetEvent1.Value == ev) 5015 { 5016 PROTIMER_rxRequestState = PROTIMER_TxRxRequestState.SetEvent1; 5017 } 5018 break; 5019 } 5020 case PROTIMER_TxRxRequestState.SetEvent1: 5021 { 5022 if (PROTIMER_rxSetEvent2.Value == PROTIMER_Event.Always || PROTIMER_rxSetEvent2.Value == ev) 5023 { 5024 PROTIMER_rxRequestState = PROTIMER_TxRxRequestState.Set; 5025 RAC_UpdateRadioStateMachine(); 5026 } 5027 break; 5028 } 5029 case PROTIMER_TxRxRequestState.Set: 5030 { 5031 if (PROTIMER_rxClearEvent1.Value == PROTIMER_Event.Always) 5032 { 5033 PROTIMER_rxRequestState = PROTIMER_TxRxRequestState.ClearEvent1; 5034 goto case PROTIMER_TxRxRequestState.ClearEvent1; 5035 } 5036 if (PROTIMER_rxClearEvent1.Value == ev) 5037 { 5038 PROTIMER_rxRequestState = PROTIMER_TxRxRequestState.ClearEvent1; 5039 } 5040 break; 5041 } 5042 case PROTIMER_TxRxRequestState.ClearEvent1: 5043 { 5044 if (PROTIMER_rxClearEvent2.Value == ev) 5045 { 5046 PROTIMER_rxRequestState = PROTIMER_TxRxRequestState.Idle; 5047 RAC_UpdateRadioStateMachine(); 5048 } 5049 break; 5050 } 5051 default: 5052 this.Log(LogLevel.Error, "Unreachable. Invalid PROTIMER RX Request state."); 5053 return; 5054 } 5055 5056 switch(PROTIMER_txRequestState) 5057 { 5058 case PROTIMER_TxRxRequestState.Idle: 5059 { 5060 if (PROTIMER_txSetEvent1.Value == PROTIMER_Event.Always) 5061 { 5062 PROTIMER_txRequestState = PROTIMER_TxRxRequestState.SetEvent1; 5063 goto case PROTIMER_TxRxRequestState.SetEvent1; 5064 } 5065 if (PROTIMER_txSetEvent1.Value == ev) 5066 { 5067 PROTIMER_txRequestState = PROTIMER_TxRxRequestState.SetEvent1; 5068 } 5069 break; 5070 } 5071 case PROTIMER_TxRxRequestState.SetEvent1: 5072 { 5073 if (PROTIMER_txSetEvent2.Value == ev) 5074 { 5075 PROTIMER_txRequestState = PROTIMER_TxRxRequestState.Set; 5076 PROTIMER_TxEnable = true; 5077 goto case PROTIMER_TxRxRequestState.Set; 5078 } 5079 break; 5080 } 5081 case PROTIMER_TxRxRequestState.Set: 5082 { 5083 PROTIMER_TxEnable = false; 5084 PROTIMER_txRequestState = PROTIMER_TxRxRequestState.Idle; 5085 break; 5086 } 5087 default: 5088 this.Log(LogLevel.Error, "Unreachable. Invalid PROTIMER TX Request state."); 5089 return; 5090 } 5091 } 5092 PROTIMER_UpdateRxRequestState()5093 private void PROTIMER_UpdateRxRequestState() 5094 { 5095 if (PROTIMER_rxClearEvent1.Value == PROTIMER_Event.Always 5096 && PROTIMER_rxClearEvent2.Value == PROTIMER_Event.Always) 5097 { 5098 PROTIMER_rxRequestState = PROTIMER_TxRxRequestState.Idle; 5099 } 5100 } 5101 PROTIMER_UpdateTxRequestState()5102 private void PROTIMER_UpdateTxRequestState() 5103 { 5104 if (PROTIMER_txSetEvent1.Value == PROTIMER_Event.Disabled 5105 && PROTIMER_txSetEvent2.Value == PROTIMER_Event.Disabled) 5106 { 5107 PROTIMER_rxRequestState = PROTIMER_TxRxRequestState.Idle; 5108 } 5109 else if (PROTIMER_rxSetEvent1.Value == PROTIMER_Event.Always 5110 && PROTIMER_rxSetEvent2.Value == PROTIMER_Event.Always) 5111 { 5112 PROTIMER_TriggerEvent(PROTIMER_Event.InternalTrigger); 5113 } 5114 } 5115 #endregion 5116 5117 #region MODEM methods 5118 private bool MODEM_TxRampingDoneInterrupt 5119 { 5120 set 5121 { 5122 MODEM_txRampingDoneInterrupt = value; 5123 } 5124 get 5125 { 5126 return MODEM_txRampingDoneInterrupt; 5127 } 5128 } 5129 MODEM_GetPreambleLengthInBits()5130 private uint MODEM_GetPreambleLengthInBits() 5131 { 5132 uint preambleLength = (uint)((MODEM_baseBits.Value + 1)*MODEM_txBases.Value); 5133 return preambleLength; 5134 } 5135 MODEM_GetSyncWordLengthInBits()5136 private uint MODEM_GetSyncWordLengthInBits() 5137 { 5138 return MODEM_SyncWordLength; 5139 } 5140 5141 // RENODE-52 5142 // HACK: for now we hard-code the 802.15.4 and BLE data rates, instead of computing it from 5143 // the MODEM registers. Also, we use the Viterbi demodulator to determine if the current 5144 // transmission is a BLE or 802.15.4 transmission (All BLE transmissions use the Viterbi demod). MODEM_GetDataRate()5145 private uint MODEM_GetDataRate() 5146 { 5147 return MODEM_viterbiDemodulatorEnable.Value ? MODEM_Ble1MbPhyDataRate : MODEM_802154PhyDataRate; 5148 } 5149 MODEM_GetRxChainDelayNanoS()5150 private uint MODEM_GetRxChainDelayNanoS() 5151 { 5152 return MODEM_viterbiDemodulatorEnable.Value ? MODEM_Ble1MbPhyRxChainDelayNanoS : MODEM_802154PhyRxChainDelayNanoS; 5153 } 5154 MODEM_GetRxChainDelayUs()5155 private double MODEM_GetRxChainDelayUs() 5156 { 5157 return ((double)MODEM_GetRxChainDelayNanoS()) / 1000; 5158 } 5159 MODEM_GetRxDoneDelayNanoS()5160 private uint MODEM_GetRxDoneDelayNanoS() 5161 { 5162 return MODEM_viterbiDemodulatorEnable.Value ? MODEM_Ble1MbPhyRxDoneDelayNanoS : MODEM_802154PhyRxDoneDelayNanoS; 5163 } 5164 MODEM_GetRxDoneDelayUs()5165 private double MODEM_GetRxDoneDelayUs() 5166 { 5167 return ((double)MODEM_GetRxDoneDelayNanoS()) / 1000; 5168 } 5169 MODEM_GetTxChainDelayNanoS()5170 private uint MODEM_GetTxChainDelayNanoS() 5171 { 5172 return MODEM_viterbiDemodulatorEnable.Value ? MODEM_Ble1MbPhyTxChainDelayNanoS : MODEM_802154PhyTxChainDelayNanoS; 5173 } 5174 MODEM_GetTxChainDelayUs()5175 private double MODEM_GetTxChainDelayUs() 5176 { 5177 return ((double)MODEM_GetTxChainDelayNanoS()) / 1000; 5178 } 5179 MODEM_GetTxChainDoneDelayNanoS()5180 private uint MODEM_GetTxChainDoneDelayNanoS() 5181 { 5182 return MODEM_viterbiDemodulatorEnable.Value ? MODEM_Ble1MbPhyTxDoneChainDelayNanoS : MODEM_802154PhyTxDoneChainDelayNanoS; 5183 } 5184 MODEM_GetTxChainDoneDelayUs()5185 private double MODEM_GetTxChainDoneDelayUs() 5186 { 5187 return ((double)MODEM_GetTxChainDoneDelayNanoS()) / 1000; 5188 } 5189 MODEM_GetPreambleOverTheAirTimeUs()5190 private double MODEM_GetPreambleOverTheAirTimeUs() 5191 { 5192 return (double)MODEM_GetPreambleLengthInBits()*1000000/(double)MODEM_GetDataRate(); 5193 } 5194 MODEM_GetSyncWordOverTheAirTimeUs()5195 private double MODEM_GetSyncWordOverTheAirTimeUs() 5196 { 5197 return (double)MODEM_GetSyncWordLengthInBits()*1000000/(double)MODEM_GetDataRate(); 5198 } 5199 5200 // The passed frame is assumed to NOT include the preamble and to include the SYNC WORD. MODEM_GetFrameOverTheAirTimeUs(byte[] frame, bool includePreamble, bool includeSyncWord)5201 private double MODEM_GetFrameOverTheAirTimeUs(byte[] frame, bool includePreamble, bool includeSyncWord) 5202 { 5203 uint frameLengthInBits = (uint)frame.Length*8; 5204 5205 if (includePreamble) 5206 { 5207 frameLengthInBits += MODEM_GetPreambleLengthInBits(); 5208 } 5209 5210 if (!includeSyncWord) 5211 { 5212 frameLengthInBits -= MODEM_GetSyncWordLengthInBits(); 5213 } 5214 5215 return ((double)frameLengthInBits)*1000000/(double)MODEM_GetDataRate(); 5216 } 5217 5218 // TODO: for now we are just able to distinguish between "BLE and non-BLE" by looking at the VTDEMODEN field. MODEM_GetCurrentPhy()5219 private RadioPhyId MODEM_GetCurrentPhy() 5220 { 5221 return (MODEM_viterbiDemodulatorEnable.Value ? RadioPhyId.Phy_BLE_2_4GHz_GFSK : RadioPhyId.Phy_802154_2_4GHz_OQPSK); 5222 } 5223 #endregion 5224 5225 #region CRC methods CRC_CalculateCRC()5226 private byte[] CRC_CalculateCRC() 5227 { 5228 this.Log(LogLevel.Debug, "CRC mocked with 0x0 bytes."); 5229 return Enumerable.Repeat<byte>(0x0, (int)CRC_CrcWidth).ToArray(); 5230 } 5231 #endregion 5232 5233 #region AGC methods 5234 private byte AGC_RssiFractionalPart 5235 { 5236 get 5237 { 5238 // TODO: for now AGC fractional part is always 0 5239 return 0; 5240 } 5241 } 5242 5243 private sbyte AGC_RssiIntegerPart 5244 { 5245 get 5246 { 5247 return AGC_rssiIntegerPart; 5248 } 5249 set 5250 { 5251 AGC_rssiIntegerPart = value; 5252 } 5253 } 5254 5255 private sbyte AGC_RssiIntegerPartAdjusted => (sbyte)(AGC_RssiIntegerPart + AGC_RssiWrapCompensationOffsetDbm); 5256 5257 private byte AGC_FrameRssiFractionalPart 5258 { 5259 get 5260 { 5261 // TODO: for now Frame AGC fractional part is always 0 5262 return 0; 5263 } 5264 } 5265 5266 private sbyte AGC_FrameRssiIntegerPart 5267 { 5268 set 5269 { 5270 AGC_frameRssiIntegerPart = value; 5271 5272 } 5273 get 5274 { 5275 return AGC_frameRssiIntegerPart; 5276 } 5277 } 5278 5279 private sbyte AGC_FrameRssiIntegerPartAdjusted => (sbyte)(AGC_FrameRssiIntegerPart + AGC_RssiWrapCompensationOffsetDbm); 5280 5281 private uint AGC_RssiPeriodUs 5282 { 5283 get 5284 { 5285 // RSSI measure period is defined as 2^RSSIPERIOD sub-periods. 5286 // SUBPERIOD controls if the subperiod is one baud-period or separately specified. 5287 // If SUBPERIOD is set, the sub-period is defined by SUBINT + SUBNUM/SUBDEM (TODO: for now we only consider SUBINT). 5288 // Otherwise subperiod is equal to 1 baud. 5289 // If ENCCARSSIPERIOD is set, enable the use of a separate RSSI PERIOD (CCARSSIPERIOD) during CCA measurements. 5290 //var rssiPeriod = (AGC_ccaRssiPeriodEnable.Value && PROTIMER_listenBeforeTalkState == PROTIMER_ListenBeforeTalkState.CcaDelay) ? AGC_ccaRssiPeriod.Value : AGC_rssiMeasurePeriod.Value; 5291 //var subPeriod = AGC_subPeriod.Value ? AGC_subPeriodInteger.Value : 1; 5292 5293 // TODO: we assume 250kbps OQPSK PHY baud period for now. 5294 //uint ret = (uint)(((1 << (int)rssiPeriod))*(double)subPeriod*AGC_OQPSK250KbpsPhyBaudPeriodUs); 5295 //return ret; 5296 5297 // RENODE-371: Hard-coding RSSI measure period and CCA RSSI measure period until we get to the bottom of this. 5298 if ((AGC_ccaRssiPeriodEnable.Value && PROTIMER_listenBeforeTalkState == PROTIMER_ListenBeforeTalkState.CcaDelay)) 5299 { 5300 return AGC_OQPSK250KbpsPhyCcaRssiMeasurePeriodUs; 5301 } 5302 else if (AGC_rssiStartCommandOngoing) 5303 { 5304 return AGC_OQPSK250KbpsPhyRssiMeasurePeriodUs; 5305 } 5306 else 5307 { 5308 // For background RSSI sampling we use a longer period for performance reasons. 5309 return AGC_OQPSK250KbpsPhyBackgroundRssiMeasurePeriodUs; 5310 } 5311 } 5312 } 5313 AGC_UpdateRssi()5314 private void AGC_UpdateRssi() 5315 { 5316 AGC_RssiIntegerPart = (sbyte)InterferenceQueue.GetCurrentRssi(this, MODEM_GetCurrentPhy(), Channel); 5317 5318 if (AGC_rssiFirstRead) 5319 { 5320 AGC_rssiFirstRead = false; 5321 AGC_rssiValidInterrupt.Value = true; 5322 AGC_seqRssiValidInterrupt.Value = true; 5323 } 5324 if (AGC_RssiIntegerPartAdjusted < (int)AGC_ccaThreshold.Value) 5325 { 5326 AGC_ccaInterrupt.Value = true; 5327 AGC_seqCcaInterrupt.Value = true; 5328 } 5329 else 5330 { 5331 AGC_ccaNotDetectedInterrupt.Value = true; 5332 AGC_seqCcaNotDetectedInterrupt.Value = true; 5333 } 5334 5335 if (AGC_RssiIntegerPartAdjusted > (int)AGC_rssiHighThreshold.Value) 5336 { 5337 AGC_rssiHighInterrupt.Value = true; 5338 AGC_seqRssiHighInterrupt.Value = true; 5339 } 5340 else if (AGC_RssiIntegerPartAdjusted < (int)AGC_rssiLowThreshold.Value) 5341 { 5342 AGC_rssiLowInterrupt.Value = true; 5343 AGC_seqRssiLowInterrupt.Value = true; 5344 } 5345 5346 UpdateInterrupts(); 5347 } 5348 AGC_RssiStartCommand(bool fromProtimer = false)5349 private bool AGC_RssiStartCommand(bool fromProtimer = false) 5350 { 5351 if (RAC_currentRadioState != RAC_RadioState.RxSearch && RAC_currentRadioState != RAC_RadioState.RxFrame) 5352 { 5353 AGC_RssiIntegerPart = AGC_RssiInvalid; 5354 if (fromProtimer && PROTIMER_listenBeforeTalkState != PROTIMER_ListenBeforeTalkState.Idle) 5355 { 5356 // Radio is not in RX, fail CCA immediately. 5357 PROTIMER_ListenBeforeTalkCcaCompleted(true); 5358 } 5359 return false; 5360 } 5361 else 5362 { 5363 AGC_rssiStartCommandOngoing = true; 5364 AGC_rssiStartCommandFromProtimer = fromProtimer; 5365 AGC_UpdateRssiState(); 5366 AGC_RestartRssiTimer(); 5367 return true; 5368 } 5369 } 5370 AGC_RestartRssiTimer()5371 private void AGC_RestartRssiTimer() 5372 { 5373 rssiUpdateTimer.Enabled = false; 5374 rssiUpdateTimer.Value = 0; 5375 rssiUpdateTimer.Limit = AGC_RssiPeriodUs; 5376 rssiUpdateTimer.Enabled = true; 5377 } 5378 AGC_StopRssiTimer()5379 private void AGC_StopRssiTimer() 5380 { 5381 rssiUpdateTimer.Enabled = false; 5382 AGC_rssiStartCommandOngoing = false; 5383 AGC_UpdateRssiState(); 5384 5385 if (AGC_rssiStartCommandFromProtimer) 5386 { 5387 AGC_rssiStartCommandFromProtimer = false; 5388 if (PROTIMER_listenBeforeTalkState != PROTIMER_ListenBeforeTalkState.Idle) 5389 { 5390 PROTIMER_ListenBeforeTalkCcaCompleted(true); 5391 } 5392 } 5393 } 5394 AGC_RssiUpdateTimerHandleLimitReached()5395 private void AGC_RssiUpdateTimerHandleLimitReached() 5396 { 5397 rssiUpdateTimer.Enabled = false; 5398 AGC_UpdateRssi(); 5399 if (AGC_rssiStartCommandOngoing) 5400 { 5401 AGC_rssiDoneInterrupt.Value = true; 5402 AGC_seqRssiDoneInterrupt.Value = true; 5403 5404 if (AGC_rssiStartCommandFromProtimer) 5405 { 5406 if (PROTIMER_listenBeforeTalkState != PROTIMER_ListenBeforeTalkState.Idle) 5407 { 5408 PROTIMER_ListenBeforeTalkCcaCompleted(); 5409 AGC_RestartRssiTimer(); 5410 } 5411 else 5412 { 5413 AGC_rssiStartCommandOngoing = false; 5414 AGC_rssiStartCommandFromProtimer = false; 5415 } 5416 } 5417 else 5418 { 5419 AGC_rssiStartCommandOngoing = false; 5420 } 5421 5422 AGC_UpdateRssiState(); 5423 } 5424 } 5425 AGC_UpdateRssiState()5426 private void AGC_UpdateRssiState() 5427 { 5428 if (AGC_rssiStartCommandOngoing) 5429 { 5430 AGC_rssiState.Value = AGC_RssiState.Command; 5431 } 5432 else if (RAC_currentRadioState == RAC_RadioState.RxSearch) 5433 { 5434 AGC_rssiState.Value = AGC_RssiState.Period; 5435 } 5436 else if (RAC_currentRadioState == RAC_RadioState.RxFrame) 5437 { 5438 AGC_rssiState.Value = AGC_RssiState.FameDetection; 5439 } 5440 else 5441 { 5442 AGC_rssiState.Value = AGC_RssiState.Idle; 5443 } 5444 } 5445 #endregion 5446 5447 #region FRC fields 5448 private bool FRC_rxDonePending = false; 5449 private bool FRC_rxFrameIrqClearedPending = false; 5450 private uint FRC_FrameLength => (uint)FRC_frameLength.Value + 1; 5451 private const uint FRC_NumberOfFrameDescriptors = 4; 5452 private const uint FRC_PacketBufferCaptureSize = 48; 5453 private byte[] FRC_packetBufferCapture; 5454 private FRC_FrameDescriptor[] FRC_frameDescriptor; 5455 private IFlagRegisterField FRC_activeTransmitFrameDescriptor; 5456 private IFlagRegisterField FRC_activeReceiveFrameDescriptor; 5457 private IFlagRegisterField FRC_rxRawBlocked; 5458 private IValueRegisterField FRC_fsmState; 5459 private IFlagRegisterField FRC_enableRawDataRandomNumberGenerator; 5460 private IEnumRegisterField<FRC_RxRawDataMode> FRC_rxRawDataSelect; 5461 private IEnumRegisterField<FRC_RxRawDataTriggerMode> FRC_rxRawDataTriggerSelect; 5462 private IEnumRegisterField<FRC_DynamicFrameLengthMode> FRC_dynamicFrameLengthMode; 5463 private IEnumRegisterField<FRC_DynamicFrameLengthBitOrder> FRC_dynamicFrameLengthBitOrder; 5464 private IValueRegisterField FRC_dynamicFrameLengthBitShift; 5465 private IValueRegisterField FRC_dynamicFrameLengthOffset; 5466 private IValueRegisterField FRC_dynamicFrameLengthBits; 5467 private IValueRegisterField FRC_minDecodedLength; 5468 private IFlagRegisterField FRC_dynamicFrameCrcIncluded; 5469 private IValueRegisterField FRC_maxDecodedLength; 5470 private IValueRegisterField FRC_initialDecodedFrameLength; 5471 private IValueRegisterField FRC_wordCounter; 5472 private IValueRegisterField FRC_frameLength; 5473 private IValueRegisterField FRC_lengthFieldLocation; 5474 private IEnumRegisterField<FRC_FrameDescriptorMode> FRC_txFrameDescriptorMode; 5475 private IEnumRegisterField<FRC_FrameDescriptorMode> FRC_rxFrameDescriptorMode; 5476 private IFlagRegisterField FRC_rxStoreCrc; 5477 private IFlagRegisterField FRC_rxAcceptCrcErrors; 5478 private IFlagRegisterField FRC_rxBufferClear; 5479 private IFlagRegisterField FRC_rxBufferRestoreOnFrameError; 5480 private IFlagRegisterField FRC_rxBufferRestoreOnRxAborted; 5481 private IFlagRegisterField FRC_rxAppendRssi; 5482 private IFlagRegisterField FRC_rxAppendStatus; 5483 private IFlagRegisterField FRC_rxAppendProtimerCc0base; 5484 private IFlagRegisterField FRC_rxAppendProtimerCc0LowWrap; 5485 private IFlagRegisterField FRC_rxAppendProtimerCc0HighWrap; 5486 private IValueRegisterField FRC_packetBufferStartAddress; 5487 private IValueRegisterField FRC_packetBufferThreshold; 5488 private IFlagRegisterField FRC_packetBufferThresholdEnable; 5489 private IFlagRegisterField FRC_packetBufferStop; 5490 private IValueRegisterField FRC_packetBufferCount; 5491 private IFlagRegisterField FRC_txDoneInterrupt; 5492 private IFlagRegisterField FRC_txAfterFrameDoneInterrupt; 5493 private IFlagRegisterField FRC_txUnderflowInterrupt; 5494 private IFlagRegisterField FRC_rxDoneInterrupt; 5495 private IFlagRegisterField FRC_rxAbortedInterrupt; 5496 private IFlagRegisterField FRC_frameErrorInterrupt; 5497 private IFlagRegisterField FRC_rxOverflowInterrupt; 5498 private IFlagRegisterField FRC_rxRawEventInterrupt; 5499 private IFlagRegisterField FRC_txRawEventInterrupt; 5500 private IFlagRegisterField FRC_packetBufferStartInterrupt; 5501 private IFlagRegisterField FRC_packetBufferThresholdInterrupt; 5502 private IFlagRegisterField FRC_txDoneInterruptEnable; 5503 private IFlagRegisterField FRC_txAfterFrameDoneInterruptEnable; 5504 private IFlagRegisterField FRC_txUnderflowInterruptEnable; 5505 private IFlagRegisterField FRC_rxDoneInterruptEnable; 5506 private IFlagRegisterField FRC_rxAbortedInterruptEnable; 5507 private IFlagRegisterField FRC_frameErrorInterruptEnable; 5508 private IFlagRegisterField FRC_rxOverflowInterruptEnable; 5509 private IFlagRegisterField FRC_rxRawEventInterruptEnable; 5510 private IFlagRegisterField FRC_txRawEventInterruptEnable; 5511 private IFlagRegisterField FRC_packetBufferStartInterruptEnable; 5512 private IFlagRegisterField FRC_packetBufferThresholdInterruptEnable; 5513 private IFlagRegisterField FRC_seqTxDoneInterrupt; 5514 private IFlagRegisterField FRC_seqTxAfterFrameDoneInterrupt; 5515 private IFlagRegisterField FRC_seqTxUnderflowInterrupt; 5516 private IFlagRegisterField FRC_seqRxDoneInterrupt; 5517 private IFlagRegisterField FRC_seqRxAbortedInterrupt; 5518 private IFlagRegisterField FRC_seqFrameErrorInterrupt; 5519 private IFlagRegisterField FRC_seqRxOverflowInterrupt; 5520 private IFlagRegisterField FRC_seqRxRawEventInterrupt; 5521 private IFlagRegisterField FRC_seqTxRawEventInterrupt; 5522 private IFlagRegisterField FRC_seqPacketBufferStartInterrupt; 5523 private IFlagRegisterField FRC_seqPacketBufferThresholdInterrupt; 5524 private IFlagRegisterField FRC_seqTxDoneInterruptEnable; 5525 private IFlagRegisterField FRC_seqTxAfterFrameDoneInterruptEnable; 5526 private IFlagRegisterField FRC_seqTxUnderflowInterruptEnable; 5527 private IFlagRegisterField FRC_seqRxDoneInterruptEnable; 5528 private IFlagRegisterField FRC_seqRxAbortedInterruptEnable; 5529 private IFlagRegisterField FRC_seqFrameErrorInterruptEnable; 5530 private IFlagRegisterField FRC_seqRxOverflowInterruptEnable; 5531 private IFlagRegisterField FRC_seqRxRawEventInterruptEnable; 5532 private IFlagRegisterField FRC_seqTxRawEventInterruptEnable; 5533 private IFlagRegisterField FRC_seqPacketBufferStartInterruptEnable; 5534 private IFlagRegisterField FRC_seqPacketBufferThresholdInterruptEnable; 5535 #endregion 5536 5537 #region RAC fields 5538 private RAC_InternalTxState RAC_internalTxState = RAC_InternalTxState.Idle; 5539 private RAC_InternalRxState RAC_internalRxState = RAC_InternalRxState.Idle; 5540 private double RAC_rxTimeAlreadyPassedUs = 0; 5541 private bool RAC_ongoingRxCollided = false; 5542 private RAC_RadioState RAC_currentRadioState = RAC_RadioState.Off; 5543 private RAC_RadioState RAC_previous1RadioState = RAC_RadioState.Off; 5544 private RAC_RadioState RAC_previous2RadioState = RAC_RadioState.Off; 5545 private RAC_RadioState RAC_previous3RadioState = RAC_RadioState.Off; 5546 private IValueRegisterField RAC_softwareRxEnable; 5547 private IFlagRegisterField RAC_forceStateActive; 5548 private IFlagRegisterField RAC_txAfterFramePending; 5549 private IFlagRegisterField RAC_txAfterFrameActive; 5550 private IFlagRegisterField RAC_sequencerInSleeping; 5551 private IFlagRegisterField RAC_sequencerInDeepSleep; 5552 private IFlagRegisterField RAC_sequencerActive; 5553 private IEnumRegisterField<RAC_RadioState> RAC_forceStateTransition; 5554 private IFlagRegisterField RAC_prsForceTx; 5555 private IFlagRegisterField RAC_forceDisable; 5556 private IFlagRegisterField RAC_exitShutdownDisable; 5557 private IFlagRegisterField RAC_txAfterRx; 5558 private bool RAC_em1pAckPending; 5559 private IFlagRegisterField RAC_paRampingDone; 5560 // RENODE-53 5561 // TODO: calculate the ramping time from registers 5562 private const uint RAC_PowerAmplifierRampingTimeUs = 5; 5563 private bool RAC_paOutputLevelRamping = false; 5564 private IValueRegisterField RAC_mainCoreSeqInterrupts; 5565 private IFlagRegisterField RAC_radioStateChangeInterrupt; 5566 private IFlagRegisterField RAC_stimerCompareEventInterrupt; 5567 private IValueRegisterField RAC_mainCoreSeqInterruptsEnable; 5568 private IFlagRegisterField RAC_radioStateChangeInterruptEnable; 5569 private IFlagRegisterField RAC_stimerCompareEventInterruptEnable; 5570 // Sequencer Radio State Machine Interrupt Flag 5571 private IFlagRegisterField RAC_seqRadioStateChangeInterrupt; 5572 private IFlagRegisterField RAC_seqStimerCompareEventInterrupt; 5573 private IFlagRegisterField RAC_seqDemodRxRequestClearInterrupt; 5574 private IFlagRegisterField RAC_seqPrsEventInterrupt; 5575 private IFlagRegisterField RAC_seqStateOffInterrupt; 5576 private IFlagRegisterField RAC_seqStateRxWarmInterrupt; 5577 private IFlagRegisterField RAC_seqStateRxSearchInterrupt; 5578 private IFlagRegisterField RAC_seqStateRxFrameInterrupt; 5579 private IFlagRegisterField RAC_seqStateRxPoweringDownInterrupt; 5580 private IFlagRegisterField RAC_seqStateRx2RxInterrupt; 5581 private IFlagRegisterField RAC_seqStateRxOverflowInterrupt; 5582 private IFlagRegisterField RAC_seqStateRx2TxInterrupt; 5583 private IFlagRegisterField RAC_seqStateTxWarmInterrupt; 5584 private IFlagRegisterField RAC_seqStateTxInterrupt; 5585 private IFlagRegisterField RAC_seqStateTxPoweringDownInterrupt; 5586 private IFlagRegisterField RAC_seqStateTx2RxInterrupt; 5587 private IFlagRegisterField RAC_seqStateTx2TxInterrupt; 5588 private IFlagRegisterField RAC_seqStateShutDownInterrupt; 5589 // Sequencer Radio State Machine Interrupt Enable 5590 private IFlagRegisterField RAC_seqRadioStateChangeInterruptEnable; 5591 private IFlagRegisterField RAC_seqStimerCompareEventInterruptEnable; 5592 private IFlagRegisterField RAC_seqDemodRxRequestClearInterruptEnable; 5593 private IFlagRegisterField RAC_seqPrsEventInterruptEnable; 5594 private IFlagRegisterField RAC_seqStateOffInterruptEnable; 5595 private IFlagRegisterField RAC_seqStateRxWarmInterruptEnable; 5596 private IFlagRegisterField RAC_seqStateRxSearchInterruptEnable; 5597 private IFlagRegisterField RAC_seqStateRxFrameInterruptEnable; 5598 private IFlagRegisterField RAC_seqStateRxPoweringDownInterruptEnable; 5599 private IFlagRegisterField RAC_seqStateRx2RxInterruptEnable; 5600 private IFlagRegisterField RAC_seqStateRxOverflowInterruptEnable; 5601 private IFlagRegisterField RAC_seqStateRx2TxInterruptEnable; 5602 private IFlagRegisterField RAC_seqStateTxWarmInterruptEnable; 5603 private IFlagRegisterField RAC_seqStateTxInterruptEnable; 5604 private IFlagRegisterField RAC_seqStateTxPoweringDownInterruptEnable; 5605 private IFlagRegisterField RAC_seqStateTx2RxInterruptEnable; 5606 private IFlagRegisterField RAC_seqStateTx2TxInterruptEnable; 5607 private IFlagRegisterField RAC_seqStateShutDownInterruptEnable; 5608 private IValueRegisterField RAC_seqTimerPrescaler; 5609 private IValueRegisterField RAC_seqTimerCompareValue; 5610 private IEnumRegisterField<RAC_SeqTimerCompareAction> RAC_seqTimerCompareAction; 5611 private IEnumRegisterField<RAC_SeqTimerCompareInvalidMode> RAC_seqTimerCompareInvalidMode; 5612 private IFlagRegisterField RAC_seqTimerCompareRelative; 5613 private IFlagRegisterField RAC_seqTimerAlwaysRun; 5614 private const uint RAC_NumberOfSequencerStorageRegisters = 4; 5615 private const uint RAC_NumberOfScratchRegisters = 8; 5616 private IValueRegisterField[] RAC_seqStorage = new IValueRegisterField[RAC_NumberOfSequencerStorageRegisters]; 5617 private IValueRegisterField[] RAC_scratch = new IValueRegisterField[RAC_NumberOfScratchRegisters]; 5618 private IFlagRegisterField RAC_unlocked; 5619 private bool RAC_0DbmSupport = false; 5620 private bool RAC_10DbmSupport = false; 5621 private bool RAC_20DbmSupport = false; 5622 private ushort RAC_seqTimerLimit = 0xFFFF; 5623 private bool RAC_txEnable; 5624 private bool RAC_TxEnable 5625 { 5626 get => RAC_txEnable; 5627 set 5628 { 5629 /* 5630 value |= ProtimerTxEnable; 5631 value &= !radioStateMachineForceDisable.Value; 5632 */ 5633 var risingEdge = value && !RAC_txEnable; 5634 RAC_txEnable = value; 5635 5636 if (risingEdge) 5637 { 5638 RAC_UpdateRadioStateMachine(RAC_RadioStateMachineSignal.TxEnable); 5639 } 5640 } 5641 } 5642 private uint RAC_TxEnableMask 5643 { 5644 get => 0; 5645 set 5646 { 5647 // TODO 5648 } 5649 } 5650 5651 // 0:13 correspond to RAC_RXENSRCEN[13:0] 5652 // Bit 14 indicates that the PROTIMER is requesting RXEN 5653 // Bit 15 indicates that SPI is requesting RXEN 5654 private uint RAC_RxEnableMask => ((uint)RAC_softwareRxEnable.Value 5655 /* 5656 | (RAC_channelBusyRxEnable.Value << 8) 5657 | (RAC_timingDetectedRxEnable.Value << 9) 5658 | (RAC_preambleDetectedRxEnable.Value << 10) 5659 | (RAC_frameDetectedRxEnable.Value << 11) 5660 | (RAC_demodRxRequestRxEnable.Value << 12) 5661 | (RAC_prsRxEnable.Value << 13) 5662 */ 5663 | ((PROTIMER_RxEnable ? 1U : 0U) << 14) 5664 /* 5665 | (SPI_RxEnable << 15) 5666 */ 5667 ); 5668 private bool RAC_RxEnable => RAC_RxEnableMask != 0; 5669 #endregion 5670 5671 #region PROTIMER fields 5672 private uint PROTIMER_preCounterSourcedBitmask = 0; 5673 private const uint PROTIMER_DefaultLightWeightTimerLimit = 0xFFFFFFFF; 5674 private const uint PROTIMER_MinimumTimeoutCounterDelay = 2; 5675 private const uint PROTIMER_NumberOfTimeoutCounters = 2; 5676 private PROTIMER_TimeoutCounter[] PROTIMER_timeoutCounter; 5677 private const uint PROTIMER_NumberOfCaptureCompareChannels = 8; 5678 private PROTIMER_CaptureCompareChannel[] PROTIMER_captureCompareChannel; 5679 private IEnumRegisterField<PROTIMER_PreCounterSource> PROTIMER_preCounterSource; 5680 private IEnumRegisterField<PROTIMER_BaseCounterSource> PROTIMER_baseCounterSource; 5681 private IEnumRegisterField<PROTIMER_WrapCounterSource> PROTIMER_wrapCounterSource; 5682 private ushort PROTIMER_baseCounterValue = 0; 5683 private uint PROTIMER_wrapCounterValue = 0; 5684 private IValueRegisterField PROTIMER_preCounterTopInteger; 5685 private IValueRegisterField PROTIMER_preCounterTopFractional; 5686 private IValueRegisterField PROTIMER_baseCounterTop; 5687 private IValueRegisterField PROTIMER_wrapCounterTop; 5688 private bool PROTIMER_txEnable = false; 5689 private IEnumRegisterField<PROTIMER_Event> PROTIMER_rxSetEvent1; 5690 private IEnumRegisterField<PROTIMER_Event> PROTIMER_rxSetEvent2; 5691 private IEnumRegisterField<PROTIMER_Event> PROTIMER_rxClearEvent1; 5692 private IEnumRegisterField<PROTIMER_Event> PROTIMER_rxClearEvent2; 5693 private IEnumRegisterField<PROTIMER_Event> PROTIMER_txSetEvent1; 5694 private IEnumRegisterField<PROTIMER_Event> PROTIMER_txSetEvent2; 5695 private PROTIMER_TxRxRequestState PROTIMER_txRequestState = PROTIMER_TxRxRequestState.Idle; 5696 private PROTIMER_TxRxRequestState PROTIMER_rxRequestState = PROTIMER_TxRxRequestState.Idle; 5697 private PROTIMER_ListenBeforeTalkState PROTIMER_listenBeforeTalkState = PROTIMER_ListenBeforeTalkState.Idle; 5698 private bool PROTIMER_listenBeforeTalkPending = false; 5699 private IFlagRegisterField PROTIMER_listenBeforeTalkSync; 5700 private IFlagRegisterField PROTIMER_listenBeforeTalkRunning; 5701 private IFlagRegisterField PROTIMER_listenBeforeTalkPaused; 5702 private IValueRegisterField PROTIMER_listenBeforeTalkStartExponent; 5703 private IValueRegisterField PROTIMER_listenBeforeTalkMaxExponent; 5704 private IValueRegisterField PROTIMER_listenBeforeTalkExponent; 5705 private IValueRegisterField PROTIMER_listenBeforeTalkRetryCounter; 5706 private IValueRegisterField PROTIMER_ccaDelay; 5707 private IValueRegisterField PROTIMER_ccaRepeat; 5708 private IFlagRegisterField PROTIMER_fixedBackoff; 5709 private IValueRegisterField PROTIMER_retryLimit; 5710 private IValueRegisterField PROTIMER_ccaCounter; 5711 // Interrupt fields 5712 private IFlagRegisterField PROTIMER_preCounterOverflowInterruptEnable; 5713 private IFlagRegisterField PROTIMER_baseCounterOverflowInterruptEnable; 5714 private IFlagRegisterField PROTIMER_wrapCounterOverflowInterruptEnable; 5715 private IFlagRegisterField PROTIMER_listenBeforeTalkSuccessInterruptEnable; 5716 private IFlagRegisterField PROTIMER_listenBeforeTalkFailureInterruptEnable; 5717 private IFlagRegisterField PROTIMER_listenBeforeTalkRetryInterruptEnable; 5718 private IFlagRegisterField PROTIMER_listenBeforeTalkTimeoutCounterMatchInterruptEnable; 5719 private IFlagRegisterField PROTIMER_preCounterOverflowInterrupt; 5720 private IFlagRegisterField PROTIMER_baseCounterOverflowInterrupt; 5721 private IFlagRegisterField PROTIMER_wrapCounterOverflowInterrupt; 5722 private IFlagRegisterField PROTIMER_listenBeforeTalkSuccessInterrupt; 5723 private IFlagRegisterField PROTIMER_listenBeforeTalkFailureInterrupt; 5724 private IFlagRegisterField PROTIMER_listenBeforeTalkRetryInterrupt; 5725 private IFlagRegisterField PROTIMER_listenBeforeTalkTimeoutCounterMatchInterrupt; 5726 private IFlagRegisterField PROTIMER_seqPreCounterOverflowInterruptEnable; 5727 private IFlagRegisterField PROTIMER_seqBaseCounterOverflowInterruptEnable; 5728 private IFlagRegisterField PROTIMER_seqWrapCounterOverflowInterruptEnable; 5729 private IFlagRegisterField PROTIMER_seqListenBeforeTalkSuccessInterruptEnable; 5730 private IFlagRegisterField PROTIMER_seqListenBeforeTalkFailureInterruptEnable; 5731 private IFlagRegisterField PROTIMER_seqListenBeforeTalkRetryInterruptEnable; 5732 private IFlagRegisterField PROTIMER_seqListenBeforeTalkTimeoutCounterMatchInterruptEnable; 5733 private IFlagRegisterField PROTIMER_seqPreCounterOverflowInterrupt; 5734 private IFlagRegisterField PROTIMER_seqBaseCounterOverflowInterrupt; 5735 private IFlagRegisterField PROTIMER_seqWrapCounterOverflowInterrupt; 5736 private IFlagRegisterField PROTIMER_seqListenBeforeTalkSuccessInterrupt; 5737 private IFlagRegisterField PROTIMER_seqListenBeforeTalkFailureInterrupt; 5738 private IFlagRegisterField PROTIMER_seqListenBeforeTalkRetryInterrupt; 5739 private IFlagRegisterField PROTIMER_seqListenBeforeTalkTimeoutCounterMatchInterrupt; 5740 #endregion 5741 5742 #region BUFC fields 5743 private const uint BUFC_NumberOfBuffers = 4; 5744 private BUFC_Buffer[] BUFC_buffer; 5745 #endregion 5746 5747 #region MODEM fields 5748 private const uint MODEM_Ble1MbPhyDataRate = 1000000; 5749 private const uint MODEM_Ble1MbPhyRxChainDelayNanoS = 50000; 5750 private const uint MODEM_Ble1MbPhyRxDoneDelayNanoS = 11250; 5751 private const uint MODEM_Ble1MbPhyTxChainDelayNanoS = 750; 5752 // TODO: verify this 5753 private const uint MODEM_Ble1MbPhyTxDoneChainDelayNanoS = 750; 5754 private const uint MODEM_802154PhyDataRate = 250000; 5755 private const uint MODEM_802154PhyRxChainDelayNanoS = 6625; 5756 private const uint MODEM_802154PhyRxDoneDelayNanoS = 6625; 5757 private const uint MODEM_802154PhyTxChainDelayNanoS = 600; 5758 // TODO: verify this 5759 private const uint MODEM_802154PhyTxDoneChainDelayNanoS = 0; 5760 private uint MODEM_SyncWordLength => (uint)MODEM_syncBits.Value + 1; 5761 private uint MODEM_SyncWordBytes => ((uint)MODEM_syncBits.Value >> 3) + 1; 5762 private uint MODEM_TxSyncWord => (MODEM_dualSync.Value && MODEM_txSync.Value) ? (uint)MODEM_syncWord1.Value : (uint)MODEM_syncWord0.Value; 5763 private uint MODEM_SyncWord0 => (uint)MODEM_syncWord0.Value & (uint)((1UL << (byte)MODEM_SyncWordLength) - 1); 5764 private uint MODEM_SyncWord1 => (uint)MODEM_syncWord1.Value & (uint)((1UL << (byte)MODEM_SyncWordLength) - 1); 5765 private bool MODEM_txRampingDoneInterrupt = true; 5766 private IFlagRegisterField MODEM_txFrameSentInterrupt; 5767 private IFlagRegisterField MODEM_txSyncSentInterrupt; 5768 private IFlagRegisterField MODEM_txPreambleSentInterrupt; 5769 private IFlagRegisterField MODEM_rxPreambleDetectedInterrupt; 5770 private IFlagRegisterField MODEM_rxFrameWithSyncWord0DetectedInterrupt; 5771 private IFlagRegisterField MODEM_rxFrameWithSyncWord1DetectedInterrupt; 5772 private IFlagRegisterField MODEM_rxPreambleLostInterrupt; 5773 private IFlagRegisterField MODEM_txFrameSentInterruptEnable; 5774 private IFlagRegisterField MODEM_txSyncSentInterruptEnable; 5775 private IFlagRegisterField MODEM_txPreambleSentInterruptEnable; 5776 private IFlagRegisterField MODEM_txRampingDoneInterruptEnable; 5777 private IFlagRegisterField MODEM_rxPreambleDetectedInterruptEnable; 5778 private IFlagRegisterField MODEM_rxFrameWithSyncWord0DetectedInterruptEnable; 5779 private IFlagRegisterField MODEM_rxFrameWithSyncWord1DetectedInterruptEnable; 5780 private IFlagRegisterField MODEM_rxPreambleLostInterruptEnable; 5781 private IFlagRegisterField MODEM_seqTxFrameSentInterrupt; 5782 private IFlagRegisterField MODEM_seqTxSyncSentInterrupt; 5783 private IFlagRegisterField MODEM_seqTxPreambleSentInterrupt; 5784 private IFlagRegisterField MODEM_seqRxPreambleDetectedInterrupt; 5785 private IFlagRegisterField MODEM_seqRxFrameWithSyncWord0DetectedInterrupt; 5786 private IFlagRegisterField MODEM_seqRxFrameWithSyncWord1DetectedInterrupt; 5787 private IFlagRegisterField MODEM_seqRxPreambleLostInterrupt; 5788 private IFlagRegisterField MODEM_seqTxFrameSentInterruptEnable; 5789 private IFlagRegisterField MODEM_seqTxSyncSentInterruptEnable; 5790 private IFlagRegisterField MODEM_seqTxPreambleSentInterruptEnable; 5791 private IFlagRegisterField MODEM_seqTxRampingDoneInterruptEnable; 5792 private IFlagRegisterField MODEM_seqRxPreambleDetectedInterruptEnable; 5793 private IFlagRegisterField MODEM_seqRxFrameWithSyncWord0DetectedInterruptEnable; 5794 private IFlagRegisterField MODEM_seqRxFrameWithSyncWord1DetectedInterruptEnable; 5795 private IFlagRegisterField MODEM_seqRxPreambleLostInterruptEnable; 5796 5797 private IValueRegisterField MODEM_baseBits; 5798 private IValueRegisterField MODEM_txBases; 5799 private IValueRegisterField MODEM_syncBits; 5800 private IFlagRegisterField MODEM_dualSync; 5801 private IFlagRegisterField MODEM_txSync; 5802 private IFlagRegisterField MODEM_syncData; 5803 private IValueRegisterField MODEM_syncWord0; 5804 private IValueRegisterField MODEM_syncWord1; 5805 private IFlagRegisterField MODEM_frameDetectedId; 5806 private IValueRegisterField MODEM_rampRate0; 5807 private IValueRegisterField MODEM_rampRate1; 5808 private IValueRegisterField MODEM_rampRate2; 5809 private IFlagRegisterField MODEM_rampDisable; 5810 private IValueRegisterField MODEM_rampValue; 5811 private IFlagRegisterField MODEM_viterbiDemodulatorEnable; 5812 private IEnumRegisterField<MODEM_DemodulatorState> MODEM_demodulatorState; 5813 #endregion 5814 5815 #region CRC Fields 5816 private uint CRC_CrcWidth => (uint)CRC_crcWidthMode.Value + 1; 5817 private IEnumRegisterField<CRC_CrcWidthMode> CRC_crcWidthMode; 5818 private IFlagRegisterField CRC_reverseCrcByteOrdering; 5819 private IValueRegisterField CRC_crcBitsPerWord; 5820 #endregion 5821 5822 #region AGC fields 5823 // The PHYs are configured in a way that the produced RSSI values are shifted by this value. 5824 // This is to avoid some wrap issue with very small values. 5825 // RAIL then subtracts this offset to all RSSI values coming from the hardware. 5826 // TODO: this value should be able to be inferred from the overall PHY Configurator registers setup, 5827 // for now we just hard-code the offset. 5828 private const uint AGC_RssiWrapCompensationOffsetDbm = 50; 5829 // RENODE-371: these values are a temporary work-around until the ticket is addressed. 5830 private const uint AGC_OQPSK250KbpsPhyCcaRssiMeasurePeriodUs = 128; 5831 private const uint AGC_OQPSK250KbpsPhyRssiMeasurePeriodUs = 8; 5832 private const uint AGC_OQPSK250KbpsPhyBackgroundRssiMeasurePeriodUs = 50; 5833 private const int AGC_RssiInvalid = -128; 5834 private bool AGC_rssiFirstRead = true; 5835 private bool AGC_rssiStartCommandOngoing = false; 5836 private bool AGC_rssiStartCommandFromProtimer = false; 5837 private sbyte AGC_rssiIntegerPart; 5838 private sbyte AGC_frameRssiIntegerPart; 5839 private IFlagRegisterField AGC_cca; 5840 private IValueRegisterField AGC_ccaThreshold; 5841 private IValueRegisterField AGC_rssiMeasurePeriod; 5842 private IValueRegisterField AGC_powerMeasurePeriod; 5843 private IEnumRegisterField<AGC_CcaMode> AGC_ccaMode; 5844 private IEnumRegisterField<AGC_CcaMode3Logic> AGC_ccaMode3Logic; 5845 private IEnumRegisterField<AGC_RssiState> AGC_rssiState; 5846 private IFlagRegisterField AGC_ccaSoftwareControl; 5847 private IValueRegisterField AGC_ccaRssiPeriod; 5848 private IFlagRegisterField AGC_ccaRssiPeriodEnable; 5849 private IValueRegisterField AGC_rssiHighThreshold; 5850 private IValueRegisterField AGC_rssiLowThreshold; 5851 private IValueRegisterField AGC_rssiShift; 5852 private IFlagRegisterField AGC_subPeriod; 5853 private IValueRegisterField AGC_subPeriodInteger; 5854 // Interrupt fields 5855 private IFlagRegisterField AGC_rssiValidInterrupt; 5856 private IFlagRegisterField AGC_ccaInterrupt; 5857 private IFlagRegisterField AGC_rssiDoneInterrupt; 5858 private IFlagRegisterField AGC_rssiHighInterrupt; 5859 private IFlagRegisterField AGC_rssiLowInterrupt; 5860 private IFlagRegisterField AGC_ccaNotDetectedInterrupt; 5861 private IFlagRegisterField AGC_rssiValidInterruptEnable; 5862 private IFlagRegisterField AGC_ccaInterruptEnable; 5863 private IFlagRegisterField AGC_rssiDoneInterruptEnable; 5864 private IFlagRegisterField AGC_rssiHighInterruptEnable; 5865 private IFlagRegisterField AGC_rssiLowInterruptEnable; 5866 private IFlagRegisterField AGC_ccaNotDetectedInterruptEnable; 5867 private IFlagRegisterField AGC_seqRssiValidInterrupt; 5868 private IFlagRegisterField AGC_seqCcaInterrupt; 5869 private IFlagRegisterField AGC_seqRssiDoneInterrupt; 5870 private IFlagRegisterField AGC_seqRssiHighInterrupt; 5871 private IFlagRegisterField AGC_seqRssiLowInterrupt; 5872 private IFlagRegisterField AGC_seqCcaNotDetectedInterrupt; 5873 private IFlagRegisterField AGC_seqRssiValidInterruptEnable; 5874 private IFlagRegisterField AGC_seqCcaInterruptEnable; 5875 private IFlagRegisterField AGC_seqRssiDoneInterruptEnable; 5876 private IFlagRegisterField AGC_seqRssiHighInterruptEnable; 5877 private IFlagRegisterField AGC_seqRssiLowInterruptEnable; 5878 private IFlagRegisterField AGC_seqCcaNotDetectedInterruptEnable; 5879 #endregion 5880 5881 #region HOST Mailbox Fields 5882 private IValueRegisterField[] HOSTMAILBOX_messagePointer = new IValueRegisterField[MailboxMessageNumber]; 5883 private IFlagRegisterField[] HOSTMAILBOX_messageInterrupt = new IFlagRegisterField[MailboxMessageNumber]; 5884 private IFlagRegisterField[] HOSTMAILBOX_messageInterruptEnable = new IFlagRegisterField[MailboxMessageNumber]; 5885 #endregion 5886 5887 5888 #region Radio Mailbox Fields 5889 private IValueRegisterField[] RFMAILBOX_messagePointer = new IValueRegisterField[MailboxMessageNumber]; 5890 private IFlagRegisterField[] RFMAILBOX_messageInterrupt = new IFlagRegisterField[MailboxMessageNumber]; 5891 private IFlagRegisterField[] RFMAILBOX_messageInterruptEnable = new IFlagRegisterField[MailboxMessageNumber]; 5892 #endregion 5893 5894 #region FRC enums 5895 private enum FRC_FSMState 5896 { 5897 Idle = 0x00, 5898 RxInit = 0x01, 5899 RxData = 0x02, 5900 RxCrc = 0x03, 5901 RxFcdUpdate = 0x04, 5902 RxDiscard = 0x05, 5903 RxTrail = 0x06, 5904 RxDone = 0x07, 5905 RxPauseInit = 0x08, 5906 RxPaused = 0x09, 5907 Undefined1 = 0x0A, 5908 Undefined2 = 0x0B, 5909 RxCrcZeroCheck = 0x0C, 5910 RxSup = 0x0D, 5911 RxWaitEof = 0x0E, 5912 Undefined3 = 0x0F, 5913 TxInit = 0x10, 5914 TxData = 0x11, 5915 TxCrc = 0x12, 5916 TxFdcUpdate = 0x13, 5917 TxTrail = 0x14, 5918 TxFlush = 0x15, 5919 TxDone = 0x16, 5920 TxDoneWait = 0x17, 5921 TxRaw = 0x18, 5922 TxPauseFlush = 0x19, 5923 } 5924 5925 private enum FRC_RxRawDataMode 5926 { 5927 Disable = 0x0, 5928 SingleItem = 0x1, 5929 SingleBuffer = 0x2, 5930 SingleBufferFrame = 0x3, 5931 RepeatBuffer = 0x4, 5932 } 5933 5934 private enum FRC_RxRawDataTriggerMode 5935 { 5936 Immediate = 0x0, 5937 PRS = 0x1, 5938 InternalSignal = 0x2, 5939 } 5940 5941 private enum FRC_DynamicFrameLengthMode 5942 { 5943 Disable = 0x0, 5944 SingleByte = 0x1, 5945 SingleByteMSB = 0x2, 5946 DualByteLSBFirst = 0x3, 5947 DualByteMSBFirst = 0x4, 5948 Infinite = 0x5, 5949 BlockError = 0x6, 5950 } 5951 5952 private enum FRC_DynamicFrameLengthBitOrder 5953 { 5954 Normal = 0x0, 5955 Reverse = 0x1, 5956 } 5957 5958 private enum FRC_FrameDescriptorMode 5959 { 5960 FrameDescriptorMode0 = 0x0, 5961 FrameDescriptorMode1 = 0x1, 5962 FrameDescriptorMode2 = 0x2, 5963 FrameDescriptorMode3 = 0x3, 5964 } 5965 #endregion 5966 5967 #region RAC enums 5968 private enum RAC_RadioState 5969 { 5970 Off = 0, 5971 RxWarm = 1, 5972 RxSearch = 2, 5973 RxFrame = 3, 5974 RxPoweringDown = 4, 5975 Rx2Rx = 5, 5976 RxOverflow = 6, 5977 Rx2Tx = 7, 5978 TxWarm = 8, 5979 Tx = 9, 5980 TxPoweringDown = 10, 5981 Tx2Rx = 11, 5982 Tx2Tx = 12, 5983 Shutdown = 13, 5984 PowerOnReset = 14, 5985 } 5986 5987 private enum RAC_RadioStateMachineSignal 5988 { 5989 None = 0, 5990 Reset = 1, 5991 ForceDisable = 2, 5992 ForceTx = 3, 5993 RxEnable = 4, 5994 TxEnable = 5, 5995 RxDone = 6, 5996 TxDone = 7, 5997 FrameDetected = 8, 5998 RxCalibration = 9, 5999 RxOverflow = 10, 6000 SequencerDelay = 11, 6001 SequencerEnd = 12, 6002 RxDisable = 13, 6003 TxAfterFrameActive = 14, 6004 TxAfterFramePending = 15, 6005 TxDisable = 16, 6006 TxWarmIrqCleared = 17, 6007 RxWarmIrqCleared = 18, 6008 RxPowerDownIrqCleared = 19, 6009 RxOverflowIrqCleared = 20, 6010 Rx2RxIrqCleared = 21, 6011 Rx2TxIrqCleared = 22, 6012 Tx2RxIrqCleared = 23, 6013 Tx2TxIrqCleared = 24, 6014 TxIrqCleared = 25, 6015 TxPowerDownIrqCleared = 26, 6016 RxSearchIrqCleared = 27, 6017 RxFrameIrqCleared = 28, 6018 ClearRxOverflow = 29, 6019 RxAbort = 30, 6020 } 6021 6022 private enum RAC_RxEnableSource 6023 { 6024 Software0 = 0x0001, 6025 Software1 = 0x0002, 6026 Software2 = 0x0004, 6027 Software3 = 0x0008, 6028 Software4 = 0x0010, 6029 Software5 = 0x0020, 6030 Software6 = 0x0040, 6031 Software7 = 0x0080, 6032 ChannelBusy = 0x0100, 6033 TimingDetected = 0x0200, 6034 PreambleDetected = 0x0400, 6035 FrameDetected = 0x0800, 6036 DemodRxRequest = 0x1000, 6037 PRS = 0x2000, 6038 } 6039 6040 private enum RAC_SeqTimerCompareAction 6041 { 6042 Wrap = 0x0, 6043 Continue = 0x1, 6044 } 6045 6046 // Determines when the STIMERCOMP value is invalid. 6047 private enum RAC_SeqTimerCompareInvalidMode 6048 { 6049 Never = 0x0, 6050 StateChange = 0x1, 6051 CompareEvent = 0x2, 6052 StateChangeAndCompareEvent = 0x3, 6053 } 6054 6055 private enum RAC_InternalRxState 6056 { 6057 Idle = 0, 6058 PreambleAndSyncWord = 1, 6059 Frame = 2, 6060 } 6061 6062 private enum RAC_InternalTxState 6063 { 6064 Idle = 0, 6065 Tx = 1, 6066 } 6067 6068 #endregion 6069 6070 #region PROTIMER enums 6071 6072 private enum PROTIMER_PreCounterSource 6073 { 6074 None = 0x0, 6075 Clock = 0x1, 6076 Unused0 = 0x2, 6077 Unused1 = 0x3, 6078 } 6079 6080 private enum PROTIMER_BaseCounterSource 6081 { 6082 None = 0x0, 6083 PreCounterOverflow = 0x1, 6084 Unused0 = 0x2, 6085 Unused1 = 0x3, 6086 } 6087 6088 private enum PROTIMER_WrapCounterSource 6089 { 6090 None = 0x0, 6091 PreCounterOverflow = 0x1, 6092 BaseCounterOverflow = 0x2, 6093 Unused = 0x3, 6094 } 6095 6096 private enum PROTIMER_TimeoutCounterSource 6097 { 6098 Disabled = 0x0, 6099 PreCounterOverflow = 0x1, 6100 BaseCounterOverflow = 0x2, 6101 WrapCounterOverflow = 0x3, 6102 } 6103 6104 private enum PROTIMER_RepeatMode 6105 { 6106 Free = 0x0, 6107 OneShot = 0x1, 6108 } 6109 6110 private enum PROTIMER_CaptureCompareMode 6111 { 6112 Compare = 0x0, 6113 Capture = 0x1, 6114 } 6115 6116 private enum PROTIMER_CaptureInputSource 6117 { 6118 PRS = 0x0, 6119 TxDone = 0x1, 6120 RxDone = 0x2, 6121 TxOrRxDone = 0x3, 6122 DemodulatorFoundSyncWord0 = 0x4, 6123 DemodulatorFoundSyncWord1 = 0x5, 6124 DemodulatorFoundSyncWord0or1 = 0x6, 6125 ModulatorSyncWordSent = 0x7, 6126 RxAtEndOfFrameFromDemodulator = 0x8, 6127 ProRtcCaptureCompare0 = 0x9, 6128 ProRtcCaptureCompare1 = 0xA, 6129 } 6130 6131 private enum PROTIMER_CaptureInputEdge 6132 { 6133 Rising = 0x0, 6134 Falling = 0x1, 6135 Both = 0x2, 6136 Disabled = 0x3, 6137 } 6138 6139 private enum PROTIMER_OutputAction 6140 { 6141 Disabled = 0x0, 6142 Toggle = 0x1, 6143 Clear = 0x2, 6144 Set = 0x3, 6145 } 6146 6147 private enum PROTIMER_OverflowOutputActionCounter 6148 { 6149 PreCounter = 0x0, 6150 BaseCounter = 0x1, 6151 WrapCounrer = 0x2, 6152 Disabled = 0x3, 6153 } 6154 6155 public enum PROTIMER_Event 6156 { 6157 Disabled = 0, 6158 Always = 1, 6159 PreCounterOverflow = 2, 6160 BaseCounterOverflow = 3, 6161 WrapCounterOverflow = 4, 6162 TimeoutCounter0Underflow = 5, 6163 TimeoutCounter1Underflow = 6, 6164 TimeoutCounter0Match = 7, 6165 TimeoutCounter1Match = 8, 6166 CaptureCompareChannel0Event = 9, 6167 CaptureCompareChannel1Event = 10, 6168 CaptureCompareChannel2Event = 11, 6169 CaptureCompareChannel3Event = 12, 6170 CaptureCompareChannel4Event = 13, 6171 TxDone = 14, 6172 RxDone = 15, 6173 TxOrRxDone = 16, 6174 Syncword0Detected = 17, 6175 Syncword1Detected = 18, 6176 Syncword0Or1Detected = 19, 6177 ListenBeforeTalkSuccess = 20, 6178 ListenBeforeTalkRetry = 21, 6179 ListenBeforeTalkFailure = 22, 6180 AnyListenBeforeTalk = 23, 6181 ClearChannelAssessmentMeasurementCompleted = 24, 6182 ClearChannelAssessmentMeasurementCompletedChannelClear = 25, 6183 ClearChannelAssessmentMeasurementCompletedChannelBusy = 26, 6184 TimeoutCounter0MatchListenBeforeTalk = 27, 6185 InternalTrigger = 28, 6186 } 6187 6188 private enum PROTIMER_ListenBeforeTalkState 6189 { 6190 Idle = 0, 6191 Backoff = 1, 6192 CcaDelay = 2, 6193 } 6194 6195 private enum PROTIMER_TxRxRequestState 6196 { 6197 Idle, 6198 SetEvent1, 6199 Set, 6200 ClearEvent1, 6201 } 6202 6203 private enum PROTIMER_PreCountOverflowSourced : uint 6204 { 6205 BaseCounter = 0x0001, 6206 WrapCounter = 0x0002, 6207 TimeoutCounter0 = 0x0004, 6208 TimeoutCounter1 = 0x0008, 6209 CaptureCompareChannel0 = 0x0010, 6210 CaptureCompareChannel1 = 0x0020, 6211 CaptureCompareChannel2 = 0x0040, 6212 CaptureCompareChannel3 = 0x0080, 6213 CaptureCompareChannel4 = 0x0100, 6214 CaptureCompareChannel5 = 0x0200, 6215 CaptureCompareChannel6 = 0x0400, 6216 CaptureCompareChannel7 = 0x0800, 6217 } 6218 #endregion 6219 6220 #region BUFC enums 6221 public enum BUFC_SizeMode 6222 { 6223 Size64 = 0x0, 6224 Size128 = 0x1, 6225 Size256 = 0x2, 6226 Size512 = 0x3, 6227 Size1024 = 0x4, 6228 Size2048 = 0x5, 6229 Size4096 = 0x6, 6230 } 6231 6232 public enum BUFC_ThresholdMode 6233 { 6234 Larger = 0x0, 6235 LessOrEqual = 0x1, 6236 } 6237 #endregion 6238 6239 #region MODEM enums 6240 public enum MODEM_DemodulatorState 6241 { 6242 Off = 0x0, 6243 TimingSearch = 0x1, 6244 PreambleSearch = 0x2, 6245 FrameSearch = 0x3, 6246 RxFrame = 0x4, 6247 TimingSearchWithSlidingWindow = 0x5, 6248 } 6249 #endregion 6250 6251 #region CRC enums 6252 private enum CRC_CrcWidthMode 6253 { 6254 Width8 = 0x0, 6255 Width16 = 0x1, 6256 Width24 = 0x2, 6257 Width32 = 0x3, 6258 } 6259 #endregion 6260 6261 #region AGC enums 6262 private enum AGC_CcaMode 6263 { 6264 Mode1 = 0x0, 6265 Mode2 = 0x1, 6266 Mode3 = 0x2, 6267 Mode4 = 0x3, 6268 } 6269 6270 private enum AGC_CcaMode3Logic 6271 { 6272 Or = 0x0, 6273 And = 0x1, 6274 } 6275 6276 private enum AGC_RssiState 6277 { 6278 Idle = 0x0, 6279 Condition = 0x1, 6280 Period = 0x2, 6281 Command = 0x3, 6282 FameDetection = 0x4, 6283 } 6284 #endregion 6285 6286 #region Register enums 6287 private enum FrameControllerRegisters : long 6288 { 6289 IpVersion = 0x0000, 6290 Enable = 0x0004, 6291 Status = 0x0008, 6292 DynamicFrameLengthControl = 0x000C, 6293 MaximumFrameLength = 0x0010, 6294 AddressFilterControl = 0x0014, 6295 FrameControllerDataBuffer = 0x0018, 6296 WordCounter = 0x001C, 6297 WordCounterCompare0 = 0x0020, 6298 WordCounterCompare1 = 0x0024, 6299 WordCounterCompare2 = 0x0028, 6300 Command = 0x002C, 6301 WhitenerControl = 0x0030, 6302 WhitenerPolynomial = 0x0034, 6303 WhitenerInitialValue = 0x0038, 6304 ForwardErrorCorrectionControl = 0x003C, 6305 BlockDecodingRamAddress = 0x0040, 6306 ConvolutionalDecodingRamAddress = 0x0044, 6307 Control = 0x0048, 6308 RxControl = 0x004C, 6309 TrailingTxDataControl = 0x0050, 6310 TrailingRxData = 0x0054, 6311 SubFrameCounterValue = 0x0058, 6312 ConvolutionalCoderGeneratorPolynomials = 0x005C, 6313 PuncturingControl = 0x0060, 6314 PauseControl = 0x0064, 6315 InterruptFlags = 0x0068, 6316 InterruptEnable = 0x006C, 6317 OverTheAirNumberOfBitsCounter = 0x0070, 6318 BufferControl = 0x0078, 6319 SnifferControl = 0x0084, 6320 AuxiliarySnifferDataOutput = 0x0088, 6321 RawDataControl = 0x008C, 6322 RxRawData = 0x0090, 6323 RxPauseData = 0x0094, 6324 MostLikelyConvolutionalDecoderState = 0x0098, 6325 InterleaverElementValue = 0x009C, 6326 InterleaverWritePointer = 0x00A0, 6327 InterleaverReadPointer = 0x00A4, 6328 AutomaticClockGating = 0x00A8, 6329 AutomaticClockGatingClockStop = 0x00AC, 6330 SequencerInterruptFlags = 0x00B4, 6331 SequencerInterruptEnable = 0x00B8, 6332 WordCounterCompare3 = 0x00BC, 6333 BitOfInterestControl = 0x00C0, 6334 DynamicSuppLengthControl = 0x00C4, 6335 WordCounterCompare4 = 0x00C8, 6336 WordCounterCompare5 = 0x00CC, 6337 PacketCaptureBufferControl = 0x00D0, 6338 PacketCaptureBufferStatus = 0x00D4, 6339 PacketCaptureDataBuffer0 = 0x00D8, 6340 PacketCaptureDataBuffer1 = 0x00DC, 6341 PacketCaptureDataBuffer2 = 0x00E0, 6342 PacketCaptureDataBuffer3 = 0x00E4, 6343 PacketCaptureDataBuffer4 = 0x00E8, 6344 PacketCaptureDataBuffer5 = 0x00EC, 6345 PacketCaptureDataBuffer6 = 0x00F0, 6346 PacketCaptureDataBuffer7 = 0x00F4, 6347 PacketCaptureDataBuffer8 = 0x00F8, 6348 PacketCaptureDataBuffer9 = 0x00FC, 6349 PacketCaptureDataBuffer10 = 0x0100, 6350 PacketCaptureDataBuffer11 = 0x0104, 6351 FrameControlDescriptor0 = 0x0108, 6352 FrameControlDescriptor1 = 0x010C, 6353 FrameControlDescriptor2 = 0x0110, 6354 FrameControlDescriptor3 = 0x0114, 6355 InterleaverElementValue0 = 0x0140, 6356 InterleaverElementValue1 = 0x0144, 6357 InterleaverElementValue2 = 0x0148, 6358 InterleaverElementValue3 = 0x014C, 6359 InterleaverElementValue4 = 0x0150, 6360 InterleaverElementValue5 = 0x0154, 6361 InterleaverElementValue6 = 0x0158, 6362 InterleaverElementValue7 = 0x015C, 6363 InterleaverElementValue8 = 0x0160, 6364 InterleaverElementValue9 = 0x0164, 6365 InterleaverElementValue10 = 0x0168, 6366 InterleaverElementValue11 = 0x016C, 6367 InterleaverElementValue12 = 0x0170, 6368 InterleaverElementValue13 = 0x0174, 6369 InterleaverElementValue14 = 0x0178, 6370 InterleaverElementValue15 = 0x017C, 6371 AhbConfiguration = 0x0180, 6372 6373 // Set Registers 6374 IpVersion_Set = 0x1000, 6375 Enable_Set = 0x1004, 6376 Status_Set = 0x1008, 6377 DynamicFrameLengthControl_Set = 0x100C, 6378 MaximumFrameLength_Set = 0x1010, 6379 AddressFilterControl_Set = 0x1014, 6380 FrameControllerDataBuffer_Set = 0x1018, 6381 WordCounter_Set = 0x101C, 6382 WordCounterCompare0_Set = 0x1020, 6383 WordCounterCompare1_Set = 0x1024, 6384 WordCounterCompare2_Set = 0x1028, 6385 Command_Set = 0x102C, 6386 WhitenerControl_Set = 0x1030, 6387 WhitenerPolynomial_Set = 0x1034, 6388 WhitenerInitialValue_Set = 0x1038, 6389 ForwardErrorCorrectionControl_Set = 0x103C, 6390 BlockDecodingRamAddress_Set = 0x1040, 6391 ConvolutionalDecodingRamAddress_Set = 0x1044, 6392 Control_Set = 0x1048, 6393 RxControl_Set = 0x104C, 6394 TrailingTxDataControl_Set = 0x1050, 6395 TrailingRxData_Set = 0x1054, 6396 SubFrameCounterValue_Set = 0x1058, 6397 ConvolutionalCoderGeneratorPolynomials_Set = 0x105C, 6398 PuncturingControl_Set = 0x1060, 6399 PauseControl_Set = 0x1064, 6400 InterruptFlags_Set = 0x1068, 6401 InterruptEnable_Set = 0x106C, 6402 OverTheAirNumberOfBitsCounter_Set = 0x1070, 6403 BufferControl_Set = 0x1078, 6404 SnifferControl_Set = 0x1084, 6405 AuxiliarySnifferDataOutput_Set = 0x1088, 6406 RawDataControl_Set = 0x108C, 6407 RxRawData_Set = 0x1090, 6408 RxPauseData_Set = 0x1094, 6409 MostLikelyConvolutionalDecoderState_Set = 0x1098, 6410 InterleaverElementValue_Set = 0x109C, 6411 InterleaverWritePointer_Set = 0x10A0, 6412 InterleaverReadPointer_Set = 0x10A4, 6413 AutomaticClockGating_Set = 0x10A8, 6414 AutomaticClockGatingClockStop_Set = 0x10AC, 6415 SequencerInterruptFlags_Set = 0x10B4, 6416 SequencerInterruptEnable_Set = 0x10B8, 6417 WordCounterCompare3_Set = 0x10BC, 6418 BitOfInterestControl_Set = 0x10C0, 6419 DynamicSuppLengthControl_Set = 0x10C4, 6420 WordCounterCompare4_Set = 0x10C8, 6421 WordCounterCompare5_Set = 0x10CC, 6422 PacketCaptureBufferControl_Set = 0x10D0, 6423 PacketCaptureBufferStatus_Set = 0x10D4, 6424 PacketCaptureDataBuffer0_Set = 0x10D8, 6425 PacketCaptureDataBuffer1_Set = 0x10DC, 6426 PacketCaptureDataBuffer2_Set = 0x10E0, 6427 PacketCaptureDataBuffer3_Set = 0x10E4, 6428 PacketCaptureDataBuffer4_Set = 0x10E8, 6429 PacketCaptureDataBuffer5_Set = 0x10EC, 6430 PacketCaptureDataBuffer6_Set = 0x10F0, 6431 PacketCaptureDataBuffer7_Set = 0x10F4, 6432 PacketCaptureDataBuffer8_Set = 0x10F8, 6433 PacketCaptureDataBuffer9_Set = 0x10FC, 6434 PacketCaptureDataBuffer10_Set = 0x1100, 6435 PacketCaptureDataBuffer11_Set = 0x1104, 6436 FrameControlDescriptor0_Set = 0x1108, 6437 FrameControlDescriptor1_Set = 0x110C, 6438 FrameControlDescriptor2_Set = 0x1110, 6439 FrameControlDescriptor3_Set = 0x1114, 6440 InterleaverElementValue0_Set = 0x1140, 6441 InterleaverElementValue1_Set = 0x1144, 6442 InterleaverElementValue2_Set = 0x1148, 6443 InterleaverElementValue3_Set = 0x114C, 6444 InterleaverElementValue4_Set = 0x1150, 6445 InterleaverElementValue5_Set = 0x1154, 6446 InterleaverElementValue6_Set = 0x1158, 6447 InterleaverElementValue7_Set = 0x115C, 6448 InterleaverElementValue8_Set = 0x1160, 6449 InterleaverElementValue9_Set = 0x1164, 6450 InterleaverElementValue10_Set = 0x1168, 6451 InterleaverElementValue11_Set = 0x116C, 6452 InterleaverElementValue12_Set = 0x1170, 6453 InterleaverElementValue13_Set = 0x1174, 6454 InterleaverElementValue14_Set = 0x1178, 6455 InterleaverElementValue15_Set = 0x117C, 6456 AhbConfiguration_Set = 0x1180, 6457 6458 // Set Registers 6459 IpVersion_Clr = 0x2000, 6460 Enable_Clr = 0x2004, 6461 Status_Clr = 0x2008, 6462 DynamicFrameLengthControl_Clr = 0x200C, 6463 MaximumFrameLength_Clr = 0x2010, 6464 AddressFilterControl_Clr = 0x2014, 6465 FrameControllerDataBuffer_Clr = 0x2018, 6466 WordCounter_Clr = 0x201C, 6467 WordCounterCompare0_Clr = 0x2020, 6468 WordCounterCompare1_Clr = 0x2024, 6469 WordCounterCompare2_Clr = 0x2028, 6470 Command_Clr = 0x202C, 6471 WhitenerControl_Clr = 0x2030, 6472 WhitenerPolynomial_Clr = 0x2034, 6473 WhitenerInitialValue_Clr = 0x2038, 6474 ForwardErrorCorrectionControl_Clr = 0x203C, 6475 BlockDecodingRamAddress_Clr = 0x2040, 6476 ConvolutionalDecodingRamAddress_Clr = 0x2044, 6477 Control_Clr = 0x2048, 6478 RxControl_Clr = 0x204C, 6479 TrailingTxDataControl_Clr = 0x2050, 6480 TrailingRxData_Clr = 0x2054, 6481 SubFrameCounterValue_Clr = 0x2058, 6482 ConvolutionalCoderGeneratorPolynomials_Clr = 0x205C, 6483 PuncturingControl_Clr = 0x2060, 6484 PauseControl_Clr = 0x2064, 6485 InterruptFlags_Clr = 0x2068, 6486 InterruptEnable_Clr = 0x206C, 6487 OverTheAirNumberOfBitsCounter_Clr = 0x2070, 6488 BufferControl_Clr = 0x2078, 6489 SnifferControl_Clr = 0x2084, 6490 AuxiliarySnifferDataOutput_Clr = 0x2088, 6491 RawDataControl_Clr = 0x208C, 6492 RxRawData_Clr = 0x2090, 6493 RxPauseData_Clr = 0x2094, 6494 MostLikelyConvolutionalDecoderState_Clr = 0x2098, 6495 InterleaverElementValue_Clr = 0x209C, 6496 InterleaverWritePointer_Clr = 0x20A0, 6497 InterleaverReadPointer_Clr = 0x20A4, 6498 AutomaticClockGating_Clr = 0x20A8, 6499 AutomaticClockGatingClockStop_Clr = 0x20AC, 6500 SequencerInterruptFlags_Clr = 0x20B4, 6501 SequencerInterruptEnable_Clr = 0x20B8, 6502 WordCounterCompare3_Clr = 0x20BC, 6503 BitOfInterestControl_Clr = 0x20C0, 6504 DynamicSuppLengthControl_Clr = 0x20C4, 6505 WordCounterCompare4_Clr = 0x20C8, 6506 WordCounterCompare5_Clr = 0x20CC, 6507 PacketCaptureBufferControl_Clr = 0x20D0, 6508 PacketCaptureBufferStatus_Clr = 0x20D4, 6509 PacketCaptureDataBuffer0_Clr = 0x20D8, 6510 PacketCaptureDataBuffer1_Clr = 0x20DC, 6511 PacketCaptureDataBuffer2_Clr = 0x20E0, 6512 PacketCaptureDataBuffer3_Clr = 0x20E4, 6513 PacketCaptureDataBuffer4_Clr = 0x20E8, 6514 PacketCaptureDataBuffer5_Clr = 0x20EC, 6515 PacketCaptureDataBuffer6_Clr = 0x20F0, 6516 PacketCaptureDataBuffer7_Clr = 0x20F4, 6517 PacketCaptureDataBuffer8_Clr = 0x20F8, 6518 PacketCaptureDataBuffer9_Clr = 0x20FC, 6519 PacketCaptureDataBuffer10_Clr = 0x2100, 6520 PacketCaptureDataBuffer11_Clr = 0x2104, 6521 FrameControlDescriptor0_Clr = 0x2108, 6522 FrameControlDescriptor1_Clr = 0x210C, 6523 FrameControlDescriptor2_Clr = 0x2110, 6524 FrameControlDescriptor3_Clr = 0x2114, 6525 InterleaverElementValue0_Clr = 0x2140, 6526 InterleaverElementValue1_Clr = 0x2144, 6527 InterleaverElementValue2_Clr = 0x2148, 6528 InterleaverElementValue3_Clr = 0x214C, 6529 InterleaverElementValue4_Clr = 0x2150, 6530 InterleaverElementValue5_Clr = 0x2154, 6531 InterleaverElementValue6_Clr = 0x2158, 6532 InterleaverElementValue7_Clr = 0x215C, 6533 InterleaverElementValue8_Clr = 0x2160, 6534 InterleaverElementValue9_Clr = 0x2164, 6535 InterleaverElementValue10_Clr = 0x2168, 6536 InterleaverElementValue11_Clr = 0x216C, 6537 InterleaverElementValue12_Clr = 0x2170, 6538 InterleaverElementValue13_Clr = 0x2174, 6539 InterleaverElementValue14_Clr = 0x2178, 6540 InterleaverElementValue15_Clr = 0x217C, 6541 AhbConfiguration_Clr = 0x2180, 6542 6543 // Toggle Registers 6544 IpVersion_Tgl = 0x3000, 6545 Enable_Tgl = 0x3004, 6546 Status_Tgl = 0x3008, 6547 DynamicFrameLengthControl_Tgl = 0x300C, 6548 MaximumFrameLength_Tgl = 0x3010, 6549 AddressFilterControl_Tgl = 0x3014, 6550 FrameControllerDataBuffer_Tgl = 0x3018, 6551 WordCounter_Tgl = 0x301C, 6552 WordCounterCompare0_Tgl = 0x3020, 6553 WordCounterCompare1_Tgl = 0x3024, 6554 WordCounterCompare2_Tgl = 0x3028, 6555 Command_Tgl = 0x302C, 6556 WhitenerControl_Tgl = 0x3030, 6557 WhitenerPolynomial_Tgl = 0x3034, 6558 WhitenerInitialValue_Tgl = 0x3038, 6559 ForwardErrorCorrectionControl_Tgl = 0x303C, 6560 BlockDecodingRamAddress_Tgl = 0x3040, 6561 ConvolutionalDecodingRamAddress_Tgl = 0x3044, 6562 Control_Tgl = 0x3048, 6563 RxControl_Tgl = 0x304C, 6564 TrailingTxDataControl_Tgl = 0x3050, 6565 TrailingRxData_Tgl = 0x3054, 6566 SubFrameCounterValue_Tgl = 0x3058, 6567 ConvolutionalCoderGeneratorPolynomials_Tgl = 0x305C, 6568 PuncturingControl_Tgl = 0x3060, 6569 PauseControl_Tgl = 0x3064, 6570 InterruptFlags_Tgl = 0x3068, 6571 InterruptEnable_Tgl = 0x306C, 6572 OverTheAirNumberOfBitsCounter_Tgl = 0x3070, 6573 BufferControl_Tgl = 0x3078, 6574 SnifferControl_Tgl = 0x3084, 6575 AuxiliarySnifferDataOutput_Tgl = 0x3088, 6576 RawDataControl_Tgl = 0x308C, 6577 RxRawData_Tgl = 0x3090, 6578 RxPauseData_Tgl = 0x3094, 6579 MostLikelyConvolutionalDecoderState_Tgl = 0x3098, 6580 InterleaverElementValue_Tgl = 0x309C, 6581 InterleaverWritePointer_Tgl = 0x30A0, 6582 InterleaverReadPointer_Tgl = 0x30A4, 6583 AutomaticClockGating_Tgl = 0x30A8, 6584 AutomaticClockGatingClockStop_Tgl = 0x30AC, 6585 SequencerInterruptFlags_Tgl = 0x30B4, 6586 SequencerInterruptEnable_Tgl = 0x30B8, 6587 WordCounterCompare3_Tgl = 0x30BC, 6588 BitOfInterestControl_Tgl = 0x30C0, 6589 DynamicSuppLengthControl_Tgl = 0x30C4, 6590 WordCounterCompare4_Tgl = 0x30C8, 6591 WordCounterCompare5_Tgl = 0x30CC, 6592 PacketCaptureBufferControl_Tgl = 0x30D0, 6593 PacketCaptureBufferStatus_Tgl = 0x30D4, 6594 PacketCaptureDataBuffer0_Tgl = 0x30D8, 6595 PacketCaptureDataBuffer1_Tgl = 0x30DC, 6596 PacketCaptureDataBuffer2_Tgl = 0x30E0, 6597 PacketCaptureDataBuffer3_Tgl = 0x30E4, 6598 PacketCaptureDataBuffer4_Tgl = 0x30E8, 6599 PacketCaptureDataBuffer5_Tgl = 0x30EC, 6600 PacketCaptureDataBuffer6_Tgl = 0x30F0, 6601 PacketCaptureDataBuffer7_Tgl = 0x30F4, 6602 PacketCaptureDataBuffer8_Tgl = 0x30F8, 6603 PacketCaptureDataBuffer9_Tgl = 0x30FC, 6604 PacketCaptureDataBuffer10_Tgl = 0x3100, 6605 PacketCaptureDataBuffer11_Tgl = 0x3104, 6606 FrameControlDescriptor0_Tgl = 0x3108, 6607 FrameControlDescriptor1_Tgl = 0x310C, 6608 FrameControlDescriptor2_Tgl = 0x3110, 6609 FrameControlDescriptor3_Tgl = 0x3114, 6610 InterleaverElementValue0_Tgl = 0x3140, 6611 InterleaverElementValue1_Tgl = 0x3144, 6612 InterleaverElementValue2_Tgl = 0x3148, 6613 InterleaverElementValue3_Tgl = 0x314C, 6614 InterleaverElementValue4_Tgl = 0x3150, 6615 InterleaverElementValue5_Tgl = 0x3154, 6616 InterleaverElementValue6_Tgl = 0x3158, 6617 InterleaverElementValue7_Tgl = 0x315C, 6618 InterleaverElementValue8_Tgl = 0x3160, 6619 InterleaverElementValue9_Tgl = 0x3164, 6620 InterleaverElementValue10_Tgl = 0x3168, 6621 InterleaverElementValue11_Tgl = 0x316C, 6622 InterleaverElementValue12_Tgl = 0x3170, 6623 InterleaverElementValue13_Tgl = 0x3174, 6624 InterleaverElementValue14_Tgl = 0x3178, 6625 InterleaverElementValue15_Tgl = 0x317C, 6626 AhbConfiguration_Tgl = 0x3180, 6627 } 6628 6629 private enum BufferControllerRegisters : long 6630 { 6631 IpVersion = 0x0000, 6632 Enable = 0x0004, 6633 LowPowerMode = 0x0008, 6634 Buffer0Control = 0x000C, 6635 Buffer0Address = 0x0010, 6636 Buffer0WriteOffset = 0x0014, 6637 Buffer0ReadOffset = 0x0018, 6638 Buffer0WriteStart = 0x001C, 6639 Buffer0ReadData = 0x0020, 6640 Buffer0WriteData = 0x0024, 6641 Buffer0XorWrite = 0x0028, 6642 Buffer0Status = 0x002C, 6643 Buffer0ThresholdControl = 0x0030, 6644 Buffer0Command = 0x0034, 6645 Buffer0FifoAsync = 0x0038, 6646 Buffer0ReadData32 = 0x003C, 6647 Buffer0WriteData32 = 0x0040, 6648 Buffer0XorWrite32 = 0x0044, 6649 Buffer1Control = 0x004C, 6650 Buffer1Address = 0x0050, 6651 Buffer1WriteOffset = 0x0054, 6652 Buffer1ReadOffset = 0x0058, 6653 Buffer1WriteStart = 0x005C, 6654 Buffer1ReadData = 0x0060, 6655 Buffer1WriteData = 0x0064, 6656 Buffer1XorWrite = 0x0068, 6657 Buffer1Status = 0x006C, 6658 Buffer1ThresholdControl = 0x0070, 6659 Buffer1Command = 0x0074, 6660 Buffer1FifoAsync = 0x0078, 6661 Buffer1ReadData32 = 0x007C, 6662 Buffer1WriteData32 = 0x0080, 6663 Buffer1XorWrite32 = 0X0084, 6664 Buffer2Control = 0x008C, 6665 Buffer2Address = 0x0090, 6666 Buffer2WriteOffset = 0x0094, 6667 Buffer2ReadOffset = 0x0098, 6668 Buffer2WriteStart = 0x009C, 6669 Buffer2ReadData = 0x00A0, 6670 Buffer2WriteData = 0x00A4, 6671 Buffer2XorWrite = 0x00A8, 6672 Buffer2Status = 0x00AC, 6673 Buffer2ThresholdControl = 0x00B0, 6674 Buffer2Command = 0x00B4, 6675 Buffer2FifoAsync = 0x00B8, 6676 Buffer2ReadData32 = 0x00BC, 6677 Buffer2WriteData32 = 0x00C0, 6678 Buffer2XorWrite32 = 0x00C4, 6679 Buffer3Control = 0x00CC, 6680 Buffer3Address = 0x00D0, 6681 Buffer3WriteOffset = 0x00D4, 6682 Buffer3ReadOffset = 0x00D8, 6683 Buffer3WriteStart = 0x00DC, 6684 Buffer3ReadData = 0x00E0, 6685 Buffer3WriteData = 0x00E4, 6686 Buffer3XorWrite = 0x00E8, 6687 Buffer3Status = 0x00EC, 6688 Buffer3ThresholdControl = 0x00F0, 6689 Buffer3Command = 0x00F4, 6690 Buffer3FifoAsync = 0x00F8, 6691 Buffer3ReadData32 = 0x00FC, 6692 Buffer3WriteData32 = 0x0100, 6693 Buffer3XorWrite32 = 0x0104, 6694 InterruptFlags = 0x0114, 6695 InterruptEnable = 0x0118, 6696 SequencerInterruptFlags = 0x011C, 6697 SequencerInterruptEnable = 0x0120, 6698 AhbConfiguration = 0x0124, 6699 6700 // Set registers 6701 IpVersion_Set = 0x1000, 6702 Enable_Set = 0x1004, 6703 LowPowerMode_Set = 0x1008, 6704 Buffer0Control_Set = 0x100C, 6705 Buffer0Address_Set = 0x1010, 6706 Buffer0WriteOffset_Set = 0x1014, 6707 Buffer0ReadOffset_Set = 0x1018, 6708 Buffer0WriteStart_Set = 0x101C, 6709 Buffer0ReadData_Set = 0x1020, 6710 Buffer0WriteData_Set = 0x1024, 6711 Buffer0XorWrite_Set = 0x1028, 6712 Buffer0Status_Set = 0x102C, 6713 Buffer0ThresholdControl_Set = 0x1030, 6714 Buffer0Command_Set = 0x1034, 6715 Buffer0FifoAsync_Set = 0x1038, 6716 Buffer0ReadData32_Set = 0x103C, 6717 Buffer0WriteData32_Set = 0x1040, 6718 Buffer0XorWrite32_Set = 0x1044, 6719 Buffer1Control_Set = 0x104C, 6720 Buffer1Address_Set = 0x1050, 6721 Buffer1WriteOffset_Set = 0x1054, 6722 Buffer1ReadOffset_Set = 0x1058, 6723 Buffer1WriteStart_Set = 0x105C, 6724 Buffer1ReadData_Set = 0x1060, 6725 Buffer1WriteData_Set = 0x1064, 6726 Buffer1XorWrite_Set = 0x1068, 6727 Buffer1Status_Set = 0x106C, 6728 Buffer1ThresholdControl_Set = 0x1070, 6729 Buffer1Command_Set = 0x1074, 6730 Buffer1FifoAsync_Set = 0x1078, 6731 Buffer1ReadData32_Set = 0x107C, 6732 Buffer1WriteData32_Set = 0x1080, 6733 Buffer1XorWrite32_Set = 0X1084, 6734 Buffer2Control_Set = 0x108C, 6735 Buffer2Address_Set = 0x1090, 6736 Buffer2WriteOffset_Set = 0x1094, 6737 Buffer2ReadOffset_Set = 0x1098, 6738 Buffer2WriteStart_Set = 0x109C, 6739 Buffer2ReadData_Set = 0x10A0, 6740 Buffer2WriteData_Set = 0x10A4, 6741 Buffer2XorWrite_Set = 0x10A8, 6742 Buffer2Status_Set = 0x10AC, 6743 Buffer2ThresholdControl_Set = 0x10B0, 6744 Buffer2Command_Set = 0x10B4, 6745 Buffer2FifoAsync_Set = 0x10B8, 6746 Buffer2ReadData32_Set = 0x10BC, 6747 Buffer2WriteData32_Set = 0x10C0, 6748 Buffer2XorWrite32_Set = 0x10C4, 6749 Buffer3Control_Set = 0x10CC, 6750 Buffer3Address_Set = 0x10D0, 6751 Buffer3WriteOffset_Set = 0x10D4, 6752 Buffer3ReadOffset_Set = 0x10D8, 6753 Buffer3WriteStart_Set = 0x10DC, 6754 Buffer3ReadData_Set = 0x10E0, 6755 Buffer3WriteData_Set = 0x10E4, 6756 Buffer3XorWrite_Set = 0x10E8, 6757 Buffer3Status_Set = 0x10EC, 6758 Buffer3ThresholdControl_Set = 0x10F0, 6759 Buffer3Command_Set = 0x10F4, 6760 Buffer3FifoAsync_Set = 0x10F8, 6761 Buffer3ReadData32_Set = 0x10FC, 6762 Buffer3WriteData32_Set = 0x1100, 6763 Buffer3XorWrite32_Set = 0x1104, 6764 InterruptFlags_Set = 0x1114, 6765 InterruptEnable_Set = 0x1118, 6766 SequencerInterruptFlags_Set = 0x111C, 6767 SequencerInterruptEnable_Set = 0x1120, 6768 AhbConfiguration_Set = 0x1124, 6769 6770 // Clear registers 6771 IpVersion_Clr = 0x2000, 6772 Enable_Clr = 0x2004, 6773 LowPowerMode_Clr = 0x2008, 6774 Buffer0Control_Clr = 0x200C, 6775 Buffer0Address_Clr = 0x2010, 6776 Buffer0WriteOffset_Clr = 0x2014, 6777 Buffer0ReadOffset_Clr = 0x2018, 6778 Buffer0WriteStart_Clr = 0x201C, 6779 Buffer0ReadData_Clr = 0x2020, 6780 Buffer0WriteData_Clr = 0x2024, 6781 Buffer0XorWrite_Clr = 0x2028, 6782 Buffer0Status_Clr = 0x202C, 6783 Buffer0ThresholdControl_Clr = 0x2030, 6784 Buffer0Command_Clr = 0x2034, 6785 Buffer0FifoAsync_Clr = 0x2038, 6786 Buffer0ReadData32_Clr = 0x203C, 6787 Buffer0WriteData32_Clr = 0x2040, 6788 Buffer0XorWrite32_Clr = 0x2044, 6789 Buffer1Control_Clr = 0x204C, 6790 Buffer1Address_Clr = 0x2050, 6791 Buffer1WriteOffset_Clr = 0x2054, 6792 Buffer1ReadOffset_Clr = 0x2058, 6793 Buffer1WriteStart_Clr = 0x205C, 6794 Buffer1ReadData_Clr = 0x2060, 6795 Buffer1WriteData_Clr = 0x2064, 6796 Buffer1XorWrite_Clr = 0x2068, 6797 Buffer1Status_Clr = 0x206C, 6798 Buffer1ThresholdControl_Clr = 0x2070, 6799 Buffer1Command_Clr = 0x2074, 6800 Buffer1FifoAsync_Clr = 0x2078, 6801 Buffer1ReadData32_Clr = 0x207C, 6802 Buffer1WriteData32_Clr = 0x2080, 6803 Buffer1XorWrite32_Clr = 0X2084, 6804 Buffer2Control_Clr = 0x208C, 6805 Buffer2Address_Clr = 0x2090, 6806 Buffer2WriteOffset_Clr = 0x2094, 6807 Buffer2ReadOffset_Clr = 0x2098, 6808 Buffer2WriteStart_Clr = 0x209C, 6809 Buffer2ReadData_Clr = 0x20A0, 6810 Buffer2WriteData_Clr = 0x20A4, 6811 Buffer2XorWrite_Clr = 0x20A8, 6812 Buffer2Status_Clr = 0x20AC, 6813 Buffer2ThresholdControl_Clr = 0x20B0, 6814 Buffer2Command_Clr = 0x20B4, 6815 Buffer2FifoAsync_Clr = 0x20B8, 6816 Buffer2ReadData32_Clr = 0x20BC, 6817 Buffer2WriteData32_Clr = 0x20C0, 6818 Buffer2XorWrite32_Clr = 0x20C4, 6819 Buffer3Control_Clr = 0x20CC, 6820 Buffer3Address_Clr = 0x20D0, 6821 Buffer3WriteOffset_Clr = 0x20D4, 6822 Buffer3ReadOffset_Clr = 0x20D8, 6823 Buffer3WriteStart_Clr = 0x20DC, 6824 Buffer3ReadData_Clr = 0x20E0, 6825 Buffer3WriteData_Clr = 0x20E4, 6826 Buffer3XorWrite_Clr = 0x20E8, 6827 Buffer3Status_Clr = 0x20EC, 6828 Buffer3ThresholdControl_Clr = 0x20F0, 6829 Buffer3Command_Clr = 0x20F4, 6830 Buffer3FifoAsync_Clr = 0x20F8, 6831 Buffer3ReadData32_Clr = 0x20FC, 6832 Buffer3WriteData32_Clr = 0x2100, 6833 Buffer3XorWrite32_Clr = 0x2104, 6834 InterruptFlags_Clr = 0x2114, 6835 InterruptEnable_Clr = 0x2118, 6836 SequencerInterruptFlags_Clr = 0x211C, 6837 SequencerInterruptEnable_Clr = 0x2120, 6838 AhbConfiguration_Clr = 0x2124, 6839 6840 // Toggle registers 6841 IpVersion_Tgl = 0x3000, 6842 Enable_Tgl = 0x3004, 6843 LowPowerMode_Tgl = 0x3008, 6844 Buffer0Control_Tgl = 0x300C, 6845 Buffer0Address_Tgl = 0x3010, 6846 Buffer0WriteOffset_Tgl = 0x3014, 6847 Buffer0ReadOffset_Tgl = 0x3018, 6848 Buffer0WriteStart_Tgl = 0x301C, 6849 Buffer0ReadData_Tgl = 0x3020, 6850 Buffer0WriteData_Tgl = 0x3024, 6851 Buffer0XorWrite_Tgl = 0x3028, 6852 Buffer0Status_Tgl = 0x302C, 6853 Buffer0ThresholdControl_Tgl = 0x3030, 6854 Buffer0Command_Tgl = 0x3034, 6855 Buffer0FifoAsync_Tgl = 0x3038, 6856 Buffer0ReadData32_Tgl = 0x303C, 6857 Buffer0WriteData32_Tgl = 0x3040, 6858 Buffer0XorWrite32_Tgl = 0x3044, 6859 Buffer1Control_Tgl = 0x304C, 6860 Buffer1Address_Tgl = 0x3050, 6861 Buffer1WriteOffset_Tgl = 0x3054, 6862 Buffer1ReadOffset_Tgl = 0x3058, 6863 Buffer1WriteStart_Tgl = 0x305C, 6864 Buffer1ReadData_Tgl = 0x3060, 6865 Buffer1WriteData_Tgl = 0x3064, 6866 Buffer1XorWrite_Tgl = 0x3068, 6867 Buffer1Status_Tgl = 0x306C, 6868 Buffer1ThresholdControl_Tgl = 0x3070, 6869 Buffer1Command_Tgl = 0x3074, 6870 Buffer1FifoAsync_Tgl = 0x3078, 6871 Buffer1ReadData32_Tgl = 0x307C, 6872 Buffer1WriteData32_Tgl = 0x3080, 6873 Buffer1XorWrite32_Tgl = 0X3084, 6874 Buffer2Control_Tgl = 0x308C, 6875 Buffer2Address_Tgl = 0x3090, 6876 Buffer2WriteOffset_Tgl = 0x3094, 6877 Buffer2ReadOffset_Tgl = 0x3098, 6878 Buffer2WriteStart_Tgl = 0x309C, 6879 Buffer2ReadData_Tgl = 0x30A0, 6880 Buffer2WriteData_Tgl = 0x30A4, 6881 Buffer2XorWrite_Tgl = 0x30A8, 6882 Buffer2Status_Tgl = 0x30AC, 6883 Buffer2ThresholdControl_Tgl = 0x30B0, 6884 Buffer2Command_Tgl = 0x30B4, 6885 Buffer2FifoAsync_Tgl = 0x30B8, 6886 Buffer2ReadData32_Tgl = 0x30BC, 6887 Buffer2WriteData32_Tgl = 0x30C0, 6888 Buffer2XorWrite32_Tgl = 0x30C4, 6889 Buffer3Control_Tgl = 0x30CC, 6890 Buffer3Address_Tgl = 0x30D0, 6891 Buffer3WriteOffset_Tgl = 0x30D4, 6892 Buffer3ReadOffset_Tgl = 0x30D8, 6893 Buffer3WriteStart_Tgl = 0x30DC, 6894 Buffer3ReadData_Tgl = 0x30E0, 6895 Buffer3WriteData_Tgl = 0x30E4, 6896 Buffer3XorWrite_Tgl = 0x30E8, 6897 Buffer3Status_Tgl = 0x30EC, 6898 Buffer3ThresholdControl_Tgl = 0x30F0, 6899 Buffer3Command_Tgl = 0x30F4, 6900 Buffer3FifoAsync_Tgl = 0x30F8, 6901 Buffer3ReadData32_Tgl = 0x30FC, 6902 Buffer3WriteData32_Tgl = 0x3100, 6903 Buffer3XorWrite32_Tgl = 0x3104, 6904 InterruptFlags_Tgl = 0x3114, 6905 InterruptEnable_Tgl = 0x3118, 6906 SequencerInterruptFlags_Tgl = 0x311C, 6907 SequencerInterruptEnable_Tgl = 0x3120, 6908 AhbConfiguration_Tgl = 0x3124, 6909 } 6910 6911 private enum ModulatorAndDemodulatorRegisters : long 6912 { 6913 IpVersion = 0x0000, 6914 Enable = 0x0004, 6915 InterruptFlags = 0x0008, 6916 InterruptEnable = 0x000C, 6917 SequencerInterruptFlags = 0x0010, 6918 SequencerInterruptEnable = 0x0014, 6919 Status = 0x0018, 6920 Status2 = 0x001C, 6921 Status3 = 0x0020, 6922 Status4 = 0x0024, 6923 Status5 = 0x0028, 6924 Status6 = 0x002C, 6925 Status7 = 0x0030, 6926 TimingDetectionStatus = 0x0034, 6927 DemodulatorFSMStatus = 0x0038, 6928 FrequencyOffsetEstimate = 0x003C, 6929 AutomaticFrequencyControlAdjustmentRx = 0x0040, 6930 AutomaticFrequencyControldAjustmentTx = 0x0044, 6931 AnalogMixerControl = 0x0048, 6932 Control0 = 0x004C, 6933 Control1 = 0x0050, 6934 Control2 = 0x0054, 6935 Control3 = 0x0058, 6936 Control4 = 0x005C, 6937 Control5 = 0x0060, 6938 Control6 = 0x0064, 6939 TxBaudrate = 0x0068, 6940 RxBaudrate = 0x006C, 6941 ChannelFilter = 0x0070, 6942 Preamble = 0x0074, 6943 SyncWord0 = 0x0078, 6944 SyncWord1 = 0x007C, 6945 Timing = 0x0080, 6946 DirectSequenceSpreadSpectrumSymbol0 = 0x0084, 6947 ModulationIndex = 0x0088, 6948 AutomaticFrequencyControl = 0x008C, 6949 AutomaticFrequencyControlAdjustmentLimit = 0x0090, 6950 ShapingCoefficients0 = 0x0094, 6951 ShapingCoefficients1 = 0x0098, 6952 ShapingCoefficients2 = 0x009C, 6953 ShapingCoefficients3 = 0x00A0, 6954 ShapingCoefficients4 = 0x00A4, 6955 ShapingCoefficients5 = 0x00A8, 6956 ShapingCoefficients6 = 0x00AC, 6957 ShapingCoefficients7 = 0x00B0, 6958 ShapingCoefficients8 = 0x00B4, 6959 ShapingCoefficients9 = 0x00B8, 6960 ShapingCoefficients10 = 0x00BC, 6961 ShapingCoefficients11 = 0x00C0, 6962 ShapingCoefficients12 = 0x00C4, 6963 ShapingCoefficients13 = 0x00C8, 6964 ShapingCoefficients14 = 0x00CC, 6965 ShapingCoefficients15 = 0x00D0, 6966 RampingControl = 0x00D8, 6967 RampingLevels = 0x00DC, 6968 AnalogRampingControl = 0x00E0, 6969 DirectCurrentOffsetCompensationFilterSettings = 0x0110, 6970 DirectCurrentOffsetCompensationFilterInitialization = 0x0114, 6971 DirectCurrentOffsetEstimatedValue = 0x0118, 6972 SampleRateConverterRatioValuesAndChannelFilter = 0x011C, 6973 InternalAutomaticFrequencyControl = 0x0120, 6974 DetectionOfSignalArrivalThreshold0 = 0x0124, 6975 DetectionOfSignalArrivalThreshold1 = 0x0128, 6976 DetectionOfSignalArrivalThreshold2 = 0x012C, 6977 DetectionOfSignalArrivalThreshold3 = 0x0130, 6978 DetectionOfSignalArrivalThreshold4 = 0x0134, 6979 DetectionOfSignalArrivalMode = 0x0138, 6980 DigitalMixerControl = 0x013C, 6981 ViterbiDemodulator = 0x0140, 6982 ViterbiDemodulatorCorrelationConfiguration0 = 0x0144, 6983 ViterbiDemodulatorCorrelationConfiguration1 = 0x0148, 6984 ViterbiDemodulatorTrackingLoop = 0x014C, 6985 ViterbiBleTimingStampControl = 0x0150, 6986 BaudrateEstimate = 0x0154, 6987 AutomaticClockGating = 0x0158, 6988 AutomaticClockGatingClockStop = 0x015C, 6989 PhaseOffsetEstimate = 0x0160, 6990 DirectModeControl = 0x0164, 6991 BleLongRange = 0x0168, 6992 BleLongRangeSet1 = 0x016C, 6993 BleLongRangeSet2 = 0x0170, 6994 BleLongRangeSet3 = 0x0174, 6995 BleLongRangeSet4 = 0x0178, 6996 BleLongRangeSet5 = 0x017C, 6997 BleLongRangeSet6 = 0x0180, 6998 BleLongRangeFrameControllerInterface = 0x0184, 6999 CoherentDemodulatorSignals0 = 0x0188, 7000 CoherentDemodulatorSignals1 = 0x018C, 7001 CoherentDemodulatorSignals2 = 0x0190, 7002 CoherentDemodulatorSignals3 = 0x0194, 7003 Command = 0x0198, 7004 SyncWordProperties = 0x01A4, 7005 DigitalGainControl = 0x01A8, 7006 PeripheralReflexSystemControl = 0x01AC, 7007 PowerAmplifierDebug = 0x01B0, 7008 RealTimeCostFunctionEngineControl = 0x01B4, 7009 EarlyTimeStampControl = 0x01B8, 7010 EarlyTimeStampTiming = 0x01BC, 7011 AntennaSwitchControl = 0x01C0, 7012 AntennaSwitchControl1 = 0x01C4, 7013 AntennaSwitchStart = 0x01C8, 7014 AntennaSwitchEnd = 0x01CC, 7015 TrecsPreamblePattern = 0x01D0, 7016 TrecsPreambleDetectionControl = 0x01D4, 7017 TrecsConfiguration = 0x01D8, 7018 ConfigureAntennaPattern = 0x01DC, 7019 ConcurrentMode = 0x01E0, 7020 ChannelFilterCoeSet0Group0 = 0x01E4, 7021 ChannelFilterCoeSet0Group1 = 0x01E8, 7022 ChannelFilterCoeSet0Group2 = 0x01EC, 7023 ChannelFilterCoeSet0Group3 = 0x01F0, 7024 ChannelFilterCoeSet0Group4 = 0x01F4, 7025 ChannelFilterCoeSet0Group5 = 0x01F8, 7026 ChannelFilterCoeSet0Group6 = 0x01FC, 7027 ChannelFilterCoeSet1Group0 = 0x0200, 7028 ChannelFilterCoeSet1Group1 = 0x0204, 7029 ChannelFilterCoeSet1Group2 = 0x0208, 7030 ChannelFilterCoeSet1Group3 = 0x020C, 7031 ChannelFilterCoeSet1Group4 = 0x0210, 7032 ChannelFilterCoeSet1Group5 = 0x0214, 7033 ChannelFilterCoeSet1Group6 = 0x0218, 7034 ChannelFilterControl = 0x021C, 7035 ChannelFilterLatencyControl = 0x0220, 7036 FrameSchTimeoutLength = 0x0224, 7037 PreambleFilterCoefficients = 0x0228, 7038 CollisionRestartControl = 0x022C, 7039 PreambleSenseMode = 0x0230, 7040 PreambleSenseModeExtended = 0x0234, 7041 SignalQualityIndicator = 0x0238, 7042 AntennaDiversityModeControl = 0x023C, 7043 PhaseDemodulatorFwMode = 0x0240, 7044 PhaseDemodulatorAntennaDiversity = 0x0244, 7045 PhaseDemodulatorAntennaDiversityDecision = 0x0248, 7046 PhaseDemodulatorControl = 0x024C, 7047 SignalIdentifierControl0 = 0x0250, 7048 SignalIdentifierControl1 = 0x0254, 7049 SignalIdentifierStatus = 0x0258, 7050 ConfigureAntennaPatternExtended = 0x025C, 7051 SignalIdentifierControl2 = 0x0264, 7052 ChannelFilterSwitchTime = 0x0268, 7053 IrCalibrationControl = 0x0270, 7054 IrCalCoefficientValues = 0x0274, 7055 IrCalCoefficientWrPerAntenna0 = 0x0278, 7056 IrCalCoefficientWrPerAntenna1 = 0x027C, 7057 AdControl1 = 0x0280, 7058 AdControl2 = 0x0284, 7059 AdQual0 = 0x0288, 7060 AdQual1 = 0x028C, 7061 AdQual2 = 0x0290, 7062 AdQual3 = 0x0294, 7063 AdQual4 = 0x0298, 7064 AdQual5 = 0x029C, 7065 AdQual6 = 0x02A0, 7066 AdQual7 = 0x02A4, 7067 AdQual8 = 0x02A8, 7068 AdQual9 = 0x02AC, 7069 AdQual10 = 0x02B0, 7070 AdFsm0 = 0x02B4, 7071 AdFsm1 = 0x02B8, 7072 AdFsm2 = 0x02BC, 7073 AdFsm3 = 0x02C0, 7074 AdFsm4 = 0x02C4, 7075 AdFsm5 = 0x02C8, 7076 AdFsm6 = 0x02CC, 7077 AdFsm7 = 0x02D0, 7078 AdFsm8 = 0x02D4, 7079 AdFsm9 = 0x02D8, 7080 AdFsm10 = 0x02DC, 7081 AdFsm11 = 0x02E0, 7082 AdFsm12 = 0x02E4, 7083 AdFsm13 = 0x02E8, 7084 AdFsm14 = 0x02EC, 7085 AdFsm15 = 0x02F0, 7086 AdFsm16 = 0x02F4, 7087 AdFsm17 = 0x02F8, 7088 AdFsm18 = 0x02FC, 7089 AdFsm19 = 0x0300, 7090 AdFsm20 = 0x0304, 7091 AdFsm21 = 0x0308, 7092 AdFsm22 = 0x030C, 7093 AdFsm23 = 0x0310, 7094 AdFsm24 = 0x0314, 7095 AdFsm25 = 0x0318, 7096 AdFsm26 = 0x031C, 7097 AdFsm27 = 0x0320, 7098 AdFsm28 = 0x0324, 7099 AdFsm29 = 0x0328, 7100 AdFsm30 = 0x032C, 7101 AdPc1 = 0x0330, 7102 AdPc2 = 0x0334, 7103 AdPc3 = 0x0338, 7104 AdPc4 = 0x033C, 7105 AdPc5 = 0x0340, 7106 AdPc6 = 0x0344, 7107 AdPc7 = 0x0348, 7108 AdPc8 = 0x034C, 7109 AdPc9 = 0x0350, 7110 AdPc10 = 0x0354, 7111 HadmControl0 = 0x03B0, 7112 HadmControl1 = 0x03B4, 7113 HadmStatus0 = 0x03B8, 7114 HadmStatus1 = 0x03BC, 7115 HadmStatus2 = 0x03C0, 7116 HadmStatus3 = 0x03C4, 7117 HadmStatus4 = 0x03C8, 7118 HadmStatus5 = 0x03CC, 7119 HadmStatus6 = 0x03D0, 7120 Src2NcoControl = 0x03E0, 7121 Spare = 0x0400, 7122 7123 // Set registers 7124 IpVersion_Set = 0x1000, 7125 Enable_Set = 0x1004, 7126 InterruptFlags_Set = 0x1008, 7127 InterruptEnable_Set = 0x100C, 7128 SequencerInterruptFlags_Set = 0x1010, 7129 SequencerInterruptEnable_Set = 0x1014, 7130 Status_Set = 0x1018, 7131 Status2_Set = 0x101C, 7132 Status3_Set = 0x1020, 7133 Status4_Set = 0x1024, 7134 Status5_Set = 0x1028, 7135 Status6_Set = 0x102C, 7136 Status7_Set = 0x1030, 7137 TimingDetectionStatus_Set = 0x1034, 7138 DemodulatorFSMStatus_Set = 0x1038, 7139 FrequencyOffsetEstimate_Set = 0x103C, 7140 AutomaticFrequencyControlAdjustmentRx_Set = 0x1040, 7141 AutomaticFrequencyControldAjustmentTx_Set = 0x1044, 7142 AnalogMixerControl_Set = 0x1048, 7143 Control0_Set = 0x104C, 7144 Control1_Set = 0x1050, 7145 Control2_Set = 0x1054, 7146 Control3_Set = 0x1058, 7147 Control4_Set = 0x105C, 7148 Control5_Set = 0x1060, 7149 Control6_Set = 0x1064, 7150 TxBaudrate_Set = 0x1068, 7151 RxBaudrate_Set = 0x106C, 7152 ChannelFilter_Set = 0x1070, 7153 Preamble_Set = 0x1074, 7154 SyncWord0_Set = 0x1078, 7155 SyncWord1_Set = 0x107C, 7156 Timing_Set = 0x1080, 7157 DirectSequenceSpreadSpectrumSymbol0_Set = 0x1084, 7158 ModulationIndex_Set = 0x1088, 7159 AutomaticFrequencyControl_Set = 0x108C, 7160 AutomaticFrequencyControlAdjustmentLimit_Set = 0x1090, 7161 ShapingCoefficients0_Set = 0x1094, 7162 ShapingCoefficients1_Set = 0x1098, 7163 ShapingCoefficients2_Set = 0x109C, 7164 ShapingCoefficients3_Set = 0x10A0, 7165 ShapingCoefficients4_Set = 0x10A4, 7166 ShapingCoefficients5_Set = 0x10A8, 7167 ShapingCoefficients6_Set = 0x10AC, 7168 ShapingCoefficients7_Set = 0x10B0, 7169 ShapingCoefficients8_Set = 0x10B4, 7170 ShapingCoefficients9_Set = 0x10B8, 7171 ShapingCoefficients10_Set = 0x10BC, 7172 ShapingCoefficients11_Set = 0x10C0, 7173 ShapingCoefficients12_Set = 0x10C4, 7174 ShapingCoefficients13_Set = 0x10C8, 7175 ShapingCoefficients14_Set = 0x10CC, 7176 ShapingCoefficients15_Set = 0x10D0, 7177 RampingControl_Set = 0x10D8, 7178 RampingLevels_Set = 0x10DC, 7179 AnalogRampingControl_Set = 0x10E0, 7180 DirectCurrentOffsetCompensationFilterSettings_Set = 0x1110, 7181 DirectCurrentOffsetCompensationFilterInitialization_Set = 0x1114, 7182 DirectCurrentOffsetEstimatedValue_Set = 0x1118, 7183 SampleRateConverterRatioValuesAndChannelFilter_Set = 0x111C, 7184 InternalAutomaticFrequencyControl_Set = 0x1120, 7185 DetectionOfSignalArrivalThreshold0_Set = 0x1124, 7186 DetectionOfSignalArrivalThreshold1_Set = 0x1128, 7187 DetectionOfSignalArrivalThreshold2_Set = 0x112C, 7188 DetectionOfSignalArrivalThreshold3_Set = 0x1130, 7189 DetectionOfSignalArrivalThreshold4_Set = 0x1134, 7190 DetectionOfSignalArrivalMode_Set = 0x1138, 7191 DigitalMixerControl_Set = 0x113C, 7192 ViterbiDemodulator_Set = 0x1140, 7193 ViterbiDemodulatorCorrelationConfiguration0_Set = 0x1144, 7194 ViterbiDemodulatorCorrelationConfiguration1_Set = 0x1148, 7195 ViterbiDemodulatorTrackingLoop_Set = 0x114C, 7196 ViterbiBleTimingStampControl_Set = 0x1150, 7197 BaudrateEstimate_Set = 0x1154, 7198 AutomaticClockGating_Set = 0x1158, 7199 AutomaticClockGatingClockStop_Set = 0x115C, 7200 PhaseOffsetEstimate_Set = 0x1160, 7201 DirectModeControl_Set = 0x1164, 7202 BleLongRange_Set = 0x1168, 7203 BleLongRangeSet1_Set = 0x116C, 7204 BleLongRangeSet2_Set = 0x1170, 7205 BleLongRangeSet3_Set = 0x1174, 7206 BleLongRangeSet4_Set = 0x1178, 7207 BleLongRangeSet5_Set = 0x117C, 7208 BleLongRangeSet6_Set = 0x1180, 7209 BleLongRangeFrameControllerInterface_Set = 0x1184, 7210 CoherentDemodulatorSignals0_Set = 0x1188, 7211 CoherentDemodulatorSignals1_Set = 0x118C, 7212 CoherentDemodulatorSignals2_Set = 0x1190, 7213 CoherentDemodulatorSignals3_Set = 0x1194, 7214 Command_Set = 0x1198, 7215 SyncWordProperties_Set = 0x11A4, 7216 DigitalGainControl_Set = 0x11A8, 7217 PeripheralReflexSystemControl_Set = 0x11AC, 7218 PowerAmplifierDebug_Set = 0x11B0, 7219 RealTimeCostFunctionEngineControl_Set = 0x11B4, 7220 EarlyTimeStampControl_Set = 0x11B8, 7221 EarlyTimeStampTiming_Set = 0x11BC, 7222 AntennaSwitchControl_Set = 0x11C0, 7223 AntennaSwitchControl1_Set = 0x11C4, 7224 AntennaSwitchStart_Set = 0x11C8, 7225 AntennaSwitchEnd_Set = 0x11CC, 7226 TrecsPreamblePattern_Set = 0x11D0, 7227 TrecsPreambleDetectionControl_Set = 0x11D4, 7228 TrecsConfiguration_Set = 0x11D8, 7229 ConfigureAntennaPattern_Set = 0x11DC, 7230 ConcurrentMode_Set = 0x11E0, 7231 ChannelFilterCoeSet0Group0_Set = 0x11E4, 7232 ChannelFilterCoeSet0Group1_Set = 0x11E8, 7233 ChannelFilterCoeSet0Group2_Set = 0x11EC, 7234 ChannelFilterCoeSet0Group3_Set = 0x11F0, 7235 ChannelFilterCoeSet0Group4_Set = 0x11F4, 7236 ChannelFilterCoeSet0Group5_Set = 0x11F8, 7237 ChannelFilterCoeSet0Group6_Set = 0x11FC, 7238 ChannelFilterCoeSet1Group0_Set = 0x1200, 7239 ChannelFilterCoeSet1Group1_Set = 0x1204, 7240 ChannelFilterCoeSet1Group2_Set = 0x1208, 7241 ChannelFilterCoeSet1Group3_Set = 0x120C, 7242 ChannelFilterCoeSet1Group4_Set = 0x1210, 7243 ChannelFilterCoeSet1Group5_Set = 0x1214, 7244 ChannelFilterCoeSet1Group6_Set = 0x1218, 7245 ChannelFilterControl_Set = 0x121C, 7246 ChannelFilterLatencyControl_Set = 0x1220, 7247 FrameSchTimeoutLength_Set = 0x1224, 7248 PreambleFilterCoefficients_Set = 0x1228, 7249 CollisionRestartControl_Set = 0x122C, 7250 PreambleSenseMode_Set = 0x1230, 7251 PreambleSenseModeExtended_Set = 0x1234, 7252 SignalQualityIndicator_Set = 0x1238, 7253 AntennaDiversityModeControl_Set = 0x123C, 7254 PhaseDemodulatorFwMode_Set = 0x1240, 7255 PhaseDemodulatorAntennaDiversity_Set = 0x1244, 7256 PhaseDemodulatorAntennaDiversityDecision_Set = 0x1248, 7257 PhaseDemodulatorControl_Set = 0x124C, 7258 SignalIdentifierControl0_Set = 0x1250, 7259 SignalIdentifierControl1_Set = 0x1254, 7260 SignalIdentifierStatus_Set = 0x1258, 7261 ConfigureAntennaPatternExtended_Set = 0x125C, 7262 SignalIdentifierControl2_Set = 0x1264, 7263 ChannelFilterSwitchTime_Set = 0x1268, 7264 IrCalibrationControl_Set = 0x1270, 7265 IrCalCoefficientValues_Set = 0x1274, 7266 IrCalCoefficientWrPerAntenna0_Set = 0x1278, 7267 IrCalCoefficientWrPerAntenna1_Set = 0x127C, 7268 AdControl1_Set = 0x1280, 7269 AdControl2_Set = 0x1284, 7270 AdQual0_Set = 0x1288, 7271 AdQual1_Set = 0x128C, 7272 AdQual2_Set = 0x1290, 7273 AdQual3_Set = 0x1294, 7274 AdQual4_Set = 0x1298, 7275 AdQual5_Set = 0x129C, 7276 AdQual6_Set = 0x12A0, 7277 AdQual7_Set = 0x12A4, 7278 AdQual8_Set = 0x12A8, 7279 AdQual9_Set = 0x12AC, 7280 AdQual10_Set = 0x12B0, 7281 AdFsm0_Set = 0x12B4, 7282 AdFsm1_Set = 0x12B8, 7283 AdFsm2_Set = 0x12BC, 7284 AdFsm3_Set = 0x12C0, 7285 AdFsm4_Set = 0x12C4, 7286 AdFsm5_Set = 0x12C8, 7287 AdFsm6_Set = 0x12CC, 7288 AdFsm7_Set = 0x12D0, 7289 AdFsm8_Set = 0x12D4, 7290 AdFsm9_Set = 0x12D8, 7291 AdFsm10_Set = 0x12DC, 7292 AdFsm11_Set = 0x12E0, 7293 AdFsm12_Set = 0x12E4, 7294 AdFsm13_Set = 0x12E8, 7295 AdFsm14_Set = 0x12EC, 7296 AdFsm15_Set = 0x12F0, 7297 AdFsm16_Set = 0x12F4, 7298 AdFsm17_Set = 0x12F8, 7299 AdFsm18_Set = 0x12FC, 7300 AdFsm19_Set = 0x1300, 7301 AdFsm20_Set = 0x1304, 7302 AdFsm21_Set = 0x1308, 7303 AdFsm22_Set = 0x130C, 7304 AdFsm23_Set = 0x1310, 7305 AdFsm24_Set = 0x1314, 7306 AdFsm25_Set = 0x1318, 7307 AdFsm26_Set = 0x131C, 7308 AdFsm27_Set = 0x1320, 7309 AdFsm28_Set = 0x1324, 7310 AdFsm29_Set = 0x1328, 7311 AdFsm30_Set = 0x132C, 7312 AdPc1_Set = 0x1330, 7313 AdPc2_Set = 0x1334, 7314 AdPc3_Set = 0x1338, 7315 AdPc4_Set = 0x133C, 7316 AdPc5_Set = 0x1340, 7317 AdPc6_Set = 0x1344, 7318 AdPc7_Set = 0x1348, 7319 AdPc8_Set = 0x134C, 7320 AdPc9_Set = 0x1350, 7321 AdPc10_Set = 0x1354, 7322 HadmControl0_Set = 0x13B0, 7323 HadmControl1_Set = 0x13B4, 7324 HadmStatus0_Set = 0x13B8, 7325 HadmStatus1_Set = 0x13BC, 7326 HadmStatus2_Set = 0x13C0, 7327 HadmStatus3_Set = 0x13C4, 7328 HadmStatus4_Set = 0x13C8, 7329 HadmStatus5_Set = 0x13CC, 7330 HadmStatus6_Set = 0x13D0, 7331 Src2NcoControl_Set = 0x13E0, 7332 Spare_Set = 0x1400, 7333 7334 // Clear registers 7335 IpVersion_Clr = 0x2000, 7336 Enable_Clr = 0x2004, 7337 InterruptFlags_Clr = 0x2008, 7338 InterruptEnable_Clr = 0x200C, 7339 SequencerInterruptFlags_Clr = 0x2010, 7340 SequencerInterruptEnable_Clr = 0x2014, 7341 Status_Clr = 0x2018, 7342 Status2_Clr = 0x201C, 7343 Status3_Clr = 0x2020, 7344 Status4_Clr = 0x2024, 7345 Status5_Clr = 0x2028, 7346 Status6_Clr = 0x202C, 7347 Status7_Clr = 0x2030, 7348 TimingDetectionStatus_Clr = 0x2034, 7349 DemodulatorFSMStatus_Clr = 0x2038, 7350 FrequencyOffsetEstimate_Clr = 0x203C, 7351 AutomaticFrequencyControlAdjustmentRx_Clr = 0x2040, 7352 AutomaticFrequencyControldAjustmentTx_Clr = 0x2044, 7353 AnalogMixerControl_Clr = 0x2048, 7354 Control0_Clr = 0x204C, 7355 Control1_Clr = 0x2050, 7356 Control2_Clr = 0x2054, 7357 Control3_Clr = 0x2058, 7358 Control4_Clr = 0x205C, 7359 Control5_Clr = 0x2060, 7360 Control6_Clr = 0x2064, 7361 TxBaudrate_Clr = 0x2068, 7362 RxBaudrate_Clr = 0x206C, 7363 ChannelFilter_Clr = 0x2070, 7364 Preamble_Clr = 0x2074, 7365 SyncWord0_Clr = 0x2078, 7366 SyncWord1_Clr = 0x207C, 7367 Timing_Clr = 0x2080, 7368 DirectSequenceSpreadSpectrumSymbol0_Clr = 0x2084, 7369 ModulationIndex_Clr = 0x2088, 7370 AutomaticFrequencyControl_Clr = 0x208C, 7371 AutomaticFrequencyControlAdjustmentLimit_Clr = 0x2090, 7372 ShapingCoefficients0_Clr = 0x2094, 7373 ShapingCoefficients1_Clr = 0x2098, 7374 ShapingCoefficients2_Clr = 0x209C, 7375 ShapingCoefficients3_Clr = 0x20A0, 7376 ShapingCoefficients4_Clr = 0x20A4, 7377 ShapingCoefficients5_Clr = 0x20A8, 7378 ShapingCoefficients6_Clr = 0x20AC, 7379 ShapingCoefficients7_Clr = 0x20B0, 7380 ShapingCoefficients8_Clr = 0x20B4, 7381 ShapingCoefficients9_Clr = 0x20B8, 7382 ShapingCoefficients10_Clr = 0x20BC, 7383 ShapingCoefficients11_Clr = 0x20C0, 7384 ShapingCoefficients12_Clr = 0x20C4, 7385 ShapingCoefficients13_Clr = 0x20C8, 7386 ShapingCoefficients14_Clr = 0x20CC, 7387 ShapingCoefficients15_Clr = 0x20D0, 7388 RampingControl_Clr = 0x20D8, 7389 RampingLevels_Clr = 0x20DC, 7390 AnalogRampingControl_Clr = 0x20E0, 7391 DirectCurrentOffsetCompensationFilterSettings_Clr = 0x2110, 7392 DirectCurrentOffsetCompensationFilterInitialization_Clr = 0x2114, 7393 DirectCurrentOffsetEstimatedValue_Clr = 0x2118, 7394 SampleRateConverterRatioValuesAndChannelFilter_Clr = 0x211C, 7395 InternalAutomaticFrequencyControl_Clr = 0x2120, 7396 DetectionOfSignalArrivalThreshold0_Clr = 0x2124, 7397 DetectionOfSignalArrivalThreshold1_Clr = 0x2128, 7398 DetectionOfSignalArrivalThreshold2_Clr = 0x212C, 7399 DetectionOfSignalArrivalThreshold3_Clr = 0x2130, 7400 DetectionOfSignalArrivalThreshold4_Clr = 0x2134, 7401 DetectionOfSignalArrivalMode_Clr = 0x2138, 7402 DigitalMixerControl_Clr = 0x213C, 7403 ViterbiDemodulator_Clr = 0x2140, 7404 ViterbiDemodulatorCorrelationConfiguration0_Clr = 0x2144, 7405 ViterbiDemodulatorCorrelationConfiguration1_Clr = 0x2148, 7406 ViterbiDemodulatorTrackingLoop_Clr = 0x214C, 7407 ViterbiBleTimingStampControl_Clr = 0x2150, 7408 BaudrateEstimate_Clr = 0x2154, 7409 AutomaticClockGating_Clr = 0x2158, 7410 AutomaticClockGatingClockStop_Clr = 0x215C, 7411 PhaseOffsetEstimate_Clr = 0x2160, 7412 DirectModeControl_Clr = 0x2164, 7413 BleLongRange_Clr = 0x2168, 7414 BleLongRangeSet1_Clr = 0x216C, 7415 BleLongRangeSet2_Clr = 0x2170, 7416 BleLongRangeSet3_Clr = 0x2174, 7417 BleLongRangeSet4_Clr = 0x2178, 7418 BleLongRangeSet5_Clr = 0x217C, 7419 BleLongRangeSet6_Clr = 0x2180, 7420 BleLongRangeFrameControllerInterface_Clr = 0x2184, 7421 CoherentDemodulatorSignals0_Clr = 0x2188, 7422 CoherentDemodulatorSignals1_Clr = 0x218C, 7423 CoherentDemodulatorSignals2_Clr = 0x2190, 7424 CoherentDemodulatorSignals3_Clr = 0x2194, 7425 Command_Clr = 0x2198, 7426 SyncWordProperties_Clr = 0x21A4, 7427 DigitalGainControl_Clr = 0x21A8, 7428 PeripheralReflexSystemControl_Clr = 0x21AC, 7429 PowerAmplifierDebug_Clr = 0x21B0, 7430 RealTimeCostFunctionEngineControl_Clr = 0x21B4, 7431 EarlyTimeStampControl_Clr = 0x21B8, 7432 EarlyTimeStampTiming_Clr = 0x21BC, 7433 AntennaSwitchControl_Clr = 0x21C0, 7434 AntennaSwitchControl1_Clr = 0x21C4, 7435 AntennaSwitchStart_Clr = 0x21C8, 7436 AntennaSwitchEnd_Clr = 0x21CC, 7437 TrecsPreamblePattern_Clr = 0x21D0, 7438 TrecsPreambleDetectionControl_Clr = 0x21D4, 7439 TrecsConfiguration_Clr = 0x21D8, 7440 ConfigureAntennaPattern_Clr = 0x21DC, 7441 ConcurrentMode_Clr = 0x21E0, 7442 ChannelFilterCoeSet0Group0_Clr = 0x21E4, 7443 ChannelFilterCoeSet0Group1_Clr = 0x21E8, 7444 ChannelFilterCoeSet0Group2_Clr = 0x21EC, 7445 ChannelFilterCoeSet0Group3_Clr = 0x21F0, 7446 ChannelFilterCoeSet0Group4_Clr = 0x21F4, 7447 ChannelFilterCoeSet0Group5_Clr = 0x21F8, 7448 ChannelFilterCoeSet0Group6_Clr = 0x21FC, 7449 ChannelFilterCoeSet1Group0_Clr = 0x2200, 7450 ChannelFilterCoeSet1Group1_Clr = 0x2204, 7451 ChannelFilterCoeSet1Group2_Clr = 0x2208, 7452 ChannelFilterCoeSet1Group3_Clr = 0x220C, 7453 ChannelFilterCoeSet1Group4_Clr = 0x2210, 7454 ChannelFilterCoeSet1Group5_Clr = 0x2214, 7455 ChannelFilterCoeSet1Group6_Clr = 0x2218, 7456 ChannelFilterControl_Clr = 0x221C, 7457 ChannelFilterLatencyControl_Clr = 0x2220, 7458 FrameSchTimeoutLength_Clr = 0x2224, 7459 PreambleFilterCoefficients_Clr = 0x2228, 7460 CollisionRestartControl_Clr = 0x222C, 7461 PreambleSenseMode_Clr = 0x2230, 7462 PreambleSenseModeExtended_Clr = 0x2234, 7463 SignalQualityIndicator_Clr = 0x2238, 7464 AntennaDiversityModeControl_Clr = 0x223C, 7465 PhaseDemodulatorFwMode_Clr = 0x2240, 7466 PhaseDemodulatorAntennaDiversity_Clr = 0x2244, 7467 PhaseDemodulatorAntennaDiversityDecision_Clr = 0x2248, 7468 PhaseDemodulatorControl_Clr = 0x224C, 7469 SignalIdentifierControl0_Clr = 0x2250, 7470 SignalIdentifierControl1_Clr = 0x2254, 7471 SignalIdentifierStatus_Clr = 0x2258, 7472 ConfigureAntennaPatternExtended_Clr = 0x225C, 7473 SignalIdentifierControl2_Clr = 0x2264, 7474 ChannelFilterSwitchTime_Clr = 0x2268, 7475 IrCalibrationControl_Clr = 0x2270, 7476 IrCalCoefficientValues_Clr = 0x2274, 7477 IrCalCoefficientWrPerAntenna0_Clr = 0x2278, 7478 IrCalCoefficientWrPerAntenna1_Clr = 0x227C, 7479 AdControl1_Clr = 0x2280, 7480 AdControl2_Clr = 0x2284, 7481 AdQual0_Clr = 0x2288, 7482 AdQual1_Clr = 0x228C, 7483 AdQual2_Clr = 0x2290, 7484 AdQual3_Clr = 0x2294, 7485 AdQual4_Clr = 0x2298, 7486 AdQual5_Clr = 0x229C, 7487 AdQual6_Clr = 0x22A0, 7488 AdQual7_Clr = 0x22A4, 7489 AdQual8_Clr = 0x22A8, 7490 AdQual9_Clr = 0x22AC, 7491 AdQual10_Clr = 0x22B0, 7492 AdFsm0_Clr = 0x22B4, 7493 AdFsm1_Clr = 0x22B8, 7494 AdFsm2_Clr = 0x22BC, 7495 AdFsm3_Clr = 0x22C0, 7496 AdFsm4_Clr = 0x22C4, 7497 AdFsm5_Clr = 0x22C8, 7498 AdFsm6_Clr = 0x22CC, 7499 AdFsm7_Clr = 0x22D0, 7500 AdFsm8_Clr = 0x22D4, 7501 AdFsm9_Clr = 0x22D8, 7502 AdFsm10_Clr = 0x22DC, 7503 AdFsm11_Clr = 0x22E0, 7504 AdFsm12_Clr = 0x22E4, 7505 AdFsm13_Clr = 0x22E8, 7506 AdFsm14_Clr = 0x22EC, 7507 AdFsm15_Clr = 0x22F0, 7508 AdFsm16_Clr = 0x22F4, 7509 AdFsm17_Clr = 0x22F8, 7510 AdFsm18_Clr = 0x22FC, 7511 AdFsm19_Clr = 0x2300, 7512 AdFsm20_Clr = 0x2304, 7513 AdFsm21_Clr = 0x2308, 7514 AdFsm22_Clr = 0x230C, 7515 AdFsm23_Clr = 0x2310, 7516 AdFsm24_Clr = 0x2314, 7517 AdFsm25_Clr = 0x2318, 7518 AdFsm26_Clr = 0x231C, 7519 AdFsm27_Clr = 0x2320, 7520 AdFsm28_Clr = 0x2324, 7521 AdFsm29_Clr = 0x2328, 7522 AdFsm30_Clr = 0x232C, 7523 AdPc1_Clr = 0x2330, 7524 AdPc2_Clr = 0x2334, 7525 AdPc3_Clr = 0x2338, 7526 AdPc4_Clr = 0x233C, 7527 AdPc5_Clr = 0x2340, 7528 AdPc6_Clr = 0x2344, 7529 AdPc7_Clr = 0x2348, 7530 AdPc8_Clr = 0x234C, 7531 AdPc9_Clr = 0x2350, 7532 AdPc10_Clr = 0x2354, 7533 HadmControl0_Clr = 0x23B0, 7534 HadmControl1_Clr = 0x23B4, 7535 HadmStatus0_Clr = 0x23B8, 7536 HadmStatus1_Clr = 0x23BC, 7537 HadmStatus2_Clr = 0x23C0, 7538 HadmStatus3_Clr = 0x23C4, 7539 HadmStatus4_Clr = 0x23C8, 7540 HadmStatus5_Clr = 0x23CC, 7541 HadmStatus6_Clr = 0x23D0, 7542 Src2NcoControl_Clr = 0x23E0, 7543 Spare_Clr = 0x2400, 7544 7545 // Toggle registers 7546 IpVersion_Tgl = 0x3000, 7547 Enable_Tgl = 0x3004, 7548 InterruptFlags_Tgl = 0x3008, 7549 InterruptEnable_Tgl = 0x300C, 7550 SequencerInterruptFlags_Tgl = 0x3010, 7551 SequencerInterruptEnable_Tgl = 0x3014, 7552 Status_Tgl = 0x3018, 7553 Status2_Tgl = 0x301C, 7554 Status3_Tgl = 0x3020, 7555 Status4_Tgl = 0x3024, 7556 Status5_Tgl = 0x3028, 7557 Status6_Tgl = 0x302C, 7558 Status7_Tgl = 0x3030, 7559 TimingDetectionStatus_Tgl = 0x3034, 7560 DemodulatorFSMStatus_Tgl = 0x3038, 7561 FrequencyOffsetEstimate_Tgl = 0x303C, 7562 AutomaticFrequencyControlAdjustmentRx_Tgl = 0x3040, 7563 AutomaticFrequencyControldAjustmentTx_Tgl = 0x3044, 7564 AnalogMixerControl_Tgl = 0x3048, 7565 Control0_Tgl = 0x304C, 7566 Control1_Tgl = 0x3050, 7567 Control2_Tgl = 0x3054, 7568 Control3_Tgl = 0x3058, 7569 Control4_Tgl = 0x305C, 7570 Control5_Tgl = 0x3060, 7571 Control6_Tgl = 0x3064, 7572 TxBaudrate_Tgl = 0x3068, 7573 RxBaudrate_Tgl = 0x306C, 7574 ChannelFilter_Tgl = 0x3070, 7575 Preamble_Tgl = 0x3074, 7576 SyncWord0_Tgl = 0x3078, 7577 SyncWord1_Tgl = 0x307C, 7578 Timing_Tgl = 0x3080, 7579 DirectSequenceSpreadSpectrumSymbol0_Tgl = 0x3084, 7580 ModulationIndex_Tgl = 0x3088, 7581 AutomaticFrequencyControl_Tgl = 0x308C, 7582 AutomaticFrequencyControlAdjustmentLimit_Tgl = 0x3090, 7583 ShapingCoefficients0_Tgl = 0x3094, 7584 ShapingCoefficients1_Tgl = 0x3098, 7585 ShapingCoefficients2_Tgl = 0x309C, 7586 ShapingCoefficients3_Tgl = 0x30A0, 7587 ShapingCoefficients4_Tgl = 0x30A4, 7588 ShapingCoefficients5_Tgl = 0x30A8, 7589 ShapingCoefficients6_Tgl = 0x30AC, 7590 ShapingCoefficients7_Tgl = 0x30B0, 7591 ShapingCoefficients8_Tgl = 0x30B4, 7592 ShapingCoefficients9_Tgl = 0x30B8, 7593 ShapingCoefficients10_Tgl = 0x30BC, 7594 ShapingCoefficients11_Tgl = 0x30C0, 7595 ShapingCoefficients12_Tgl = 0x30C4, 7596 ShapingCoefficients13_Tgl = 0x30C8, 7597 ShapingCoefficients14_Tgl = 0x30CC, 7598 ShapingCoefficients15_Tgl = 0x30D0, 7599 RampingControl_Tgl = 0x30D8, 7600 RampingLevels_Tgl = 0x30DC, 7601 AnalogRampingControl_Tgl = 0x30E0, 7602 DirectCurrentOffsetCompensationFilterSettings_Tgl = 0x3110, 7603 DirectCurrentOffsetCompensationFilterInitialization_Tgl = 0x3114, 7604 DirectCurrentOffsetEstimatedValue_Tgl = 0x3118, 7605 SampleRateConverterRatioValuesAndChannelFilter_Tgl = 0x311C, 7606 InternalAutomaticFrequencyControl_Tgl = 0x3120, 7607 DetectionOfSignalArrivalThreshold0_Tgl = 0x3124, 7608 DetectionOfSignalArrivalThreshold1_Tgl = 0x3128, 7609 DetectionOfSignalArrivalThreshold2_Tgl = 0x312C, 7610 DetectionOfSignalArrivalThreshold3_Tgl = 0x3130, 7611 DetectionOfSignalArrivalThreshold4_Tgl = 0x3134, 7612 DetectionOfSignalArrivalMode_Tgl = 0x3138, 7613 DigitalMixerControl_Tgl = 0x313C, 7614 ViterbiDemodulator_Tgl = 0x3140, 7615 ViterbiDemodulatorCorrelationConfiguration0_Tgl = 0x3144, 7616 ViterbiDemodulatorCorrelationConfiguration1_Tgl = 0x3148, 7617 ViterbiDemodulatorTrackingLoop_Tgl = 0x314C, 7618 ViterbiBleTimingStampControl_Tgl = 0x3150, 7619 BaudrateEstimate_Tgl = 0x3154, 7620 AutomaticClockGating_Tgl = 0x3158, 7621 AutomaticClockGatingClockStop_Tgl = 0x315C, 7622 PhaseOffsetEstimate_Tgl = 0x3160, 7623 DirectModeControl_Tgl = 0x3164, 7624 BleLongRange_Tgl = 0x3168, 7625 BleLongRangeSet1_Tgl = 0x316C, 7626 BleLongRangeSet2_Tgl = 0x3170, 7627 BleLongRangeSet3_Tgl = 0x3174, 7628 BleLongRangeSet4_Tgl = 0x3178, 7629 BleLongRangeSet5_Tgl = 0x317C, 7630 BleLongRangeSet6_Tgl = 0x3180, 7631 BleLongRangeFrameControllerInterface_Tgl = 0x3184, 7632 CoherentDemodulatorSignals0_Tgl = 0x3188, 7633 CoherentDemodulatorSignals1_Tgl = 0x318C, 7634 CoherentDemodulatorSignals2_Tgl = 0x3190, 7635 CoherentDemodulatorSignals3_Tgl = 0x3194, 7636 Command_Tgl = 0x3198, 7637 SyncWordProperties_Tgl = 0x31A4, 7638 DigitalGainControl_Tgl = 0x31A8, 7639 PeripheralReflexSystemControl_Tgl = 0x31AC, 7640 PowerAmplifierDebug_Tgl = 0x31B0, 7641 RealTimeCostFunctionEngineControl_Tgl = 0x31B4, 7642 EarlyTimeStampControl_Tgl = 0x31B8, 7643 EarlyTimeStampTiming_Tgl = 0x31BC, 7644 AntennaSwitchControl_Tgl = 0x31C0, 7645 AntennaSwitchControl1_Tgl = 0x31C4, 7646 AntennaSwitchStart_Tgl = 0x31C8, 7647 AntennaSwitchEnd_Tgl = 0x31CC, 7648 TrecsPreamblePattern_Tgl = 0x31D0, 7649 TrecsPreambleDetectionControl_Tgl = 0x31D4, 7650 TrecsConfiguration_Tgl = 0x31D8, 7651 ConfigureAntennaPattern_Tgl = 0x31DC, 7652 ConcurrentMode_Tgl = 0x31E0, 7653 ChannelFilterCoeSet0Group0_Tgl = 0x31E4, 7654 ChannelFilterCoeSet0Group1_Tgl = 0x31E8, 7655 ChannelFilterCoeSet0Group2_Tgl = 0x31EC, 7656 ChannelFilterCoeSet0Group3_Tgl = 0x31F0, 7657 ChannelFilterCoeSet0Group4_Tgl = 0x31F4, 7658 ChannelFilterCoeSet0Group5_Tgl = 0x31F8, 7659 ChannelFilterCoeSet0Group6_Tgl = 0x31FC, 7660 ChannelFilterCoeSet1Group0_Tgl = 0x3200, 7661 ChannelFilterCoeSet1Group1_Tgl = 0x3204, 7662 ChannelFilterCoeSet1Group2_Tgl = 0x3208, 7663 ChannelFilterCoeSet1Group3_Tgl = 0x320C, 7664 ChannelFilterCoeSet1Group4_Tgl = 0x3210, 7665 ChannelFilterCoeSet1Group5_Tgl = 0x3214, 7666 ChannelFilterCoeSet1Group6_Tgl = 0x3218, 7667 ChannelFilterControl_Tgl = 0x321C, 7668 ChannelFilterLatencyControl_Tgl = 0x3220, 7669 FrameSchTimeoutLength_Tgl = 0x3224, 7670 PreambleFilterCoefficients_Tgl = 0x3228, 7671 CollisionRestartControl_Tgl = 0x322C, 7672 PreambleSenseMode_Tgl = 0x3230, 7673 PreambleSenseModeExtended_Tgl = 0x3234, 7674 SignalQualityIndicator_Tgl = 0x3238, 7675 AntennaDiversityModeControl_Tgl = 0x323C, 7676 PhaseDemodulatorFwMode_Tgl = 0x3240, 7677 PhaseDemodulatorAntennaDiversity_Tgl = 0x3244, 7678 PhaseDemodulatorAntennaDiversityDecision_Tgl = 0x3248, 7679 PhaseDemodulatorControl_Tgl = 0x324C, 7680 SignalIdentifierControl0_Tgl = 0x3250, 7681 SignalIdentifierControl1_Tgl = 0x3254, 7682 SignalIdentifierStatus_Tgl = 0x3258, 7683 ConfigureAntennaPatternExtended_Tgl = 0x325C, 7684 SignalIdentifierControl2_Tgl = 0x3264, 7685 ChannelFilterSwitchTime_Tgl = 0x3268, 7686 IrCalibrationControl_Tgl = 0x3270, 7687 IrCalCoefficientValues_Tgl = 0x3274, 7688 IrCalCoefficientWrPerAntenna0_Tgl = 0x3278, 7689 IrCalCoefficientWrPerAntenna1_Tgl = 0x327C, 7690 AdControl1_Tgl = 0x3280, 7691 AdControl2_Tgl = 0x3284, 7692 AdQual0_Tgl = 0x3288, 7693 AdQual1_Tgl = 0x328C, 7694 AdQual2_Tgl = 0x3290, 7695 AdQual3_Tgl = 0x3294, 7696 AdQual4_Tgl = 0x3298, 7697 AdQual5_Tgl = 0x329C, 7698 AdQual6_Tgl = 0x32A0, 7699 AdQual7_Tgl = 0x32A4, 7700 AdQual8_Tgl = 0x32A8, 7701 AdQual9_Tgl = 0x32AC, 7702 AdQual10_Tgl = 0x32B0, 7703 AdFsm0_Tgl = 0x32B4, 7704 AdFsm1_Tgl = 0x32B8, 7705 AdFsm2_Tgl = 0x32BC, 7706 AdFsm3_Tgl = 0x32C0, 7707 AdFsm4_Tgl = 0x32C4, 7708 AdFsm5_Tgl = 0x32C8, 7709 AdFsm6_Tgl = 0x32CC, 7710 AdFsm7_Tgl = 0x32D0, 7711 AdFsm8_Tgl = 0x32D4, 7712 AdFsm9_Tgl = 0x32D8, 7713 AdFsm10_Tgl = 0x32DC, 7714 AdFsm11_Tgl = 0x32E0, 7715 AdFsm12_Tgl = 0x32E4, 7716 AdFsm13_Tgl = 0x32E8, 7717 AdFsm14_Tgl = 0x32EC, 7718 AdFsm15_Tgl = 0x32F0, 7719 AdFsm16_Tgl = 0x32F4, 7720 AdFsm17_Tgl = 0x32F8, 7721 AdFsm18_Tgl = 0x32FC, 7722 AdFsm19_Tgl = 0x3300, 7723 AdFsm20_Tgl = 0x3304, 7724 AdFsm21_Tgl = 0x3308, 7725 AdFsm22_Tgl = 0x330C, 7726 AdFsm23_Tgl = 0x3310, 7727 AdFsm24_Tgl = 0x3314, 7728 AdFsm25_Tgl = 0x3318, 7729 AdFsm26_Tgl = 0x331C, 7730 AdFsm27_Tgl = 0x3320, 7731 AdFsm28_Tgl = 0x3324, 7732 AdFsm29_Tgl = 0x3328, 7733 AdFsm30_Tgl = 0x332C, 7734 AdPc1_Tgl = 0x3330, 7735 AdPc2_Tgl = 0x3334, 7736 AdPc3_Tgl = 0x3338, 7737 AdPc4_Tgl = 0x333C, 7738 AdPc5_Tgl = 0x3340, 7739 AdPc6_Tgl = 0x3344, 7740 AdPc7_Tgl = 0x3348, 7741 AdPc8_Tgl = 0x334C, 7742 AdPc9_Tgl = 0x3350, 7743 AdPc10_Tgl = 0x3354, 7744 HadmControl0_Tgl = 0x33B0, 7745 HadmControl1_Tgl = 0x33B4, 7746 HadmStatus0_Tgl = 0x33B8, 7747 HadmStatus1_Tgl = 0x33BC, 7748 HadmStatus2_Tgl = 0x33C0, 7749 HadmStatus3_Tgl = 0x33C4, 7750 HadmStatus4_Tgl = 0x33C8, 7751 HadmStatus5_Tgl = 0x33CC, 7752 HadmStatus6_Tgl = 0x33D0, 7753 Src2NcoControl_Tgl = 0x33E0, 7754 Spare_Tgl = 0x3400, 7755 } 7756 7757 private enum AutomaticGainControlRegisters : long 7758 { 7759 IpVersion = 0x0000, 7760 Enable = 0x0004, 7761 Status0 = 0x0008, 7762 Status1 = 0x000C, 7763 Status2 = 0x0010, 7764 ReceivedSignalStrengthIndicator = 0x0018, 7765 FrameReceivedSignalStrengthIndicator = 0x001C, 7766 Control0 = 0x0020, 7767 Control1 = 0x0024, 7768 Control2 = 0x0028, 7769 Control3 = 0x002C, 7770 Control4 = 0x0030, 7771 Control5 = 0x0034, 7772 Control6 = 0x0038, 7773 Control7 = 0x003C, 7774 ReceivedSignalStrengthIndicatorStepThreshold = 0x0040, 7775 ManualGain = 0x0044, 7776 InterruptFlags = 0x0048, 7777 InterruptEnable = 0x004C, 7778 Command = 0x0050, 7779 RxGainRange = 0x0054, 7780 AutomaticGainControlPeriod0 = 0x0058, 7781 AutomaticGainControlPeriod1 = 0x005C, 7782 HiCounterRegion0 = 0x0060, 7783 HiCounterRegion1 = 0x0064, 7784 HiCounterRegion2 = 0x0068, 7785 GainStepsLimits0 = 0x006C, 7786 GainStepsLimits1 = 0x0070, 7787 PnRfAttenuationCodeGroup0 = 0x0074, 7788 PnRfAttenuationCodeGroup1 = 0x0078, 7789 PnRfAttenuationCodeGroup2 = 0x007C, 7790 PnRfAttenuationCodeGroup3 = 0x0080, 7791 PnRfAttenuationCodeGroup4 = 0x0084, 7792 PnRfAttenuationCodeGroup5 = 0x0088, 7793 PnRfAttenuationCodeGroup6 = 0x008C, 7794 PnRfAttenuationCodeGroup7 = 0x0090, 7795 PnRfAttenuationCodeGroupAlternate = 0x00A4, 7796 LnaMixSliceCodeGroup0 = 0x00A8, 7797 LnaMixSliceCodeGroup1 = 0x00AC, 7798 ProgrammableGainAmplifierGainCodeGroup0 = 0x00B0, 7799 ProgrammableGainAmplifierGainCodeGroup1 = 0x00B4, 7800 ListenBeforeTalkConfiguration = 0x00B8, 7801 MirrorInterruptFlags = 0x00BC, 7802 SequencerInterruptFlags = 0x00C0, 7803 SequencerInterruptEnable = 0x00C4, 7804 ReceivedSignalStrengthIndicatorAbsoluteThreshold = 0x00C8, 7805 LnaBoostControl = 0x00CC, 7806 AntennaDiversity = 0x00D0, 7807 DualRfpkdThreshold0 = 0x00D4, 7808 DualRfpkdThreshold1 = 0x00D8, 7809 Spare = 0x00DC, 7810 PnRfFilterCodeGroup0 = 0x00E0, 7811 PnRfFilterCodeGroup1 = 0x00E4, 7812 PnRfFilterCodeGroup2 = 0x00E8, 7813 PnRfFilterCodeGroup3 = 0x00EC, 7814 PnRfFilterCodeGroup4 = 0x00F0, 7815 PnRfFilterCodeGroup5 = 0x00F4, 7816 PnRfFilterCodeGroup6 = 0x00F8, 7817 PnRfFilterCodeGroup7 = 0x00FC, 7818 FeNotchAttenuationCodeGroup0 = 0x0100, 7819 FeNotchAttenuationCodeGroup1 = 0x0104, 7820 FeNotchAttenuationCodeGroup2 = 0x0108, 7821 FeNotchAttenuationCodeGroup3 = 0x010C, 7822 FeNotchAttenuationCodeGroup4 = 0x0110, 7823 FeNotchAttenuationCodeGroup5 = 0x0114, 7824 FeNotchAttenuationCodeGroup6 = 0x0118, 7825 FeNotchAttenuationCodeGroup7 = 0x011C, 7826 FeNotchAttenuationCodeGroup8 = 0x0120, 7827 FeNotchAttenuationCodeGroup9 = 0x0124, 7828 FeNotchAttenuationCodeGroup10 = 0x0128, 7829 FeNotchAttenuationCodeGroup11 = 0x012C, 7830 FeNotchFilterCodeGroup0 = 0x0130, 7831 FeNotchFilterCodeGroup1 = 0x0134, 7832 FeNotchFilterCodeGroup2 = 0x0138, 7833 FeNotchFilterCodeGroup3 = 0x013C, 7834 FeNotchFilterCodeGroup4 = 0x0140, 7835 FeNotchFilterCodeGroup5 = 0x0144, 7836 FeNotchFilterCodeGroup6 = 0x0148, 7837 FeNotchFilterCodeGroup7 = 0x014C, 7838 FeNotchFilterCodeGroup8 = 0x0150, 7839 FeNotchFilterCodeGroup9 = 0x0154, 7840 FeNotchFilterCodeGroup10 = 0x0158, 7841 FeNotchFilterCodeGroup11 = 0x015C, 7842 ClearChannelAssessmentDebug = 0x0160, 7843 // Set registers 7844 IpVersion_Set = 0x1000, 7845 Enable_Set = 0x1004, 7846 Status0_Set = 0x1008, 7847 Status1_Set = 0x100C, 7848 Status2_Set = 0x1010, 7849 ReceivedSignalStrengthIndicator_Set = 0x1018, 7850 FrameReceivedSignalStrengthIndicator_Set = 0x101C, 7851 Control0_Set = 0x1020, 7852 Control1_Set = 0x1024, 7853 Control2_Set = 0x1028, 7854 Control3_Set = 0x102C, 7855 Control4_Set = 0x1030, 7856 Control5_Set = 0x1034, 7857 Control6_Set = 0x1038, 7858 Control7_Set = 0x103C, 7859 ReceivedSignalStrengthIndicatorStepThreshold_Set = 0x1040, 7860 ManualGain_Set = 0x1044, 7861 InterruptFlags_Set = 0x1048, 7862 InterruptEnable_Set = 0x104C, 7863 Command_Set = 0x1050, 7864 RxGainRange_Set = 0x1054, 7865 AutomaticGainControlPeriod0_Set = 0x1058, 7866 AutomaticGainControlPeriod1_Set = 0x105C, 7867 HiCounterRegion0_Set = 0x1060, 7868 HiCounterRegion1_Set = 0x1064, 7869 HiCounterRegion2_Set = 0x1068, 7870 GainStepsLimits0_Set = 0x106C, 7871 GainStepsLimits1_Set = 0x1070, 7872 PnRfAttenuationCodeGroup0_Set = 0x1074, 7873 PnRfAttenuationCodeGroup1_Set = 0x1078, 7874 PnRfAttenuationCodeGroup2_Set = 0x107C, 7875 PnRfAttenuationCodeGroup3_Set = 0x1080, 7876 PnRfAttenuationCodeGroup4_Set = 0x1084, 7877 PnRfAttenuationCodeGroup5_Set = 0x1088, 7878 PnRfAttenuationCodeGroup6_Set = 0x108C, 7879 PnRfAttenuationCodeGroup7_Set = 0x1090, 7880 PnRfAttenuationCodeGroupAlternate_Set = 0x10A4, 7881 LnaMixSliceCodeGroup0_Set = 0x10A8, 7882 LnaMixSliceCodeGroup1_Set = 0x10AC, 7883 ProgrammableGainAmplifierGainCodeGroup0_Set = 0x10B0, 7884 ProgrammableGainAmplifierGainCodeGroup1_Set = 0x10B4, 7885 ListenBeforeTalkConfiguration_Set = 0x10B8, 7886 MirrorInterruptFlags_Set = 0x10BC, 7887 SequencerInterruptFlags_Set = 0x10C0, 7888 SequencerInterruptEnable_Set = 0x10C4, 7889 ReceivedSignalStrengthIndicatorAbsoluteThreshold_Set = 0x10C8, 7890 LnaBoostControl_Set = 0x10CC, 7891 AntennaDiversity_Set = 0x10D0, 7892 DualRfpkdThreshold0_Set = 0x10D4, 7893 DualRfpkdThreshold1_Set = 0x10D8, 7894 Spare_Set = 0x10DC, 7895 PnRfFilterCodeGroup0_Set = 0x10E0, 7896 PnRfFilterCodeGroup1_Set = 0x10E4, 7897 PnRfFilterCodeGroup2_Set = 0x10E8, 7898 PnRfFilterCodeGroup3_Set = 0x10EC, 7899 PnRfFilterCodeGroup4_Set = 0x10F0, 7900 PnRfFilterCodeGroup5_Set = 0x10F4, 7901 PnRfFilterCodeGroup6_Set = 0x10F8, 7902 PnRfFilterCodeGroup7_Set = 0x10FC, 7903 FeNotchAttenuationCodeGroup0_Set = 0x1100, 7904 FeNotchAttenuationCodeGroup1_Set = 0x1104, 7905 FeNotchAttenuationCodeGroup2_Set = 0x1108, 7906 FeNotchAttenuationCodeGroup3_Set = 0x110C, 7907 FeNotchAttenuationCodeGroup4_Set = 0x1110, 7908 FeNotchAttenuationCodeGroup5_Set = 0x1114, 7909 FeNotchAttenuationCodeGroup6_Set = 0x1118, 7910 FeNotchAttenuationCodeGroup7_Set = 0x111C, 7911 FeNotchAttenuationCodeGroup8_Set = 0x1120, 7912 FeNotchAttenuationCodeGroup9_Set = 0x1124, 7913 FeNotchAttenuationCodeGroup10_Set = 0x1128, 7914 FeNotchAttenuationCodeGroup11_Set = 0x112C, 7915 FeNotchFilterCodeGroup0_Set = 0x1130, 7916 FeNotchFilterCodeGroup1_Set = 0x1134, 7917 FeNotchFilterCodeGroup2_Set = 0x1138, 7918 FeNotchFilterCodeGroup3_Set = 0x113C, 7919 FeNotchFilterCodeGroup4_Set = 0x1140, 7920 FeNotchFilterCodeGroup5_Set = 0x1144, 7921 FeNotchFilterCodeGroup6_Set = 0x1148, 7922 FeNotchFilterCodeGroup7_Set = 0x114C, 7923 FeNotchFilterCodeGroup8_Set = 0x1150, 7924 FeNotchFilterCodeGroup9_Set = 0x1154, 7925 FeNotchFilterCodeGroup10_Set = 0x1158, 7926 FeNotchFilterCodeGroup11_Set = 0x115C, 7927 ClearChannelAssessmentDebug_Set = 0x1160, 7928 // Clear registers 7929 IpVersion_Clr = 0x2000, 7930 Enable_Clr = 0x2004, 7931 Status0_Clr = 0x2008, 7932 Status1_Clr = 0x200C, 7933 Status2_Clr = 0x2010, 7934 ReceivedSignalStrengthIndicator_Clr = 0x2018, 7935 FrameReceivedSignalStrengthIndicator_Clr = 0x201C, 7936 Control0_Clr = 0x2020, 7937 Control1_Clr = 0x2024, 7938 Control2_Clr = 0x2028, 7939 Control3_Clr = 0x202C, 7940 Control4_Clr = 0x2030, 7941 Control5_Clr = 0x2034, 7942 Control6_Clr = 0x2038, 7943 Control7_Clr = 0x203C, 7944 ReceivedSignalStrengthIndicatorStepThreshold_Clr = 0x2040, 7945 ManualGain_Clr = 0x2044, 7946 InterruptFlags_Clr = 0x2048, 7947 InterruptEnable_Clr = 0x204C, 7948 Command_Clr = 0x2050, 7949 RxGainRange_Clr = 0x2054, 7950 AutomaticGainControlPeriod0_Clr = 0x2058, 7951 AutomaticGainControlPeriod1_Clr = 0x205C, 7952 HiCounterRegion0_Clr = 0x2060, 7953 HiCounterRegion1_Clr = 0x2064, 7954 HiCounterRegion2_Clr = 0x2068, 7955 GainStepsLimits0_Clr = 0x206C, 7956 GainStepsLimits1_Clr = 0x2070, 7957 PnRfAttenuationCodeGroup0_Clr = 0x2074, 7958 PnRfAttenuationCodeGroup1_Clr = 0x2078, 7959 PnRfAttenuationCodeGroup2_Clr = 0x207C, 7960 PnRfAttenuationCodeGroup3_Clr = 0x2080, 7961 PnRfAttenuationCodeGroup4_Clr = 0x2084, 7962 PnRfAttenuationCodeGroup5_Clr = 0x2088, 7963 PnRfAttenuationCodeGroup6_Clr = 0x208C, 7964 PnRfAttenuationCodeGroup7_Clr = 0x2090, 7965 PnRfAttenuationCodeGroupAlternate_Clr = 0x20A4, 7966 LnaMixSliceCodeGroup0_Clr = 0x20A8, 7967 LnaMixSliceCodeGroup1_Clr = 0x20AC, 7968 ProgrammableGainAmplifierGainCodeGroup0_Clr = 0x20B0, 7969 ProgrammableGainAmplifierGainCodeGroup1_Clr = 0x20B4, 7970 ListenBeforeTalkConfiguration_Clr = 0x20B8, 7971 MirrorInterruptFlags_Clr = 0x20BC, 7972 SequencerInterruptFlags_Clr = 0x20C0, 7973 SequencerInterruptEnable_Clr = 0x20C4, 7974 ReceivedSignalStrengthIndicatorAbsoluteThreshold_Clr = 0x20C8, 7975 LnaBoostControl_Clr = 0x20CC, 7976 AntennaDiversity_Clr = 0x20D0, 7977 DualRfpkdThreshold0_Clr = 0x20D4, 7978 DualRfpkdThreshold1_Clr = 0x20D8, 7979 Spare_Clr = 0x20DC, 7980 PnRfFilterCodeGroup0_Clr = 0x20E0, 7981 PnRfFilterCodeGroup1_Clr = 0x20E4, 7982 PnRfFilterCodeGroup2_Clr = 0x20E8, 7983 PnRfFilterCodeGroup3_Clr = 0x20EC, 7984 PnRfFilterCodeGroup4_Clr = 0x20F0, 7985 PnRfFilterCodeGroup5_Clr = 0x20F4, 7986 PnRfFilterCodeGroup6_Clr = 0x20F8, 7987 PnRfFilterCodeGroup7_Clr = 0x20FC, 7988 FeNotchAttenuationCodeGroup0_Clr = 0x2100, 7989 FeNotchAttenuationCodeGroup1_Clr = 0x2104, 7990 FeNotchAttenuationCodeGroup2_Clr = 0x2108, 7991 FeNotchAttenuationCodeGroup3_Clr = 0x210C, 7992 FeNotchAttenuationCodeGroup4_Clr = 0x2110, 7993 FeNotchAttenuationCodeGroup5_Clr = 0x2114, 7994 FeNotchAttenuationCodeGroup6_Clr = 0x2118, 7995 FeNotchAttenuationCodeGroup7_Clr = 0x211C, 7996 FeNotchAttenuationCodeGroup8_Clr = 0x2120, 7997 FeNotchAttenuationCodeGroup9_Clr = 0x2124, 7998 FeNotchAttenuationCodeGroup10_Clr = 0x2128, 7999 FeNotchAttenuationCodeGroup11_Clr = 0x212C, 8000 FeNotchFilterCodeGroup0_Clr = 0x2130, 8001 FeNotchFilterCodeGroup1_Clr = 0x2134, 8002 FeNotchFilterCodeGroup2_Clr = 0x2138, 8003 FeNotchFilterCodeGroup3_Clr = 0x213C, 8004 FeNotchFilterCodeGroup4_Clr = 0x2140, 8005 FeNotchFilterCodeGroup5_Clr = 0x2144, 8006 FeNotchFilterCodeGroup6_Clr = 0x2148, 8007 FeNotchFilterCodeGroup7_Clr = 0x214C, 8008 FeNotchFilterCodeGroup8_Clr = 0x2150, 8009 FeNotchFilterCodeGroup9_Clr = 0x2154, 8010 FeNotchFilterCodeGroup10_Clr = 0x2158, 8011 FeNotchFilterCodeGroup11_Clr = 0x215C, 8012 ClearChannelAssessmentDebug_Clr = 0x2160, 8013 // Toggle registers 8014 IpVersion_Tgl = 0x3000, 8015 Enable_Tgl = 0x3004, 8016 Status0_Tgl = 0x3008, 8017 Status1_Tgl = 0x300C, 8018 Status2_Tgl = 0x3010, 8019 ReceivedSignalStrengthIndicator_Tgl = 0x3018, 8020 FrameReceivedSignalStrengthIndicator_Tgl = 0x301C, 8021 Control0_Tgl = 0x3020, 8022 Control1_Tgl = 0x3024, 8023 Control2_Tgl = 0x3028, 8024 Control3_Tgl = 0x302C, 8025 Control4_Tgl = 0x3030, 8026 Control5_Tgl = 0x3034, 8027 Control6_Tgl = 0x3038, 8028 Control7_Tgl = 0x303C, 8029 ReceivedSignalStrengthIndicatorStepThreshold_Tgl = 0x3040, 8030 ManualGain_Tgl = 0x3044, 8031 InterruptFlags_Tgl = 0x3048, 8032 InterruptEnable_Tgl = 0x304C, 8033 Command_Tgl = 0x3050, 8034 RxGainRange_Tgl = 0x3054, 8035 AutomaticGainControlPeriod0_Tgl = 0x3058, 8036 AutomaticGainControlPeriod1_Tgl = 0x305C, 8037 HiCounterRegion0_Tgl = 0x3060, 8038 HiCounterRegion1_Tgl = 0x3064, 8039 HiCounterRegion2_Tgl = 0x3068, 8040 GainStepsLimits0_Tgl = 0x306C, 8041 GainStepsLimits1_Tgl = 0x3070, 8042 PnRfAttenuationCodeGroup0_Tgl = 0x3074, 8043 PnRfAttenuationCodeGroup1_Tgl = 0x3078, 8044 PnRfAttenuationCodeGroup2_Tgl = 0x307C, 8045 PnRfAttenuationCodeGroup3_Tgl = 0x3080, 8046 PnRfAttenuationCodeGroup4_Tgl = 0x3084, 8047 PnRfAttenuationCodeGroup5_Tgl = 0x3088, 8048 PnRfAttenuationCodeGroup6_Tgl = 0x308C, 8049 PnRfAttenuationCodeGroup7_Tgl = 0x3090, 8050 PnRfAttenuationCodeGroupAlternate_Tgl = 0x30A4, 8051 LnaMixSliceCodeGroup0_Tgl = 0x30A8, 8052 LnaMixSliceCodeGroup1_Tgl = 0x30AC, 8053 ProgrammableGainAmplifierGainCodeGroup0_Tgl = 0x30B0, 8054 ProgrammableGainAmplifierGainCodeGroup1_Tgl = 0x30B4, 8055 ListenBeforeTalkConfiguration_Tgl = 0x30B8, 8056 MirrorInterruptFlags_Tgl = 0x30BC, 8057 SequencerInterruptFlags_Tgl = 0x30C0, 8058 SequencerInterruptEnable_Tgl = 0x30C4, 8059 ReceivedSignalStrengthIndicatorAbsoluteThreshold_Tgl = 0x30C8, 8060 LnaBoostControl_Tgl = 0x30CC, 8061 AntennaDiversity_Tgl = 0x30D0, 8062 DualRfpkdThreshold0_Tgl = 0x30D4, 8063 DualRfpkdThreshold1_Tgl = 0x30D8, 8064 Spare_Tgl = 0x30DC, 8065 PnRfFilterCodeGroup0_Tgl = 0x30E0, 8066 PnRfFilterCodeGroup1_Tgl = 0x30E4, 8067 PnRfFilterCodeGroup2_Tgl = 0x30E8, 8068 PnRfFilterCodeGroup3_Tgl = 0x30EC, 8069 PnRfFilterCodeGroup4_Tgl = 0x30F0, 8070 PnRfFilterCodeGroup5_Tgl = 0x30F4, 8071 PnRfFilterCodeGroup6_Tgl = 0x30F8, 8072 PnRfFilterCodeGroup7_Tgl = 0x30FC, 8073 FeNotchAttenuationCodeGroup0_Tgl = 0x3100, 8074 FeNotchAttenuationCodeGroup1_Tgl = 0x3104, 8075 FeNotchAttenuationCodeGroup2_Tgl = 0x3108, 8076 FeNotchAttenuationCodeGroup3_Tgl = 0x310C, 8077 FeNotchAttenuationCodeGroup4_Tgl = 0x3110, 8078 FeNotchAttenuationCodeGroup5_Tgl = 0x3114, 8079 FeNotchAttenuationCodeGroup6_Tgl = 0x3118, 8080 FeNotchAttenuationCodeGroup7_Tgl = 0x311C, 8081 FeNotchAttenuationCodeGroup8_Tgl = 0x3120, 8082 FeNotchAttenuationCodeGroup9_Tgl = 0x3124, 8083 FeNotchAttenuationCodeGroup10_Tgl = 0x3128, 8084 FeNotchAttenuationCodeGroup11_Tgl = 0x312C, 8085 FeNotchFilterCodeGroup0_Tgl = 0x3130, 8086 FeNotchFilterCodeGroup1_Tgl = 0x3134, 8087 FeNotchFilterCodeGroup2_Tgl = 0x3138, 8088 FeNotchFilterCodeGroup3_Tgl = 0x313C, 8089 FeNotchFilterCodeGroup4_Tgl = 0x3140, 8090 FeNotchFilterCodeGroup5_Tgl = 0x3144, 8091 FeNotchFilterCodeGroup6_Tgl = 0x3148, 8092 FeNotchFilterCodeGroup7_Tgl = 0x314C, 8093 FeNotchFilterCodeGroup8_Tgl = 0x3150, 8094 FeNotchFilterCodeGroup9_Tgl = 0x3154, 8095 FeNotchFilterCodeGroup10_Tgl = 0x3158, 8096 FeNotchFilterCodeGroup11_Tgl = 0x315C, 8097 ClearChannelAssessmentDebug_Tgl = 0x3160, 8098 } 8099 8100 private enum CyclicRedundancyCheckRegisters : long 8101 { 8102 IpVersion = 0x0000, 8103 Enable = 0x0004, 8104 Control = 0x0008, 8105 Status = 0x000C, 8106 Command = 0x0010, 8107 InputData = 0x0014, 8108 InitializationValue = 0x0018, 8109 Data = 0x001C, 8110 PolynomialValue = 0x0020, 8111 8112 // Set registers 8113 IpVersion_Set = 0x1000, 8114 Enable_Set = 0x1004, 8115 Control_Set = 0x1008, 8116 Status_Set = 0x100C, 8117 Command_Set = 0x1010, 8118 InputData_Set = 0x1014, 8119 InitializationValue_Set = 0x1018, 8120 Data_Set = 0x101C, 8121 PolynomialValue_Set = 0x1020, 8122 8123 // Clear registers 8124 IpVersion_Clr = 0x2000, 8125 Enable_Clr = 0x2004, 8126 Control_Clr = 0x2008, 8127 Status_Clr = 0x200C, 8128 Command_Clr = 0x2010, 8129 InputData_Clr = 0x2014, 8130 InitializationValue_Clr = 0x2018, 8131 Data_Clr = 0x201C, 8132 PolynomialValue_Clr = 0x2020, 8133 8134 // Toggle registers 8135 IpVersion_Tgl = 0x3000, 8136 Enable_Tgl = 0x3004, 8137 Control_Tgl = 0x3008, 8138 Status_Tgl = 0x300C, 8139 Command_Tgl = 0x3010, 8140 InputData_Tgl = 0x3014, 8141 InitializationValue_Tgl = 0x3018, 8142 Data_Tgl = 0x301C, 8143 PolynomialValue_Tgl = 0x3020, 8144 8145 } 8146 8147 private enum ProtocolTimerRegisters : long 8148 { 8149 IpVersion = 0x0000, 8150 Enable = 0x0004, 8151 Control = 0x0008, 8152 Command = 0x000C, 8153 PrescalerChannelSelection = 0x0010, 8154 Status = 0x0014, 8155 PreCounterValue = 0x0018, 8156 BaseCounterValue = 0x001C, 8157 WrapCounterValue = 0x0020, 8158 BaseAndPreCounterValues = 0x0024, 8159 LatchedWrapCounterValue = 0x0028, 8160 PreCounterTopAdjustValue = 0x002C, 8161 PreCounterTopValue = 0x0030, 8162 BaseCounterTopValue = 0x0034, 8163 WrapCounterTopValue = 0x0038, 8164 Timeout0Counter = 0x003C, 8165 Timeout0CounterTop = 0x0040, 8166 Timeout0Compare = 0x0044, 8167 Timeout1Counter = 0x0048, 8168 Timeout1CounterTop = 0x004C, 8169 Timeout1Compare = 0x0050, 8170 ListenBeforeTalkWaitControl = 0x0054, 8171 ListenBeforeTalkPrescalerChannelSelection = 0x0058, 8172 ListenBeforeTalkState = 0x005C, 8173 PseudoRandomGeneratorValue = 0x0060, 8174 InterruptFlags = 0x0064, 8175 InterruptEnable = 0x0070, 8176 RxControl = 0x0074, 8177 TxControl = 0x0078, 8178 ListenBeforeTalkETSIStandardSupport = 0x007C, 8179 ListenBeforeTalkState1 = 0x0080, 8180 LinearRandomValueGeneratedByFirmware0 = 0x0084, 8181 LinearRandomValueGeneratedByFirmware1 = 0x0088, 8182 LinearRandomValueGeneratedByFirmware2 = 0x008C, 8183 SequencerInterruptFlags = 0x0090, 8184 SequencerInterruptEnable = 0x0094, 8185 CaptureCompareChannel0Control = 0x0100, 8186 CaptureCompareChannel0PreValue = 0x0104, 8187 CaptureCompareChannel0BaseValue = 0x0108, 8188 CaptureCompareChannel0WrapValue = 0x010C, 8189 CaptureCompareChannel1Control = 0x0110, 8190 CaptureCompareChannel1PreValue = 0x0114, 8191 CaptureCompareChannel1BaseValue = 0x0118, 8192 CaptureCompareChannel1WrapValue = 0x011C, 8193 CaptureCompareChannel2Control = 0x0120, 8194 CaptureCompareChannel2PreValue = 0x0124, 8195 CaptureCompareChannel2BaseValue = 0x0128, 8196 CaptureCompareChannel2WrapValue = 0x012C, 8197 CaptureCompareChannel3Control = 0x0130, 8198 CaptureCompareChannel3PreValue = 0x0134, 8199 CaptureCompareChannel3BaseValue = 0x0138, 8200 CaptureCompareChannel3WrapValue = 0x013C, 8201 CaptureCompareChannel4Control = 0x0140, 8202 CaptureCompareChannel4PreValue = 0x0144, 8203 CaptureCompareChannel4BaseValue = 0x0148, 8204 CaptureCompareChannel4WrapValue = 0x014C, 8205 CaptureCompareChannel5Control = 0x0150, 8206 CaptureCompareChannel5PreValue = 0x0154, 8207 CaptureCompareChannel5BaseValue = 0x0158, 8208 CaptureCompareChannel5WrapValue = 0x015C, 8209 CaptureCompareChannel6Control = 0x0160, 8210 CaptureCompareChannel6PreValue = 0x0164, 8211 CaptureCompareChannel6BaseValue = 0x0168, 8212 CaptureCompareChannel6WrapValue = 0x016C, 8213 CaptureCompareChannel7Control = 0x0170, 8214 CaptureCompareChannel7PreValue = 0x0174, 8215 CaptureCompareChannel7BaseValue = 0x0178, 8216 CaptureCompareChannel7WrapValue = 0x017C, 8217 8218 // Set registers 8219 IpVersion_Set = 0x1000, 8220 Enable_Set = 0x1004, 8221 Control_Set = 0x1008, 8222 Command_Set = 0x100C, 8223 PrescalerChannelSelection_Set = 0x1010, 8224 Status_Set = 0x1014, 8225 PreCounterValue_Set = 0x1018, 8226 BaseCounterValue_Set = 0x101C, 8227 WrapCounterValue_Set = 0x1020, 8228 BaseAndPreCounterValues_Set = 0x1024, 8229 LatchedWrapCounterValue_Set = 0x1028, 8230 PreCounterTopAdjustValue_Set = 0x102C, 8231 PreCounterTopValue_Set = 0x1030, 8232 BaseCounterTopValue_Set = 0x1034, 8233 WrapCounterTopValue_Set = 0x1038, 8234 Timeout0Counter_Set = 0x103C, 8235 Timeout0CounterTop_Set = 0x1040, 8236 Timeout0Compare_Set = 0x1044, 8237 Timeout1Counter_Set = 0x1048, 8238 Timeout1CounterTop_Set = 0x104C, 8239 Timeout1Compare_Set = 0x1050, 8240 ListenBeforeTalkWaitControl_Set = 0x1054, 8241 ListenBeforeTalkPrescalerChannelSelection_Set = 0x1058, 8242 ListenBeforeTalkState_Set = 0x105C, 8243 PseudoRandomGeneratorValue_Set = 0x1060, 8244 InterruptFlags_Set = 0x1064, 8245 InterruptEnable_Set = 0x1070, 8246 RxControl_Set = 0x1074, 8247 TxControl_Set = 0x1078, 8248 ListenBeforeTalkETSIStandardSupport_Set = 0x107C, 8249 ListenBeforeTalkState1_Set = 0x1080, 8250 LinearRandomValueGeneratedByFirmware0_Set = 0x1084, 8251 LinearRandomValueGeneratedByFirmware1_Set = 0x1088, 8252 LinearRandomValueGeneratedByFirmware2_Set = 0x108C, 8253 SequencerInterruptFlags_Set = 0x1090, 8254 SequencerInterruptEnable_Set = 0x1094, 8255 CaptureCompareChannel0Control_Set = 0x1100, 8256 CaptureCompareChannel0PreValue_Set = 0x1104, 8257 CaptureCompareChannel0BaseValue_Set = 0x1108, 8258 CaptureCompareChannel0WrapValue_Set = 0x110C, 8259 CaptureCompareChannel1Control_Set = 0x1110, 8260 CaptureCompareChannel1PreValue_Set = 0x1114, 8261 CaptureCompareChannel1BaseValue_Set = 0x1118, 8262 CaptureCompareChannel1WrapValue_Set = 0x111C, 8263 CaptureCompareChannel2Control_Set = 0x1120, 8264 CaptureCompareChannel2PreValue_Set = 0x1124, 8265 CaptureCompareChannel2BaseValue_Set = 0x1128, 8266 CaptureCompareChannel2WrapValue_Set = 0x112C, 8267 CaptureCompareChannel3Control_Set = 0x1130, 8268 CaptureCompareChannel3PreValue_Set = 0x1134, 8269 CaptureCompareChannel3BaseValue_Set = 0x1138, 8270 CaptureCompareChannel3WrapValue_Set = 0x113C, 8271 CaptureCompareChannel4Control_Set = 0x1140, 8272 CaptureCompareChannel4PreValue_Set = 0x1144, 8273 CaptureCompareChannel4BaseValue_Set = 0x1148, 8274 CaptureCompareChannel4WrapValue_Set = 0x114C, 8275 CaptureCompareChannel5Control_Set = 0x1150, 8276 CaptureCompareChannel5PreValue_Set = 0x1154, 8277 CaptureCompareChannel5BaseValue_Set = 0x1158, 8278 CaptureCompareChannel5WrapValue_Set = 0x115C, 8279 CaptureCompareChannel6Control_Set = 0x1160, 8280 CaptureCompareChannel6PreValue_Set = 0x1164, 8281 CaptureCompareChannel6BaseValue_Set = 0x1168, 8282 CaptureCompareChannel6WrapValue_Set = 0x116C, 8283 CaptureCompareChannel7Control_Set = 0x1170, 8284 CaptureCompareChannel7PreValue_Set = 0x1174, 8285 CaptureCompareChannel7BaseValue_Set = 0x1178, 8286 CaptureCompareChannel7WrapValue_Set = 0x117C, 8287 8288 // Clear registers 8289 IpVersion_Clr = 0x2000, 8290 Enable_Clr = 0x2004, 8291 Control_Clr = 0x2008, 8292 Command_Clr = 0x200C, 8293 PrescalerChannelSelection_Clr = 0x2010, 8294 Status_Clr = 0x2014, 8295 PreCounterValue_Clr = 0x2018, 8296 BaseCounterValue_Clr = 0x201C, 8297 WrapCounterValue_Clr = 0x2020, 8298 BaseAndPreCounterValues_Clr = 0x2024, 8299 LatchedWrapCounterValue_Clr = 0x2028, 8300 PreCounterTopAdjustValue_Clr = 0x202C, 8301 PreCounterTopValue_Clr = 0x2030, 8302 BaseCounterTopValue_Clr = 0x2034, 8303 WrapCounterTopValue_Clr = 0x2038, 8304 Timeout0Counter_Clr = 0x203C, 8305 Timeout0CounterTop_Clr = 0x2040, 8306 Timeout0Compare_Clr = 0x2044, 8307 Timeout1Counter_Clr = 0x2048, 8308 Timeout1CounterTop_Clr = 0x204C, 8309 Timeout1Compare_Clr = 0x2050, 8310 ListenBeforeTalkWaitControl_Clr = 0x2054, 8311 ListenBeforeTalkPrescalerChannelSelection_Clr = 0x2058, 8312 ListenBeforeTalkState_Clr = 0x205C, 8313 PseudoRandomGeneratorValue_Clr = 0x2060, 8314 InterruptFlags_Clr = 0x2064, 8315 InterruptEnable_Clr = 0x2070, 8316 RxControl_Clr = 0x2074, 8317 TxControl_Clr = 0x2078, 8318 ListenBeforeTalkETSIStandardSupport_Clr = 0x207C, 8319 ListenBeforeTalkState1_Clr = 0x2080, 8320 LinearRandomValueGeneratedByFirmware0_Clr = 0x2084, 8321 LinearRandomValueGeneratedByFirmware1_Clr = 0x2088, 8322 LinearRandomValueGeneratedByFirmware2_Clr = 0x208C, 8323 SequencerInterruptFlags_Clr = 0x2090, 8324 SequencerInterruptEnable_Clr = 0x2094, 8325 CaptureCompareChannel0Control_Clr = 0x2100, 8326 CaptureCompareChannel0PreValue_Clr = 0x2104, 8327 CaptureCompareChannel0BaseValue_Clr = 0x2108, 8328 CaptureCompareChannel0WrapValue_Clr = 0x210C, 8329 CaptureCompareChannel1Control_Clr = 0x2110, 8330 CaptureCompareChannel1PreValue_Clr = 0x2114, 8331 CaptureCompareChannel1BaseValue_Clr = 0x2118, 8332 CaptureCompareChannel1WrapValue_Clr = 0x211C, 8333 CaptureCompareChannel2Control_Clr = 0x2120, 8334 CaptureCompareChannel2PreValue_Clr = 0x2124, 8335 CaptureCompareChannel2BaseValue_Clr = 0x2128, 8336 CaptureCompareChannel2WrapValue_Clr = 0x212C, 8337 CaptureCompareChannel3Control_Clr = 0x2130, 8338 CaptureCompareChannel3PreValue_Clr = 0x2134, 8339 CaptureCompareChannel3BaseValue_Clr = 0x2138, 8340 CaptureCompareChannel3WrapValue_Clr = 0x213C, 8341 CaptureCompareChannel4Control_Clr = 0x2140, 8342 CaptureCompareChannel4PreValue_Clr = 0x2144, 8343 CaptureCompareChannel4BaseValue_Clr = 0x2148, 8344 CaptureCompareChannel4WrapValue_Clr = 0x214C, 8345 CaptureCompareChannel5Control_Clr = 0x2150, 8346 CaptureCompareChannel5PreValue_Clr = 0x2154, 8347 CaptureCompareChannel5BaseValue_Clr = 0x2158, 8348 CaptureCompareChannel5WrapValue_Clr = 0x215C, 8349 CaptureCompareChannel6Control_Clr = 0x2160, 8350 CaptureCompareChannel6PreValue_Clr = 0x2164, 8351 CaptureCompareChannel6BaseValue_Clr = 0x2168, 8352 CaptureCompareChannel6WrapValue_Clr = 0x216C, 8353 CaptureCompareChannel7Control_Clr = 0x2170, 8354 CaptureCompareChannel7PreValue_Clr = 0x2174, 8355 CaptureCompareChannel7BaseValue_Clr = 0x2178, 8356 CaptureCompareChannel7WrapValue_Clr = 0x217C, 8357 8358 // Toggle registers 8359 IpVersion_Tgl = 0x3000, 8360 Enable_Tgl = 0x3004, 8361 Control_Tgl = 0x3008, 8362 Command_Tgl = 0x300C, 8363 PrescalerChannelSelection_Tgl = 0x3010, 8364 Status_Tgl = 0x3014, 8365 PreCounterValue_Tgl = 0x3018, 8366 BaseCounterValue_Tgl = 0x301C, 8367 WrapCounterValue_Tgl = 0x3020, 8368 BaseAndPreCounterValues_Tgl = 0x3024, 8369 LatchedWrapCounterValue_Tgl = 0x3028, 8370 PreCounterTopAdjustValue_Tgl = 0x302C, 8371 PreCounterTopValue_Tgl = 0x3030, 8372 BaseCounterTopValue_Tgl = 0x3034, 8373 WrapCounterTopValue_Tgl = 0x3038, 8374 Timeout0Counter_Tgl = 0x303C, 8375 Timeout0CounterTop_Tgl = 0x3040, 8376 Timeout0Compare_Tgl = 0x3044, 8377 Timeout1Counter_Tgl = 0x3048, 8378 Timeout1CounterTop_Tgl = 0x304C, 8379 Timeout1Compare_Tgl = 0x3050, 8380 ListenBeforeTalkWaitControl_Tgl = 0x3054, 8381 ListenBeforeTalkPrescalerChannelSelection_Tgl = 0x3058, 8382 ListenBeforeTalkState_Tgl = 0x305C, 8383 PseudoRandomGeneratorValue_Tgl = 0x3060, 8384 InterruptFlags_Tgl = 0x3064, 8385 InterruptEnable_Tgl = 0x3070, 8386 RxControl_Tgl = 0x3074, 8387 TxControl_Tgl = 0x3078, 8388 ListenBeforeTalkETSIStandardSupport_Tgl = 0x307C, 8389 ListenBeforeTalkState1_Tgl = 0x3080, 8390 LinearRandomValueGeneratedByFirmware0_Tgl = 0x3084, 8391 LinearRandomValueGeneratedByFirmware1_Tgl = 0x3088, 8392 LinearRandomValueGeneratedByFirmware2_Tgl = 0x308C, 8393 SequencerInterruptFlags_Tgl = 0x3090, 8394 SequencerInterruptEnable_Tgl = 0x3094, 8395 CaptureCompareChannel0Control_Tgl = 0x3100, 8396 CaptureCompareChannel0PreValue_Tgl = 0x3104, 8397 CaptureCompareChannel0BaseValue_Tgl = 0x3108, 8398 CaptureCompareChannel0WrapValue_Tgl = 0x310C, 8399 CaptureCompareChannel1Control_Tgl = 0x3110, 8400 CaptureCompareChannel1PreValue_Tgl = 0x3114, 8401 CaptureCompareChannel1BaseValue_Tgl = 0x3118, 8402 CaptureCompareChannel1WrapValue_Tgl = 0x311C, 8403 CaptureCompareChannel2Control_Tgl = 0x3120, 8404 CaptureCompareChannel2PreValue_Tgl = 0x3124, 8405 CaptureCompareChannel2BaseValue_Tgl = 0x3128, 8406 CaptureCompareChannel2WrapValue_Tgl = 0x312C, 8407 CaptureCompareChannel3Control_Tgl = 0x3130, 8408 CaptureCompareChannel3PreValue_Tgl = 0x3134, 8409 CaptureCompareChannel3BaseValue_Tgl = 0x3138, 8410 CaptureCompareChannel3WrapValue_Tgl = 0x313C, 8411 CaptureCompareChannel4Control_Tgl = 0x3140, 8412 CaptureCompareChannel4PreValue_Tgl = 0x3144, 8413 CaptureCompareChannel4BaseValue_Tgl = 0x3148, 8414 CaptureCompareChannel4WrapValue_Tgl = 0x314C, 8415 CaptureCompareChannel5Control_Tgl = 0x3150, 8416 CaptureCompareChannel5PreValue_Tgl = 0x3154, 8417 CaptureCompareChannel5BaseValue_Tgl = 0x3158, 8418 CaptureCompareChannel5WrapValue_Tgl = 0x315C, 8419 CaptureCompareChannel6Control_Tgl = 0x3160, 8420 CaptureCompareChannel6PreValue_Tgl = 0x3164, 8421 CaptureCompareChannel6BaseValue_Tgl = 0x3168, 8422 CaptureCompareChannel6WrapValue_Tgl = 0x316C, 8423 CaptureCompareChannel7Control_Tgl = 0x3170, 8424 CaptureCompareChannel7PreValue_Tgl = 0x3174, 8425 CaptureCompareChannel7BaseValue_Tgl = 0x3178, 8426 CaptureCompareChannel7WrapValue_Tgl = 0x317C, 8427 8428 } 8429 8430 private enum RadioControllerRegisters : long 8431 { 8432 IpVersion = 0x0000, 8433 Enable = 0x0004, 8434 RXENSourceEnable = 0x0008, 8435 Status = 0x000C, 8436 Command = 0x0010, 8437 Control = 0x0014, 8438 ForceStateTransition = 0x0018, 8439 InterruptFlags = 0x001C, 8440 InterruptEnable = 0x0020, 8441 TestControl = 0x0024, 8442 SequencerInterruptFlags = 0x0028, 8443 SequencerInterruptEnable = 0x002C, 8444 Status1 = 0x0030, 8445 SequencerTimerValue = 0x0034, 8446 SequencerTimerCompareValue = 0x0038, 8447 SequencerControl = 0x003C, 8448 SequencerPrescaler = 0x0040, 8449 Storage0 = 0x0044, 8450 Storage1 = 0x0048, 8451 Storage2 = 0x004C, 8452 Storage3 = 0x0050, 8453 SystemTickTimerControl = 0x0054, 8454 FrameControlWordBufferWrite = 0x0058, 8455 FrameControlWordBufferRead = 0x005C, 8456 Em1pControlAndStatus = 0x0060, 8457 SynthesizerEnableControl = 0x0098, 8458 SynthesizerRegulatorEnableControl = 0x009C, 8459 VoltageControlledOscillatorControl = 0x00A0, 8460 ChargePumpControl = 0x00A4, 8461 RadioFrequencyStatus = 0x00AC, 8462 Status2 = 0x00B0, 8463 IntermediateFrequencyProgrammableGainAmplifierControl = 0x00B4, 8464 PowerAmplifierEnableControl = 0x00B8, 8465 AutomaticPowerControl = 0x00BC, 8466 AntennaDiversity = 0x00C0, 8467 AuxiliaryAnalogToDigitalConverterTrim = 0x00C4, 8468 AuxiliaryAnalogToDigitalConverterEnable = 0x00C8, 8469 AuxiliaryAnalogToDigitalConverterControl0 = 0x00CC, 8470 AuxiliaryAnalogToDigitalConverterControl1 = 0x00D0, 8471 AuxiliaryAnalogToDigitalConverterDigitalOutput = 0x00D4, 8472 ClockMultEnable0 = 0x00D8, 8473 ClockMultEnable1 = 0x00DC, 8474 ClockMultControl = 0x00E0, 8475 ClockMultStatus = 0x00E4, 8476 IntermediateFrequencyAnalogToDigitalConverterDebug = 0x00E8, 8477 IntermediateFrequencyAnalogToDigitalConverterTrim0 = 0x00EC, 8478 IntermediateFrequencyAnalogToDigitalConverterTrim1 = 0x00F0, 8479 IntermediateFrequencyAnalogToDigitalConverterCalibration = 0x00F4, 8480 IntermediateFrequencyAnalogToDigitalConverterStatus = 0x00F8, 8481 LowNoiseAmplifierMixerDebug = 0x00FC, 8482 LowNoiseAmplifierMixerTrim0 = 0x0100, 8483 LowNoiseAmplifierMixerTrim1 = 0x0104, 8484 LowNoiseAmplifierMixerTrim2 = 0x0108, 8485 LowNoiseAmplifierMixerTrim3 = 0x010C, 8486 LowNoiseAmplifierMixerTrim4 = 0x0110, 8487 LowNoiseAmplifierMixerCalibration = 0x0114, 8488 LowNoiseAmplifierMixerEnable = 0x0118, 8489 PreCounterOverflow = 0x011C, 8490 PowerAmplifierTrim0 = 0x0120, 8491 PowerAmplifierTrim1 = 0x0124, 8492 PowerAmplifierTrim2 = 0x0128, 8493 PowerAmplifierTrim3 = 0x012C, 8494 PowerAmplifierTrim4 = 0x0130, 8495 PowerAmplifierTrim5 = 0x0134, 8496 TxPower = 0x013C, 8497 TxRamp = 0x0140, 8498 ProgrammableGainAmplifierTrim = 0x0148, 8499 ProgrammableGainAmplifierCalibration = 0x014C, 8500 ProgrammableGainAmplifierControl = 0x0150, 8501 RadioFrequencyBiasCalibration = 0x0154, 8502 RadioFrequencyBiasControl = 0x0158, 8503 RadioEnable = 0x015C, 8504 RadioFrequencyPathEnable0 = 0x0160, 8505 RadioFrequencyPathEnable1 = 0x0164, 8506 Rx = 0x0168, 8507 Tx = 0x016C, 8508 SyDebug = 0x0170, 8509 SyTrim0 = 0x0174, 8510 SyTrim1 = 0x0178, 8511 SyCalibration = 0x017C, 8512 SyEnable = 0x0180, 8513 SyloEnable = 0x0184, 8514 SymmControl = 0x0188, 8515 DigitalClockRetimeControl = 0x0190, 8516 DigitalClockRetimeStatus = 0x0194, 8517 XoRetimeControl = 0x0198, 8518 XoRetimeStatus = 0x019C, 8519 AutomaticGainControlOverwrite0 = 0x01A0, 8520 AutomaticGainControlOverwrite1 = 0x01A4, 8521 AutomaticGainControlOverwrite2 = 0x01A8, 8522 Spare = 0x01C4, 8523 PowerAmplifierControl = 0x01C8, 8524 FeNotch0 = 0x01CC, 8525 FeNotch1 = 0x01D0, 8526 Scratch0 = 0x03E0, 8527 Scratch1 = 0x03E4, 8528 Scratch2 = 0x03E8, 8529 Scratch3 = 0x03EC, 8530 Scratch4 = 0x03F0, 8531 Scratch5 = 0x03F4, 8532 Scratch6 = 0x03F8, 8533 Scratch7 = 0x03FC, 8534 ThermisterControl = 0x07E8, 8535 DiagaAlternateEnable = 0x07EC, 8536 DiagaAlternateRfBlocksAndTpSelect = 0x07F0, 8537 DiagaAlternateBridgeControl = 0x07F4, 8538 RadioFrequencyLock0 = 0x07F8, 8539 RadioFrequencyLock1 = 0x07FC, 8540 8541 // Set registers 8542 IpVersion_Set = 0x1000, 8543 Enable_Set = 0x1004, 8544 RXENSourceEnable_Set = 0x1008, 8545 Status0_Set = 0x100C, 8546 Command_Set = 0x1010, 8547 Control_Set = 0x1014, 8548 ForceStateTransition_Set = 0x1018, 8549 InterruptFlags_Set = 0x101C, 8550 InterruptEnable_Set = 0x1020, 8551 TestControl_Set = 0x1024, 8552 SequencerInterruptFlags_Set = 0x1028, 8553 SequencerInterruptEnable_Set = 0x102C, 8554 Status1_Set = 0x1030, 8555 SequencerTimerValue_Set = 0x1034, 8556 SequencerTimerCompareValue_Set = 0x1038, 8557 SequencerControl_Set = 0x103C, 8558 SequencerPrescaler_Set = 0x1040, 8559 Storage0_Set = 0x1044, 8560 Storage1_Set = 0x1048, 8561 Storage2_Set = 0x104C, 8562 Storage3_Set = 0x1050, 8563 SystemTickTimerControl_Set = 0x1054, 8564 FrameControlWordBufferWrite_Set = 0x1058, 8565 FrameControlWordBufferRead_Set = 0x105C, 8566 Em1pControlAndStatus_Set = 0x1060, 8567 SynthesizerEnableControl_Set = 0x1098, 8568 SynthesizerRegulatorEnableControl_Set = 0x109C, 8569 VoltageControlledOscillatorControl_Set = 0x10A0, 8570 ChargePumpControl_Set = 0x10A4, 8571 RadioFrequencyStatus_Set = 0x10AC, 8572 Status2_Set = 0x10B0, 8573 IntermediateFrequencyProgrammableGainAmplifierControl_Set = 0x10B4, 8574 PowerAmplifierEnableControl_Set = 0x10B8, 8575 AutomaticPowerControl_Set = 0x10BC, 8576 AntennaDiversity_Set = 0x10C0, 8577 AuxiliaryAnalogToDigitalConverterTrim_Set = 0x10C4, 8578 AuxiliaryAnalogToDigitalConverterEnable_Set = 0x10C8, 8579 AuxiliaryAnalogToDigitalConverterControl0_Set = 0x10CC, 8580 AuxiliaryAnalogToDigitalConverterControl1_Set = 0x10D0, 8581 AuxiliaryAnalogToDigitalConverterDigitalOutput_Set = 0x10D4, 8582 ClockMultEnable0_Set = 0x10D8, 8583 ClockMultEnable1_Set = 0x10DC, 8584 ClockMultControl_Set = 0x10E0, 8585 ClockMultStatus_Set = 0x10E4, 8586 IntermediateFrequencyAnalogToDigitalConverterDebug_Set = 0x10E8, 8587 IntermediateFrequencyAnalogToDigitalConverterTrim0_Set = 0x10EC, 8588 IntermediateFrequencyAnalogToDigitalConverterTrim1_Set = 0x10F0, 8589 IntermediateFrequencyAnalogToDigitalConverterCalibration_Set = 0x10F4, 8590 IntermediateFrequencyAnalogToDigitalConverterStatus_Set = 0x10F8, 8591 LowNoiseAmplifierMixerDebug_Set = 0x10FC, 8592 LowNoiseAmplifierMixerTrim0_Set = 0x1100, 8593 LowNoiseAmplifierMixerTrim1_Set = 0x1104, 8594 LowNoiseAmplifierMixerTrim2_Set = 0x1108, 8595 LowNoiseAmplifierMixerTrim3_Set = 0x110C, 8596 LowNoiseAmplifierMixerTrim4_Set = 0x1110, 8597 LowNoiseAmplifierMixerCalibration_Set = 0x1114, 8598 LowNoiseAmplifierMixerEnable_Set = 0x1118, 8599 PreCounterOverflow_Set = 0x111C, 8600 PowerAmplifierTrim0_Set = 0x1120, 8601 PowerAmplifierTrim1_Set = 0x1124, 8602 PowerAmplifierTrim2_Set = 0x1128, 8603 PowerAmplifierTrim3_Set = 0x112C, 8604 PowerAmplifierTrim4_Set = 0x1130, 8605 PowerAmplifierTrim5_Set = 0x1134, 8606 TxPower_Set = 0x113C, 8607 TxRamp_Set = 0x1140, 8608 ProgrammableGainAmplifierTrim_Set = 0x1148, 8609 ProgrammableGainAmplifierCalibration_Set = 0x114C, 8610 ProgrammableGainAmplifierControl_Set = 0x1150, 8611 RadioFrequencyBiasCalibration_Set = 0x1154, 8612 RadioFrequencyBiasControl_Set = 0x1158, 8613 RadioEnable_Set = 0x115C, 8614 RadioFrequencyPathEnable0_Set = 0x1160, 8615 RadioFrequencyPathEnable1_Set = 0x1164, 8616 Rx_Set = 0x1168, 8617 Tx_Set = 0x116C, 8618 SyDebug_Set = 0x1170, 8619 SyTrim0_Set = 0x1174, 8620 SyTrim1_Set = 0x1178, 8621 SyCalibration_Set = 0x117C, 8622 SyEnable_Set = 0x1180, 8623 SyloEnable_Set = 0x1184, 8624 SymmControl_Set = 0x1188, 8625 DigitalClockRetimeControl_Set = 0x1190, 8626 DigitalClockRetimeStatus_Set = 0x1194, 8627 XoRetimeControl_Set = 0x1198, 8628 XoRetimeStatus_Set = 0x119C, 8629 AutomaticGainControlOverwrite0_Set = 0x11A0, 8630 AutomaticGainControlOverwrite1_Set = 0x11A4, 8631 AutomaticGainControlOverwrite2_Set = 0x11A8, 8632 Spare_Set = 0x11C4, 8633 PowerAmplifierControl_Set = 0x11C8, 8634 FeNotch0_Set = 0x11CC, 8635 FeNotch1_Set = 0x11D0, 8636 Scratch0_Set = 0x13E0, 8637 Scratch1_Set = 0x13E4, 8638 Scratch2_Set = 0x13E8, 8639 Scratch3_Set = 0x13EC, 8640 Scratch4_Set = 0x13F0, 8641 Scratch5_Set = 0x13F4, 8642 Scratch6_Set = 0x13F8, 8643 Scratch7_Set = 0x13FC, 8644 ThermisterControl_Set = 0x17E8, 8645 DiagaAlternateEnable_Set = 0x17EC, 8646 DiagaAlternateRfBlocksAndTpSelect_Set = 0x17F0, 8647 DiagaAlternateBridgeControl_Set = 0x17F4, 8648 RadioFrequencyLock0_Set = 0x17F8, 8649 RadioFrequencyLock1_Set = 0x17FC, 8650 8651 // Clear registers 8652 IpVersion_Clr = 0x2000, 8653 Enable_Clr = 0x2004, 8654 RXENSourceEnable_Clr = 0x2008, 8655 Status0_Clr = 0x200C, 8656 Command_Clr = 0x2010, 8657 Control_Clr = 0x2014, 8658 ForceStateTransition_Clr = 0x2018, 8659 InterruptFlags_Clr = 0x201C, 8660 InterruptEnable_Clr = 0x2020, 8661 TestControl_Clr = 0x2024, 8662 SequencerInterruptFlags_Clr = 0x2028, 8663 SequencerInterruptEnable_Clr = 0x202C, 8664 Status1_Clr = 0x2030, 8665 SequencerTimerValue_Clr = 0x2034, 8666 SequencerTimerCompareValue_Clr = 0x2038, 8667 SequencerControl_Clr = 0x203C, 8668 SequencerPrescaler_Clr = 0x2040, 8669 Storage0_Clr = 0x2044, 8670 Storage1_Clr = 0x2048, 8671 Storage2_Clr = 0x204C, 8672 Storage3_Clr = 0x2050, 8673 SystemTickTimerControl_Clr = 0x2054, 8674 FrameControlWordBufferWrite_Clr = 0x2058, 8675 FrameControlWordBufferRead_Clr = 0x205C, 8676 Em1pControlAndStatus_Clr = 0x2060, 8677 SynthesizerEnableControl_Clr = 0x2098, 8678 SynthesizerRegulatorEnableControl_Clr = 0x209C, 8679 VoltageControlledOscillatorControl_Clr = 0x20A0, 8680 ChargePumpControl_Clr = 0x20A4, 8681 RadioFrequencyStatus_Clr = 0x20AC, 8682 Status2_Clr = 0x20B0, 8683 IntermediateFrequencyProgrammableGainAmplifierControl_Clr = 0x20B4, 8684 PowerAmplifierEnableControl_Clr = 0x20B8, 8685 AutomaticPowerControl_Clr = 0x20BC, 8686 AntennaDiversity_Clr = 0x20C0, 8687 AuxiliaryAnalogToDigitalConverterTrim_Clr = 0x20C4, 8688 AuxiliaryAnalogToDigitalConverterEnable_Clr = 0x20C8, 8689 AuxiliaryAnalogToDigitalConverterControl0_Clr = 0x20CC, 8690 AuxiliaryAnalogToDigitalConverterControl1_Clr = 0x20D0, 8691 AuxiliaryAnalogToDigitalConverterDigitalOutput_Clr = 0x20D4, 8692 ClockMultEnable0_Clr = 0x20D8, 8693 ClockMultEnable1_Clr = 0x20DC, 8694 ClockMultControl_Clr = 0x20E0, 8695 ClockMultStatus_Clr = 0x20E4, 8696 IntermediateFrequencyAnalogToDigitalConverterDebug_Clr = 0x20E8, 8697 IntermediateFrequencyAnalogToDigitalConverterTrim0_Clr = 0x20EC, 8698 IntermediateFrequencyAnalogToDigitalConverterTrim1_Clr = 0x20F0, 8699 IntermediateFrequencyAnalogToDigitalConverterCalibration_Clr = 0x20F4, 8700 IntermediateFrequencyAnalogToDigitalConverterStatus_Clr = 0x20F8, 8701 LowNoiseAmplifierMixerDebug_Clr = 0x20FC, 8702 LowNoiseAmplifierMixerTrim0_Clr = 0x2100, 8703 LowNoiseAmplifierMixerTrim1_Clr = 0x2104, 8704 LowNoiseAmplifierMixerTrim2_Clr = 0x2108, 8705 LowNoiseAmplifierMixerTrim3_Clr = 0x210C, 8706 LowNoiseAmplifierMixerTrim4_Clr = 0x2110, 8707 LowNoiseAmplifierMixerCalibration_Clr = 0x2114, 8708 LowNoiseAmplifierMixerEnable_Clr = 0x2118, 8709 PreCounterOverflow_Clr = 0x211C, 8710 PowerAmplifierTrim0_Clr = 0x2120, 8711 PowerAmplifierTrim1_Clr = 0x2124, 8712 PowerAmplifierTrim2_Clr = 0x2128, 8713 PowerAmplifierTrim3_Clr = 0x212C, 8714 PowerAmplifierTrim4_Clr = 0x2130, 8715 PowerAmplifierTrim5_Clr = 0x2134, 8716 TxPower_Clr = 0x213C, 8717 TxRamp_Clr = 0x2140, 8718 ProgrammableGainAmplifierTrim_Clr = 0x2148, 8719 ProgrammableGainAmplifierCalibration_Clr = 0x214C, 8720 ProgrammableGainAmplifierControl_Clr = 0x2150, 8721 RadioFrequencyBiasCalibration_Clr = 0x2154, 8722 RadioFrequencyBiasControl_Clr = 0x2158, 8723 RadioEnable_Clr = 0x215C, 8724 RadioFrequencyPathEnable0_Clr = 0x2160, 8725 RadioFrequencyPathEnable1_Clr = 0x2164, 8726 Rx_Clr = 0x2168, 8727 Tx_Clr = 0x216C, 8728 SyDebug_Clr = 0x2170, 8729 SyTrim0_Clr = 0x2174, 8730 SyTrim1_Clr = 0x2178, 8731 SyCalibration_Clr = 0x217C, 8732 SyEnable_Clr = 0x2180, 8733 SyloEnable_Clr = 0x2184, 8734 SymmControl_Clr = 0x2188, 8735 DigitalClockRetimeControl_Clr = 0x2190, 8736 DigitalClockRetimeStatus_Clr = 0x2194, 8737 XoRetimeControl_Clr = 0x2198, 8738 XoRetimeStatus_Clr = 0x219C, 8739 AutomaticGainControlOverwrite0_Clr = 0x21A0, 8740 AutomaticGainControlOverwrite1_Clr = 0x21A4, 8741 AutomaticGainControlOverwrite2_Clr = 0x21A8, 8742 Spare_Clr = 0x21C4, 8743 PowerAmplifierControl_Clr = 0x21C8, 8744 FeNotch0_Clr = 0x21CC, 8745 FeNotch1_Clr = 0x21D0, 8746 Scratch0_Clr = 0x23E0, 8747 Scratch1_Clr = 0x23E4, 8748 Scratch2_Clr = 0x23E8, 8749 Scratch3_Clr = 0x23EC, 8750 Scratch4_Clr = 0x23F0, 8751 Scratch5_Clr = 0x23F4, 8752 Scratch6_Clr = 0x23F8, 8753 Scratch7_Clr = 0x23FC, 8754 ThermisterControl_Clr = 0x27E8, 8755 DiagaAlternateEnable_Clr = 0x27EC, 8756 DiagaAlternateRfBlocksAndTpSelect_Clr = 0x27F0, 8757 DiagaAlternateBridgeControl_Clr = 0x27F4, 8758 RadioFrequencyLock0_Clr = 0x27F8, 8759 RadioFrequencyLock1_Clr = 0x27FC, 8760 8761 // Toggle registers 8762 IpVersion_Tgl = 0x3000, 8763 Enable_Tgl = 0x3004, 8764 RXENSourceEnable_Tgl = 0x3008, 8765 Status0_Tgl = 0x300C, 8766 Command_Tgl = 0x3010, 8767 Control_Tgl = 0x3014, 8768 ForceStateTransition_Tgl = 0x3018, 8769 InterruptFlags_Tgl = 0x301C, 8770 InterruptEnable_Tgl = 0x3020, 8771 TestControl_Tgl = 0x3024, 8772 SequencerInterruptFlags_Tgl = 0x3028, 8773 SequencerInterruptEnable_Tgl = 0x302C, 8774 Status1_Tgl = 0x3030, 8775 SequencerTimerValue_Tgl = 0x3034, 8776 SequencerTimerCompareValue_Tgl = 0x3038, 8777 SequencerControl_Tgl = 0x303C, 8778 SequencerPrescaler_Tgl = 0x3040, 8779 Storage0_Tgl = 0x3044, 8780 Storage1_Tgl = 0x3048, 8781 Storage2_Tgl = 0x304C, 8782 Storage3_Tgl = 0x3050, 8783 SystemTickTimerControl_Tgl = 0x3054, 8784 FrameControlWordBufferWrite_Tgl = 0x3058, 8785 FrameControlWordBufferRead_Tgl = 0x305C, 8786 Em1pControlAndStatus_Tgl = 0x3060, 8787 SynthesizerEnableControl_Tgl = 0x3098, 8788 SynthesizerRegulatorEnableControl_Tgl = 0x309C, 8789 VoltageControlledOscillatorControl_Tgl = 0x30A0, 8790 ChargePumpControl_Tgl = 0x30A4, 8791 RadioFrequencyStatus_Tgl = 0x30AC, 8792 Status2_Tgl = 0x30B0, 8793 IntermediateFrequencyProgrammableGainAmplifierControl_Tgl = 0x30B4, 8794 PowerAmplifierEnableControl_Tgl = 0x30B8, 8795 AutomaticPowerControl_Tgl = 0x30BC, 8796 AntennaDiversity_Tgl = 0x30C0, 8797 AuxiliaryAnalogToDigitalConverterTrim_Tgl = 0x30C4, 8798 AuxiliaryAnalogToDigitalConverterEnable_Tgl = 0x30C8, 8799 AuxiliaryAnalogToDigitalConverterControl0_Tgl = 0x30CC, 8800 AuxiliaryAnalogToDigitalConverterControl1_Tgl = 0x30D0, 8801 AuxiliaryAnalogToDigitalConverterDigitalOutput_Tgl = 0x30D4, 8802 ClockMultEnable0_Tgl = 0x30D8, 8803 ClockMultEnable1_Tgl = 0x30DC, 8804 ClockMultControl_Tgl = 0x30E0, 8805 ClockMultStatus_Tgl = 0x30E4, 8806 IntermediateFrequencyAnalogToDigitalConverterDebug_Tgl = 0x30E8, 8807 IntermediateFrequencyAnalogToDigitalConverterTrim0_Tgl = 0x30EC, 8808 IntermediateFrequencyAnalogToDigitalConverterTrim1_Tgl = 0x30F0, 8809 IntermediateFrequencyAnalogToDigitalConverterCalibration_Tgl = 0x30F4, 8810 IntermediateFrequencyAnalogToDigitalConverterStatus_Tgl = 0x30F8, 8811 LowNoiseAmplifierMixerDebug_Tgl = 0x30FC, 8812 LowNoiseAmplifierMixerTrim0_Tgl = 0x3100, 8813 LowNoiseAmplifierMixerTrim1_Tgl = 0x3104, 8814 LowNoiseAmplifierMixerTrim2_Tgl = 0x3108, 8815 LowNoiseAmplifierMixerTrim3_Tgl = 0x310C, 8816 LowNoiseAmplifierMixerTrim4_Tgl = 0x3110, 8817 LowNoiseAmplifierMixerCalibration_Tgl = 0x3114, 8818 LowNoiseAmplifierMixerEnable_Tgl = 0x3118, 8819 PreCounterOverflow_Tgl = 0x311C, 8820 PowerAmplifierTrim0_Tgl = 0x3120, 8821 PowerAmplifierTrim1_Tgl = 0x3124, 8822 PowerAmplifierTrim2_Tgl = 0x3128, 8823 PowerAmplifierTrim3_Tgl = 0x312C, 8824 PowerAmplifierTrim4_Tgl = 0x3130, 8825 PowerAmplifierTrim5_Tgl = 0x3134, 8826 TxPower_Tgl = 0x313C, 8827 TxRamp_Tgl = 0x3140, 8828 ProgrammableGainAmplifierTrim_Tgl = 0x3148, 8829 ProgrammableGainAmplifierCalibration_Tgl = 0x314C, 8830 ProgrammableGainAmplifierControl_Tgl = 0x3150, 8831 RadioFrequencyBiasCalibration_Tgl = 0x3154, 8832 RadioFrequencyBiasControl_Tgl = 0x3158, 8833 RadioEnable_Tgl = 0x315C, 8834 RadioFrequencyPathEnable0_Tgl = 0x3160, 8835 RadioFrequencyPathEnable1_Tgl = 0x3164, 8836 Rx_Tgl = 0x3168, 8837 Tx_Tgl = 0x316C, 8838 SyDebug_Tgl = 0x3170, 8839 SyTrim0_Tgl = 0x3174, 8840 SyTrim1_Tgl = 0x3178, 8841 SyCalibration_Tgl = 0x317C, 8842 SyEnable_Tgl = 0x3180, 8843 SyloEnable_Tgl = 0x3184, 8844 SymmControl_Tgl = 0x3188, 8845 DigitalClockRetimeControl_Tgl = 0x3190, 8846 DigitalClockRetimeStatus_Tgl = 0x3194, 8847 XoRetimeControl_Tgl = 0x3198, 8848 XoRetimeStatus_Tgl = 0x319C, 8849 AutomaticGainControlOverwrite0_Tgl = 0x31A0, 8850 AutomaticGainControlOverwrite1_Tgl = 0x31A4, 8851 AutomaticGainControlOverwrite2_Tgl = 0x31A8, 8852 Spare_Tgl = 0x31C4, 8853 PowerAmplifierControl_Tgl = 0x31C8, 8854 FeNotch0_Tgl = 0x31CC, 8855 FeNotch1_Tgl = 0x31D0, 8856 Scratch0_Tgl = 0x33E0, 8857 Scratch1_Tgl = 0x33E4, 8858 Scratch2_Tgl = 0x33E8, 8859 Scratch3_Tgl = 0x33EC, 8860 Scratch4_Tgl = 0x33F0, 8861 Scratch5_Tgl = 0x33F4, 8862 Scratch6_Tgl = 0x33F8, 8863 Scratch7_Tgl = 0x33FC, 8864 ThermisterControl_Tgl = 0x37E8, 8865 DiagaAlternateEnable_Tgl = 0x37EC, 8866 DiagaAlternateRfBlocksAndTpSelect_Tgl = 0x37F0, 8867 DiagaAlternateBridgeControl_Tgl = 0x37F4, 8868 RadioFrequencyLock0_Tgl = 0x37F8, 8869 RadioFrequencyLock1_Tgl = 0x37FC, 8870 } 8871 8872 private enum SynthesizerRegisters : long 8873 { 8874 IpVersion = 0x0000, 8875 Enable = 0x0004, 8876 Status = 0x0008, 8877 Command = 0x000C, 8878 Control = 0x0010, 8879 CalibrationControl = 0x0014, 8880 VCDACControl = 0x002C, 8881 Frequency = 0x0034, 8882 IntermediateFrequency = 0x0038, 8883 FrequencyDivisionControl = 0x003C, 8884 ChannelControl = 0x0040, 8885 ChannelSpacing = 0x0044, 8886 CalibrationOffset = 0x0048, 8887 VoltageControlledOscillatorFrequencyTuning = 0x004C, 8888 VoltageControlledOscillatorFrequencyRangeControl = 0x0054, 8889 VoltageControlledOscillatorGainCalibration = 0x0058, 8890 ChargePumpDigitalToAnalogConverterControl = 0x0068, 8891 CapacitorArrayCalibrationCycleCount = 0x006C, 8892 VoltageControlledOscillatorForceCalibrationCycleCount = 0x0070, 8893 InterruptFlags = 0x0078, 8894 InterruptEnable = 0x0084, 8895 LoCounterControl = 0x0088, 8896 LoCounterStatus = 0x008C, 8897 LoCounterTargetValue = 0x0090, 8898 MmdDenominatorInitialValue = 0x0094, 8899 ChargePumpDigitalToAnalogConverterInitialValue = 0x0098, 8900 LowPassFilterCalModeControl = 0x009C, 8901 LowPassFilterRxModeControl1 = 0x00A0, 8902 LowPassFilterTxModeControl1 = 0x00A4, 8903 LowPassFilterRxModeControl2 = 0x00A8, 8904 LowPassFilterTxModeControl2 = 0x00AC, 8905 DsmRxModeControl = 0x00B0, 8906 DsmTxModeControl = 0x00B4, 8907 SequencerInterruptFlags = 0x00B8, 8908 SequencerInterruptEnable = 0x00BC, 8909 8910 // Set registers 8911 IpVersion_Set = 0x1000, 8912 Enable_Set = 0x1004, 8913 Status_Set = 0x1008, 8914 Command_Set = 0x100C, 8915 Control_Set = 0x1010, 8916 CalibrationControl_Set = 0x1014, 8917 VCDACControl_Set = 0x102C, 8918 Frequency_Set = 0x1034, 8919 IntermediateFrequency_Set = 0x1038, 8920 FrequencyDivisionControl_Set = 0x103C, 8921 ChannelControl_Set = 0x1040, 8922 ChannelSpacing_Set = 0x1044, 8923 CalibrationOffset_Set = 0x1048, 8924 VoltageControlledOscillatorFrequencyTuning_Set = 0x104C, 8925 VoltageControlledOscillatorFrequencyRangeControl_Set = 0x1054, 8926 VoltageControlledOscillatorGainCalibration_Set = 0x1058, 8927 ChargePumpDigitalToAnalogConverterControl_Set = 0x1068, 8928 CapacitorArrayCalibrationCycleCount_Set = 0x106C, 8929 VoltageControlledOscillatorForceCalibrationCycleCount_Set = 0x1070, 8930 InterruptFlags_Set = 0x1078, 8931 InterruptEnable_Set = 0x1084, 8932 LoCounterControl_Set = 0x1088, 8933 LoCounterStatus_Set = 0x108C, 8934 LoCounterTargetValue_Set = 0x1090, 8935 MmdDenominatorInitialValue_Set = 0x1094, 8936 ChargePumpDigitalToAnalogConverterInitialValue_Set = 0x1098, 8937 LowPassFilterCalModeControl_Set = 0x109C, 8938 LowPassFilterRxModeControl1_Set = 0x10A0, 8939 LowPassFilterTxModeControl1_Set = 0x10A4, 8940 LowPassFilterRxModeControl2_Set = 0x10A8, 8941 LowPassFilterTxModeControl2_Set = 0x10AC, 8942 DsmRxModeControl_Set = 0x10B0, 8943 DsmTxModeControl_Set = 0x10B4, 8944 SequencerInterruptFlags_Set = 0x10B8, 8945 SequencerInterruptEnable_Set = 0x10BC, 8946 8947 // Clear registers 8948 IpVersion_Clr = 0x2000, 8949 Enable_Clr = 0x2004, 8950 Status_Clr = 0x2008, 8951 Command_Clr = 0x200C, 8952 Control_Clr = 0x2010, 8953 CalibrationControl_Clr = 0x2014, 8954 VCDACControl_Clr = 0x202C, 8955 Frequency_Clr = 0x2034, 8956 IntermediateFrequency_Clr = 0x2038, 8957 FrequencyDivisionControl_Clr = 0x203C, 8958 ChannelControl_Clr = 0x2040, 8959 ChannelSpacing_Clr = 0x2044, 8960 CalibrationOffset_Clr = 0x2048, 8961 VoltageControlledOscillatorFrequencyTuning_Clr = 0x204C, 8962 VoltageControlledOscillatorFrequencyRangeControl_Clr = 0x2054, 8963 VoltageControlledOscillatorGainCalibration_Clr = 0x2058, 8964 ChargePumpDigitalToAnalogConverterControl_Clr = 0x2068, 8965 CapacitorArrayCalibrationCycleCount_Clr = 0x206C, 8966 VoltageControlledOscillatorForceCalibrationCycleCount_Clr = 0x2070, 8967 InterruptFlags_Clr = 0x2078, 8968 InterruptEnable_Clr = 0x2084, 8969 LoCounterControl_Clr = 0x2088, 8970 LoCounterStatus_Clr = 0x208C, 8971 LoCounterTargetValue_Clr = 0x2090, 8972 MmdDenominatorInitialValue_Clr = 0x2094, 8973 ChargePumpDigitalToAnalogConverterInitialValue_Clr = 0x2098, 8974 LowPassFilterCalModeControl_Clr = 0x209C, 8975 LowPassFilterRxModeControl1_Clr = 0x20A0, 8976 LowPassFilterTxModeControl1_Clr = 0x20A4, 8977 LowPassFilterRxModeControl2_Clr = 0x20A8, 8978 LowPassFilterTxModeControl2_Clr = 0x20AC, 8979 DsmRxModeControl_Clr = 0x20B0, 8980 DsmTxModeControl_Clr = 0x20B4, 8981 SequencerInterruptFlags_Clr = 0x20B8, 8982 SequencerInterruptEnable_Clr = 0x20BC, 8983 8984 // Toggle registers 8985 IpVersion_Tgl = 0x3000, 8986 Enable_Tgl = 0x3004, 8987 Status_Tgl = 0x3008, 8988 Command_Tgl = 0x300C, 8989 Control_Tgl = 0x3010, 8990 CalibrationControl_Tgl = 0x3014, 8991 VCDACControl_Tgl = 0x302C, 8992 Frequency_Tgl = 0x3034, 8993 IntermediateFrequency_Tgl = 0x3038, 8994 FrequencyDivisionControl_Tgl = 0x303C, 8995 ChannelControl_Tgl = 0x3040, 8996 ChannelSpacing_Tgl = 0x3044, 8997 CalibrationOffset_Tgl = 0x3048, 8998 VoltageControlledOscillatorFrequencyTuning_Tgl = 0x304C, 8999 VoltageControlledOscillatorFrequencyRangeControl_Tgl = 0x3054, 9000 VoltageControlledOscillatorGainCalibration_Tgl = 0x3058, 9001 ChargePumpDigitalToAnalogConverterControl_Tgl = 0x3068, 9002 CapacitorArrayCalibrationCycleCount_Tgl = 0x306C, 9003 VoltageControlledOscillatorForceCalibrationCycleCount_Tgl = 0x3070, 9004 InterruptFlags_Tgl = 0x3078, 9005 InterruptEnable_Tgl = 0x3084, 9006 LoCounterControl_Tgl = 0x3088, 9007 LoCounterStatus_Tgl = 0x308C, 9008 LoCounterTargetValue_Tgl = 0x3090, 9009 MmdDenominatorInitialValue_Tgl = 0x3094, 9010 ChargePumpDigitalToAnalogConverterInitialValue_Tgl = 0x3098, 9011 LowPassFilterCalModeControl_Tgl = 0x309C, 9012 LowPassFilterRxModeControl1_Tgl = 0x30A0, 9013 LowPassFilterTxModeControl1_Tgl = 0x30A4, 9014 LowPassFilterRxModeControl2_Tgl = 0x30A8, 9015 LowPassFilterTxModeControl2_Tgl = 0x30AC, 9016 DsmRxModeControl_Tgl = 0x30B0, 9017 DsmTxModeControl_Tgl = 0x30B4, 9018 SequencerInterruptFlags_Tgl = 0x30B8, 9019 SequencerInterruptEnable_Tgl = 0x30BC, 9020 } 9021 private enum HostMailboxRegisters : long 9022 { 9023 MessagePointer0 = 0x0000, 9024 MessagePointer1 = 0x0004, 9025 MessagePointer2 = 0x0008, 9026 MessagePointer3 = 0x000C, 9027 InterruptFlags = 0x0040, 9028 InterruptEnable = 0x0044, 9029 9030 // Set Registers 9031 MessagePointer0_Set = 0x1000, 9032 MessagePointer1_Set = 0x1004, 9033 MessagePointer2_Set = 0x1008, 9034 MessagePointer3_Set = 0x100C, 9035 InterruptFlags_Set = 0x1040, 9036 InterruptEnable_Set = 0x1044, 9037 9038 // Clear Registers 9039 MessagePointer0_Clr = 0x2000, 9040 MessagePointer1_Clr = 0x2004, 9041 MessagePointer2_Clr = 0x2008, 9042 MessagePointer3_Clr = 0x200C, 9043 InterruptFlags_Clr = 0x2040, 9044 InterruptEnable_Clr = 0x2044, 9045 9046 // Toggle Registers 9047 MessagePointer0_Tgl = 0x3000, 9048 MessagePointer1_Tgl = 0x3004, 9049 MessagePointer2_Tgl = 0x3008, 9050 MessagePointer3_Tgl = 0x300C, 9051 InterruptFlags_Tgl = 0x3040, 9052 InterruptEnable_Tgl = 0x3044, 9053 } 9054 9055 private enum RadioMailboxRegisters : long 9056 { 9057 MessagePointer0 = 0x0000, 9058 MessagePointer1 = 0x0004, 9059 MessagePointer2 = 0x0008, 9060 MessagePointer3 = 0x000C, 9061 InterruptFlags = 0x0040, 9062 InterruptEnable = 0x0044, 9063 9064 // Set Registers 9065 MessagePointer0_Set = 0x1000, 9066 MessagePointer1_Set = 0x1004, 9067 MessagePointer2_Set = 0x1008, 9068 MessagePointer3_Set = 0x100C, 9069 InterruptFlags_Set = 0x1040, 9070 InterruptEnable_Set = 0x1044, 9071 9072 // Clear Registers 9073 MessagePointer0_Clr = 0x2000, 9074 MessagePointer1_Clr = 0x2004, 9075 MessagePointer2_Clr = 0x2008, 9076 MessagePointer3_Clr = 0x200C, 9077 InterruptFlags_Clr = 0x2040, 9078 InterruptEnable_Clr = 0x2044, 9079 9080 // Toggle Registers 9081 MessagePointer0_Tgl = 0x3000, 9082 MessagePointer1_Tgl = 0x3004, 9083 MessagePointer2_Tgl = 0x3008, 9084 MessagePointer3_Tgl = 0x300C, 9085 InterruptFlags_Tgl = 0x3040, 9086 InterruptEnable_Tgl = 0x3044, 9087 } 9088 #endregion 9089 9090 private class PROTIMER_TimeoutCounter 9091 { PROTIMER_TimeoutCounter(EFR32xG24_Radio parent, uint index)9092 public PROTIMER_TimeoutCounter(EFR32xG24_Radio parent, uint index) 9093 { 9094 this.parent = parent; 9095 this.index = index; 9096 } 9097 Start()9098 public void Start() 9099 { 9100 if(syncSource.Value != PROTIMER_TimeoutCounterSource.Disabled) 9101 { 9102 synchronizing.Value = true; 9103 running.Value = false; 9104 } 9105 else 9106 { 9107 running.Value = true; 9108 synchronizing.Value = false; 9109 counter.Value = counterTop.Value; 9110 preCounter.Value = preCounterTop.Value; 9111 } 9112 parent.PROTIMER_HandleChangedParams(); 9113 } 9114 Stop()9115 public void Stop() 9116 { 9117 running.Value = false; 9118 synchronizing.Value = false; 9119 Finished?.Invoke(); 9120 parent.PROTIMER_HandleChangedParams(); 9121 } 9122 Update(PROTIMER_TimeoutCounterSource evt, uint evtCount = 1)9123 public void Update(PROTIMER_TimeoutCounterSource evt, uint evtCount = 1) 9124 { 9125 // TODO: handle evtCount > PROTIMER_MinimumTimeoutCounterDelay 9126 if ((running.Value || synchronizing.Value) && evtCount > PROTIMER_MinimumTimeoutCounterDelay) 9127 { 9128 parent.Log(LogLevel.Error, "TOUT{0} Update() passed an evtCount > PROTIMER_MinimumTimeoutCounterDelay ({1})", index, evtCount); 9129 } 9130 9131 while(evtCount > 0) 9132 { 9133 if(running.Value && source.Value == evt) 9134 { 9135 if(preCounter.Value == 0) 9136 { 9137 preCounter.Value = preCounterTop.Value; 9138 9139 if(counter.Value == 0) 9140 { 9141 underflowInterrupt.Value = true; 9142 seqUnderflowInterrupt.Value = true; 9143 9144 if(mode.Value == PROTIMER_RepeatMode.OneShot) 9145 { 9146 running.Value = false; 9147 Finished?.Invoke(); 9148 } 9149 else 9150 { 9151 counter.Value = counterTop.Value; 9152 } 9153 parent.PROTIMER_TriggerEvent((PROTIMER_Event)((uint)PROTIMER_Event.TimeoutCounter0Underflow + this.index)); 9154 Underflowed?.Invoke(); 9155 } 9156 else 9157 { 9158 counter.Value -= 1; 9159 } 9160 } 9161 else 9162 { 9163 preCounter.Value -= 1; 9164 } 9165 9166 bool match = (counter.Value == counterCompare.Value && preCounter.Value == preCounterCompare.Value); 9167 9168 if (match) 9169 { 9170 matchInterrupt.Value |= match; 9171 seqMatchInterrupt.Value |= match; 9172 parent.UpdateInterrupts(); 9173 parent.PROTIMER_TriggerEvent((PROTIMER_Event)((uint)PROTIMER_Event.TimeoutCounter0Match + this.index)); 9174 } 9175 } 9176 9177 if(synchronizing.Value && syncSource.Value == evt) 9178 { 9179 synchronizing.Value = false; 9180 running.Value = true; 9181 counter.Value = counterTop.Value; 9182 preCounter.Value = preCounterTop.Value; 9183 Synchronized?.Invoke(); 9184 } 9185 9186 evtCount--; 9187 } 9188 } 9189 9190 private uint index; 9191 private EFR32xG24_Radio parent; 9192 public bool Interrupt => (underflowInterrupt.Value && underflowInterruptEnable.Value) 9193 || (matchInterrupt.Value && matchInterruptEnable.Value); 9194 public bool SeqInterrupt => (seqUnderflowInterrupt.Value && seqUnderflowInterruptEnable.Value) 9195 || (seqMatchInterrupt.Value && seqMatchInterruptEnable.Value); 9196 public event Action Synchronized; 9197 public event Action Underflowed; 9198 public event Action Finished; 9199 public IFlagRegisterField synchronizing; 9200 public IFlagRegisterField running; 9201 public IFlagRegisterField underflowInterrupt; 9202 public IFlagRegisterField underflowInterruptEnable; 9203 public IFlagRegisterField matchInterrupt; 9204 public IFlagRegisterField matchInterruptEnable; 9205 public IFlagRegisterField seqUnderflowInterrupt; 9206 public IFlagRegisterField seqUnderflowInterruptEnable; 9207 public IFlagRegisterField seqMatchInterrupt; 9208 public IFlagRegisterField seqMatchInterruptEnable; 9209 public IValueRegisterField counter; 9210 public IValueRegisterField counterCompare; 9211 public IValueRegisterField preCounter; 9212 public IValueRegisterField preCounterCompare; 9213 public IValueRegisterField counterTop; 9214 public IValueRegisterField preCounterTop; 9215 public IEnumRegisterField<PROTIMER_TimeoutCounterSource> source; 9216 public IEnumRegisterField<PROTIMER_TimeoutCounterSource> syncSource; 9217 public IEnumRegisterField<PROTIMER_RepeatMode> mode; 9218 } 9219 9220 private class PROTIMER_CaptureCompareChannel 9221 { PROTIMER_CaptureCompareChannel(EFR32xG24_Radio parent, uint index)9222 public PROTIMER_CaptureCompareChannel(EFR32xG24_Radio parent, uint index) 9223 { 9224 this.parent = parent; 9225 this.index = index; 9226 } 9227 Capture(ushort preVal, ushort baseVal, uint wrapVal)9228 public void Capture(ushort preVal, ushort baseVal, uint wrapVal) 9229 { 9230 if (captureValid.Value) 9231 { 9232 overflowInterrupt.Value = true; 9233 seqOverflowInterrupt.Value = true; 9234 } 9235 9236 captureValid.Value = true; 9237 interrupt.Value = true; 9238 seqInterrupt.Value = true; 9239 9240 preValue.Value = preVal; 9241 baseValue.Value = baseVal; 9242 wrapValue.Value = wrapVal; 9243 9244 parent.UpdateInterrupts(); 9245 } 9246 9247 public bool Interrupt => ((interrupt.Value && interruptEnable.Value) 9248 || (overflowInterrupt.Value && overflowInterruptEnable.Value)); 9249 9250 public bool SeqInterrupt => ((seqInterrupt.Value && seqInterruptEnable.Value) 9251 || (seqOverflowInterrupt.Value && seqOverflowInterruptEnable.Value)); 9252 9253 private EFR32xG24_Radio parent; 9254 private uint index; 9255 public IFlagRegisterField interrupt; 9256 public IFlagRegisterField interruptEnable; 9257 public IFlagRegisterField seqInterrupt; 9258 public IFlagRegisterField seqInterruptEnable; 9259 public IFlagRegisterField overflowInterrupt; 9260 public IFlagRegisterField overflowInterruptEnable; 9261 public IFlagRegisterField seqOverflowInterrupt; 9262 public IFlagRegisterField seqOverflowInterruptEnable; 9263 public IFlagRegisterField enable; 9264 public IEnumRegisterField<PROTIMER_CaptureCompareMode> mode; 9265 public IFlagRegisterField preMatchEnable; 9266 public IFlagRegisterField baseMatchEnable; 9267 public IFlagRegisterField wrapMatchEnable; 9268 public IEnumRegisterField<PROTIMER_CaptureInputSource> captureInputSource; 9269 public IValueRegisterField preValue; 9270 public IValueRegisterField baseValue; 9271 public IValueRegisterField wrapValue; 9272 public IFlagRegisterField captureValid; 9273 } 9274 9275 private class BUFC_Buffer 9276 { BUFC_Buffer(EFR32xG24_Radio parent, Machine machine, uint index)9277 public BUFC_Buffer(EFR32xG24_Radio parent, Machine machine, uint index) 9278 { 9279 this.parent = parent; 9280 this.machine = machine; 9281 this.index = index; 9282 } 9283 9284 public bool ReadReady => true; 9285 public bool Read32Ready => true; 9286 public uint Size => 64u << (int)sizeMode.Value; 9287 9288 public uint ReadOffset 9289 { 9290 get 9291 { 9292 return readOffset; 9293 } 9294 set 9295 { 9296 parent.Log(LogLevel.Noisy, "Buffer #{0}: Set ReadOffset={1}", index, value); 9297 readOffset = value; 9298 UpdateThresholdFlag(); 9299 } 9300 } 9301 9302 public uint WriteOffset 9303 { 9304 get 9305 { 9306 return writeOffset; 9307 } 9308 set 9309 { 9310 parent.Log(LogLevel.Noisy, "Buffer #{0}: Set WriteOffset={1}", index, value); 9311 writeOffset = value; 9312 UpdateThresholdFlag(); 9313 } 9314 } 9315 9316 public uint ReadData 9317 { 9318 get 9319 { 9320 if (BytesNumber == 0) 9321 { 9322 underflow.Value = true; 9323 seqUnderflow.Value = true; 9324 parent.Log(LogLevel.Noisy, "Buffer #{0}: Reading underflow Size={1} writeOffset={2} readOffset={3}", 9325 index, Size, WriteOffset, ReadOffset); 9326 parent.UpdateInterrupts(); 9327 return 0; 9328 } 9329 9330 var offset = (ulong)(address.Value + (ReadOffset % Size)); 9331 var value = machine.SystemBus.ReadByte(offset); 9332 var newOffset = (ReadOffset + 1) % (2 * Size); 9333 parent.Log(LogLevel.Noisy, "Buffer #{0}: Reading value 0x{1:X} at ram's offset 0x{2:X}, oldOffset={3} newOffset{4}", 9334 index, value, offset, ReadOffset, newOffset); 9335 ReadOffset = newOffset; 9336 return value; 9337 } 9338 } 9339 9340 public uint ReadData32 9341 { 9342 get 9343 { 9344 var offset = (ulong)(address.Value + (ReadOffset % Size)); 9345 uint value = 0; 9346 9347 // If we have less than 4 bytes available we still read the bytes we have. 9348 // ReadOffset does not advance. 9349 if (BytesNumber < 4) 9350 { 9351 underflow.Value = true; 9352 seqUnderflow.Value = true; 9353 var bytesRead = BytesNumber; 9354 for(uint i = 0; i < bytesRead; i++) 9355 { 9356 value = value | ((uint)machine.SystemBus.ReadByte(offset + i) << 8*(int)i); 9357 } 9358 parent.Log(LogLevel.Noisy, "Buffer #{0} underflow: Reading value (32bit) (partial {1} bytes) 0x{2:X} at ram's offset 0x{2:X}", 9359 index, bytesRead, value, offset); 9360 parent.UpdateInterrupts(); 9361 } 9362 else 9363 { 9364 value = machine.SystemBus.ReadDoubleWord(offset); 9365 var newOffset = (ReadOffset + 4) % (2 * Size); 9366 parent.Log(LogLevel.Noisy, "Buffer #{0}: Reading value (32bit) 0x{1:X} at ram's offset 0x{2:X}, oldOffset={3} newOffset={4}", 9367 index, value, offset, ReadOffset, newOffset); 9368 ReadOffset = newOffset; 9369 } 9370 9371 return value; 9372 } 9373 } 9374 9375 public uint WriteData 9376 { 9377 set 9378 { 9379 if (BytesNumber == Size) 9380 { 9381 overflow.Value = true; 9382 seqOverflow.Value = true; 9383 parent.Log(LogLevel.Noisy, "Buffer #{0}: Writing overflow Size={1} writeOffset={2} readOffset={3}", 9384 index, Size, WriteOffset, ReadOffset); 9385 parent.UpdateInterrupts(); 9386 return; 9387 } 9388 9389 var offset = (ulong)(address.Value + (WriteOffset % Size)); 9390 machine.SystemBus.WriteByte(offset, (byte)value); 9391 var newOffset = (WriteOffset + 1) % (2 * Size); 9392 parent.Log(LogLevel.Noisy, "Buffer #{0}: Writing value 0x{1:X} at ram's offset 0x{2:X}, oldOffset={3} newOffset={4}, readOffset={5}", 9393 index, value, offset, WriteOffset, newOffset, ReadOffset); 9394 WriteOffset = newOffset; 9395 } 9396 } 9397 9398 public uint WriteData32 9399 { 9400 set 9401 { 9402 if (BytesNumber > Size - 4) 9403 { 9404 overflow.Value = true; 9405 seqOverflow.Value = true; 9406 parent.Log(LogLevel.Noisy, "Buffer #{0}: Writing overflow (32bit) Size={1} writeOffset={2} readOffset={3}", 9407 index, Size, WriteOffset, ReadOffset); 9408 parent.UpdateInterrupts(); 9409 return; 9410 } 9411 9412 var offset = (ulong)(address.Value + (WriteOffset % Size)); 9413 machine.SystemBus.WriteDoubleWord(offset, value); 9414 var newOffset = (WriteOffset + 4) % (2 * Size); 9415 parent.Log(LogLevel.Noisy, "Buffer #{0}: Writing value (32bit) 0x{1:X} at ram's offset 0x{2:X}, oldOffset={3} newOffset={4} readOffset={5}", 9416 index, value, offset, WriteOffset, newOffset, ReadOffset); 9417 WriteOffset = newOffset; 9418 } 9419 } 9420 9421 public uint XorWriteData 9422 { 9423 set 9424 { 9425 if (BytesNumber == Size) 9426 { 9427 overflow.Value = true; 9428 seqOverflow.Value = true; 9429 parent.Log(LogLevel.Noisy, "Buffer #{0}: XOR Writing overflow Size={1} writeOffset={2} readOffset={3}", 9430 index, Size, WriteOffset, ReadOffset); 9431 parent.UpdateInterrupts(); 9432 return; 9433 } 9434 9435 var offset = (ulong)(address.Value + (WriteOffset % Size)); 9436 var oldData = machine.SystemBus.ReadByte(offset); 9437 var newData = (byte)(oldData ^ (byte)value); 9438 machine.SystemBus.WriteByte(offset, newData); 9439 var newOffset = (WriteOffset + 1) % (2* Size); 9440 parent.Log(LogLevel.Noisy, "Buffer #{0}: XOR Writing value 0x{1:X} (0x{2:X} ^ 0x{3:X}) at ram's offset 0x{4:X}, oldOffset={5} newOffset={6} readOffset={7}", 9441 index, newData, oldData, value, offset, WriteOffset, newOffset, ReadOffset); 9442 WriteOffset = newOffset; 9443 } 9444 } 9445 9446 public uint XorWriteData32 9447 { 9448 set 9449 { 9450 if (BytesNumber > (Size - 4)) 9451 { 9452 overflow.Value = true; 9453 seqOverflow.Value = true; 9454 parent.Log(LogLevel.Noisy, "Buffer #{0}: XOR Writing overflow (32bit) Size={1} writeOffset={2} readOffset={3}", 9455 index, Size, WriteOffset, ReadOffset); 9456 parent.UpdateInterrupts(); 9457 return; 9458 } 9459 9460 var offset = (ulong)(address.Value + (WriteOffset % Size)); 9461 var oldData = machine.SystemBus.ReadDoubleWord(offset); 9462 var newData = oldData ^ value; 9463 machine.SystemBus.WriteDoubleWord(offset, newData); 9464 var newOffset = (WriteOffset + 4) % (2 * Size); 9465 parent.Log(LogLevel.Noisy, "Buffer #{0}: XOR Writing value (32bit) 0x{1:X} (0x{2:X} ^ 0x{3:X}) at ram's offset 0x{4:X}, oldOffset={5} newOffset={6} readOffset={7}", 9466 index, newData, oldData, value, offset, WriteOffset, newOffset, ReadOffset); 9467 WriteOffset = newOffset; 9468 } 9469 } 9470 9471 public uint BytesNumber 9472 { 9473 get 9474 { 9475 return (uint)((WriteOffset - ReadOffset) % (2 * Size)); 9476 } 9477 } 9478 9479 public bool ThresholdFlag 9480 { 9481 get 9482 { 9483 bool flag = false; 9484 9485 switch(thresholdMode.Value) 9486 { 9487 case BUFC_ThresholdMode.Larger: 9488 if (BytesNumber > threshold.Value) 9489 { 9490 flag = true; 9491 } 9492 break; 9493 case BUFC_ThresholdMode.LessOrEqual: 9494 if (BytesNumber <= threshold.Value) 9495 { 9496 flag = true; 9497 } 9498 break; 9499 } 9500 9501 return flag; 9502 } 9503 } 9504 9505 public bool Interrupt => ((corrupt.Value && corruptEnable.Value) 9506 || (thresholdEvent.Value && thresholdEventEnable.Value) 9507 || (underflow.Value && underflowEnable.Value) 9508 || (overflow.Value && overflowEnable.Value) 9509 || (notWordAligned.Value && notWordAlignedEnable.Value)); 9510 9511 public bool SeqInterrupt => ((seqCorrupt.Value && seqCorruptEnable.Value) 9512 || (seqThresholdEvent.Value && seqThresholdEventEnable.Value) 9513 || (seqUnderflow.Value && seqUnderflowEnable.Value) 9514 || (seqOverflow.Value && seqOverflowEnable.Value) 9515 || (seqNotWordAligned.Value && seqNotWordAlignedEnable.Value)); 9516 Peek(uint index)9517 public uint Peek(uint index) 9518 { 9519 var offset = (ulong)(address.Value + ((ReadOffset + index) % Size)); 9520 9521 return machine.SystemBus.ReadByte(offset); 9522 } 9523 TryReadBytes(uint length, out byte[] data)9524 public bool TryReadBytes(uint length, out byte[] data) 9525 { 9526 bool savedUnderflowValue = underflow.Value; 9527 underflow.Value = false; 9528 bool retValue = true; 9529 data = new byte[length]; 9530 var i = 0; 9531 for(; i < data.Length; ++i) 9532 { 9533 var value = (byte)ReadData; 9534 if(underflow.Value) 9535 { 9536 retValue = false; 9537 break; 9538 } 9539 data[i] = value; 9540 } 9541 if(i != length) 9542 { 9543 Array.Resize(ref data, i); 9544 } 9545 if (savedUnderflowValue) 9546 { 9547 underflow.Value = true; 9548 } 9549 return retValue; 9550 } 9551 TryWriteBytes(byte[] data, out uint i)9552 public bool TryWriteBytes(byte[] data, out uint i) 9553 { 9554 bool savedOverflowValue = overflow.Value; 9555 overflow.Value = false; 9556 bool retValue = true; 9557 for(i = 0; i < data.Length; ++i) 9558 { 9559 WriteData = data[i]; 9560 if(overflow.Value) 9561 { 9562 retValue = false; 9563 break; 9564 } 9565 } 9566 if (savedOverflowValue) 9567 { 9568 overflow.Value = true; 9569 } 9570 return retValue; 9571 } 9572 Clear()9573 public void Clear() 9574 { 9575 parent.Log(LogLevel.Noisy, "Buffer #{0}: Clear", index); 9576 9577 // TODO: clear UF and OF interrupts? 9578 readOffset = 0; 9579 writeOffset = 0; 9580 UpdateThresholdFlag(); 9581 } 9582 Prefetch()9583 public void Prefetch() 9584 { 9585 // Issuing the PREFETCH command in an empty buffer results in an underflow. 9586 if (BytesNumber == 0) 9587 { 9588 parent.Log(LogLevel.Noisy, "Buffer #{0}: Prefetch while BytesNumber==0, underflow", index); 9589 9590 underflow.Value = true; 9591 seqUnderflow.Value = true; 9592 parent.UpdateInterrupts(); 9593 } 9594 } 9595 UpdateWriteStartOffset()9596 public void UpdateWriteStartOffset() 9597 { 9598 parent.Log(LogLevel.Noisy, "Buffer #{0}: Saving write offset {1}", index, writeOffset); 9599 writeStartOffset.Value = WriteOffset; 9600 } 9601 RestoreWriteOffset()9602 public void RestoreWriteOffset() 9603 { 9604 parent.Log(LogLevel.Noisy, "Buffer #{0}: Restoring write offset {1}", index, writeStartOffset.Value); 9605 WriteOffset = (uint)writeStartOffset.Value; 9606 UpdateThresholdFlag(); 9607 } 9608 UpdateThresholdFlag()9609 public void UpdateThresholdFlag() 9610 { 9611 parent.Log(LogLevel.Noisy, "Buffer #{0}: Updating Threshold flag", index); 9612 if (ThresholdFlag) 9613 { 9614 parent.Log(LogLevel.Noisy, "Buffer #{0}: Threshold flag set, bytes {1} threshold {2}", index, BytesNumber, threshold.Value); 9615 thresholdEvent.Value = true; 9616 seqThresholdEvent.Value = true; 9617 9618 parent.UpdateInterrupts(); 9619 } 9620 } 9621 9622 public IFlagRegisterField corrupt; 9623 public IFlagRegisterField corruptEnable; 9624 public IFlagRegisterField thresholdEvent; 9625 public IFlagRegisterField thresholdEventEnable; 9626 public IFlagRegisterField underflow; 9627 public IFlagRegisterField underflowEnable; 9628 public IFlagRegisterField overflow; 9629 public IFlagRegisterField overflowEnable; 9630 public IFlagRegisterField notWordAligned; 9631 public IFlagRegisterField notWordAlignedEnable; 9632 public IFlagRegisterField seqCorrupt; 9633 public IFlagRegisterField seqCorruptEnable; 9634 public IFlagRegisterField seqThresholdEvent; 9635 public IFlagRegisterField seqThresholdEventEnable; 9636 public IFlagRegisterField seqUnderflow; 9637 public IFlagRegisterField seqUnderflowEnable; 9638 public IFlagRegisterField seqOverflow; 9639 public IFlagRegisterField seqOverflowEnable; 9640 public IFlagRegisterField seqNotWordAligned; 9641 public IFlagRegisterField seqNotWordAlignedEnable; 9642 public IEnumRegisterField<BUFC_SizeMode> sizeMode; 9643 public IValueRegisterField address; 9644 public IValueRegisterField writeStartOffset; 9645 public IEnumRegisterField<BUFC_ThresholdMode> thresholdMode; 9646 public IValueRegisterField threshold; 9647 9648 private readonly EFR32xG24_Radio parent; 9649 private readonly Machine machine; 9650 private readonly uint index; 9651 private uint readOffset; 9652 private uint writeOffset; 9653 } 9654 9655 private class FRC_FrameDescriptor 9656 { 9657 public IValueRegisterField words; 9658 public IValueRegisterField buffer; 9659 public IFlagRegisterField includeCrc; 9660 public IFlagRegisterField calculateCrc; 9661 public IValueRegisterField crcSkipWords; 9662 public IFlagRegisterField skipWhitening; 9663 public IFlagRegisterField addTrailData; 9664 9665 // Magic FCD Words value of 0xFF means subframe length is infinite 9666 public uint? Words => words.Value == 0xFF ? null : (uint?)(words.Value + 1); 9667 public uint BufferIndex => (uint)buffer.Value; 9668 } 9669 } 9670 }