1 // 2 // Copyright (c) 2010 - 2020 Antmicro 3 // 4 // This file is licensed under the MIT License. 5 // Full license text is available in 'licenses/MIT.txt'. 6 // 7 8 using Antmicro.Renode.Core; 9 using Antmicro.Renode.Core.Structure.Registers; 10 11 namespace Antmicro.Renode.Peripherals.Miscellaneous 12 { 13 public class LiteX_SoC_Controller : BasicDoubleWordPeripheral, IKnownSize 14 { LiteX_SoC_Controller(IMachine machine)15 public LiteX_SoC_Controller(IMachine machine) : base(machine) 16 { 17 DefineRegisters(); 18 } 19 20 public long Size => 0x100; 21 DefineRegisters()22 private void DefineRegisters() 23 { 24 Registers.Reset.Define(this) 25 .WithTag("reset", 0, 1) 26 .WithReservedBits(1, 7) 27 .WithIgnoredBits(8, 24) 28 ; 29 30 Registers.Scratch0.Define(this, 0x12) 31 .WithValueField(0, 8, name: "scratch0") 32 .WithIgnoredBits(8, 24) 33 ; 34 35 Registers.Scratch1.Define(this, 0x34) 36 .WithValueField(0, 8, name: "scratch1") 37 .WithIgnoredBits(8, 24) 38 ; 39 40 Registers.Scratch2.Define(this, 0x56) 41 .WithValueField(0, 8, name: "scratch2") 42 .WithIgnoredBits(8, 24) 43 ; 44 45 Registers.Scratch3.Define(this, 0x78) 46 .WithValueField(0, 8, name: "scratch3") 47 .WithIgnoredBits(8, 24) 48 ; 49 50 Registers.BusErrors0.Define(this) 51 .WithTag("bus errors 0", 0, 8) 52 .WithIgnoredBits(8, 24) 53 ; 54 55 Registers.BusErrors1.Define(this) 56 .WithTag("bus errors 1", 0, 8) 57 .WithIgnoredBits(8, 24) 58 ; 59 60 Registers.BusErrors2.Define(this) 61 .WithTag("bus errors 2", 0, 8) 62 .WithIgnoredBits(8, 24) 63 ; 64 65 Registers.BusErrors3.Define(this) 66 .WithTag("bus errors 3", 0, 8) 67 .WithIgnoredBits(8, 24) 68 ; 69 } 70 71 private enum Registers 72 { 73 Reset = 0x0, 74 Scratch0 = 0x4, 75 Scratch1 = 0x8, 76 Scratch2 = 0xC, 77 Scratch3 = 0x10, 78 BusErrors0 = 0x14, 79 BusErrors1 = 0x18, 80 BusErrors2 = 0x1C, 81 BusErrors3 = 0x20 82 } 83 } 84 } 85