1# format of a line in this file: 2# <instruction name> <args> <opcode> 3# 4# <opcode> is given by specifying one or more range/value pairs: 5# hi..lo=value or bit=value or arg=value (e.g. 6..2=0x45 10=1 rd=0) 6# 7# <args> is one of vd, vs3, vs1, vs2, vm, nf, wd, simm5, zimm10, zimm11 8 9# configuration setting 10# https://github.com/riscv/riscv-v-spec/blob/master/vcfg-format.adoc 11vsetivli 31=1 30=1 zimm10 zimm 14..12=0x7 rd 6..0=0x57 12vsetvli 31=0 zimm11 rs1 14..12=0x7 rd 6..0=0x57 13vsetvl 31=1 30..25=0x0 rs2 rs1 14..12=0x7 rd 6..0=0x57 14 15# 16# Vector Loads and Store 17# https://github.com/riscv/riscv-v-spec/blob/master/vmem-format.adoc 18# 19# Vector Unit-Stride Instructions (including segment part) 20# https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#74-vector-unit-stride-instructions 21vlm.v 31..28=0 27..26=0 25=1 24..20=0xb rs1 14..12=0x0 vd 6..0=0x07 22vsm.v 31..28=0 27..26=0 25=1 24..20=0xb rs1 14..12=0x0 vs3 6..0=0x27 23vle8.v nf 28=0 27..26=0 vm 24..20=0 rs1 14..12=0x0 vd 6..0=0x07 24vle16.v nf 28=0 27..26=0 vm 24..20=0 rs1 14..12=0x5 vd 6..0=0x07 25vle32.v nf 28=0 27..26=0 vm 24..20=0 rs1 14..12=0x6 vd 6..0=0x07 26vle64.v nf 28=0 27..26=0 vm 24..20=0 rs1 14..12=0x7 vd 6..0=0x07 27vle128.v nf 28=1 27..26=0 vm 24..20=0 rs1 14..12=0x0 vd 6..0=0x07 28vle256.v nf 28=1 27..26=0 vm 24..20=0 rs1 14..12=0x5 vd 6..0=0x07 29vle512.v nf 28=1 27..26=0 vm 24..20=0 rs1 14..12=0x6 vd 6..0=0x07 30vle1024.v nf 28=1 27..26=0 vm 24..20=0 rs1 14..12=0x7 vd 6..0=0x07 31vse8.v nf 28=0 27..26=0 vm 24..20=0 rs1 14..12=0x0 vs3 6..0=0x27 32vse16.v nf 28=0 27..26=0 vm 24..20=0 rs1 14..12=0x5 vs3 6..0=0x27 33vse32.v nf 28=0 27..26=0 vm 24..20=0 rs1 14..12=0x6 vs3 6..0=0x27 34vse64.v nf 28=0 27..26=0 vm 24..20=0 rs1 14..12=0x7 vs3 6..0=0x27 35vse128.v nf 28=1 27..26=0 vm 24..20=0 rs1 14..12=0x0 vs3 6..0=0x27 36vse256.v nf 28=1 27..26=0 vm 24..20=0 rs1 14..12=0x5 vs3 6..0=0x27 37vse512.v nf 28=1 27..26=0 vm 24..20=0 rs1 14..12=0x6 vs3 6..0=0x27 38vse1024.v nf 28=1 27..26=0 vm 24..20=0 rs1 14..12=0x7 vs3 6..0=0x27 39 40# Vector Indexed-Unordered Instructions (including segment part) 41# https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#76-vector-indexed-instructions 42vluxei8.v nf 28=0 27..26=1 vm vs2 rs1 14..12=0x0 vd 6..0=0x07 43vluxei16.v nf 28=0 27..26=1 vm vs2 rs1 14..12=0x5 vd 6..0=0x07 44vluxei32.v nf 28=0 27..26=1 vm vs2 rs1 14..12=0x6 vd 6..0=0x07 45vluxei64.v nf 28=0 27..26=1 vm vs2 rs1 14..12=0x7 vd 6..0=0x07 46vluxei128.v nf 28=1 27..26=1 vm vs2 rs1 14..12=0x0 vd 6..0=0x07 47vluxei256.v nf 28=1 27..26=1 vm vs2 rs1 14..12=0x5 vd 6..0=0x07 48vluxei512.v nf 28=1 27..26=1 vm vs2 rs1 14..12=0x6 vd 6..0=0x07 49vluxei1024.v nf 28=1 27..26=1 vm vs2 rs1 14..12=0x7 vd 6..0=0x07 50vsuxei8.v nf 28=0 27..26=1 vm vs2 rs1 14..12=0x0 vs3 6..0=0x27 51vsuxei16.v nf 28=0 27..26=1 vm vs2 rs1 14..12=0x5 vs3 6..0=0x27 52vsuxei32.v nf 28=0 27..26=1 vm vs2 rs1 14..12=0x6 vs3 6..0=0x27 53vsuxei64.v nf 28=0 27..26=1 vm vs2 rs1 14..12=0x7 vs3 6..0=0x27 54vsuxei128.v nf 28=1 27..26=1 vm vs2 rs1 14..12=0x0 vs3 6..0=0x27 55vsuxei256.v nf 28=1 27..26=1 vm vs2 rs1 14..12=0x5 vs3 6..0=0x27 56vsuxei512.v nf 28=1 27..26=1 vm vs2 rs1 14..12=0x6 vs3 6..0=0x27 57vsuxei1024.v nf 28=1 27..26=1 vm vs2 rs1 14..12=0x7 vs3 6..0=0x27 58 59# Vector Strided Instructions (including segment part) 60# https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#75-vector-strided-instructions 61vlse8.v nf 28=0 27..26=2 vm rs2 rs1 14..12=0x0 vd 6..0=0x07 62vlse16.v nf 28=0 27..26=2 vm rs2 rs1 14..12=0x5 vd 6..0=0x07 63vlse32.v nf 28=0 27..26=2 vm rs2 rs1 14..12=0x6 vd 6..0=0x07 64vlse64.v nf 28=0 27..26=2 vm rs2 rs1 14..12=0x7 vd 6..0=0x07 65vlse128.v nf 28=1 27..26=2 vm rs2 rs1 14..12=0x0 vd 6..0=0x07 66vlse256.v nf 28=1 27..26=2 vm rs2 rs1 14..12=0x5 vd 6..0=0x07 67vlse512.v nf 28=1 27..26=2 vm rs2 rs1 14..12=0x6 vd 6..0=0x07 68vlse1024.v nf 28=1 27..26=2 vm rs2 rs1 14..12=0x7 vd 6..0=0x07 69vsse8.v nf 28=0 27..26=2 vm rs2 rs1 14..12=0x0 vs3 6..0=0x27 70vsse16.v nf 28=0 27..26=2 vm rs2 rs1 14..12=0x5 vs3 6..0=0x27 71vsse32.v nf 28=0 27..26=2 vm rs2 rs1 14..12=0x6 vs3 6..0=0x27 72vsse64.v nf 28=0 27..26=2 vm rs2 rs1 14..12=0x7 vs3 6..0=0x27 73vsse128.v nf 28=1 27..26=2 vm rs2 rs1 14..12=0x0 vs3 6..0=0x27 74vsse256.v nf 28=1 27..26=2 vm rs2 rs1 14..12=0x5 vs3 6..0=0x27 75vsse512.v nf 28=1 27..26=2 vm rs2 rs1 14..12=0x6 vs3 6..0=0x27 76vsse1024.v nf 28=1 27..26=2 vm rs2 rs1 14..12=0x7 vs3 6..0=0x27 77 78# Vector Indexed-Ordered Instructions (including segment part) 79# https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#76-vector-indexed-instructions 80vloxei8.v nf 28=0 27..26=3 vm vs2 rs1 14..12=0x0 vd 6..0=0x07 81vloxei16.v nf 28=0 27..26=3 vm vs2 rs1 14..12=0x5 vd 6..0=0x07 82vloxei32.v nf 28=0 27..26=3 vm vs2 rs1 14..12=0x6 vd 6..0=0x07 83vloxei64.v nf 28=0 27..26=3 vm vs2 rs1 14..12=0x7 vd 6..0=0x07 84vloxei128.v nf 28=1 27..26=3 vm vs2 rs1 14..12=0x0 vd 6..0=0x07 85vloxei256.v nf 28=1 27..26=3 vm vs2 rs1 14..12=0x5 vd 6..0=0x07 86vloxei512.v nf 28=1 27..26=3 vm vs2 rs1 14..12=0x6 vd 6..0=0x07 87vloxei1024.v nf 28=1 27..26=3 vm vs2 rs1 14..12=0x7 vd 6..0=0x07 88vsoxei8.v nf 28=0 27..26=3 vm vs2 rs1 14..12=0x0 vs3 6..0=0x27 89vsoxei16.v nf 28=0 27..26=3 vm vs2 rs1 14..12=0x5 vs3 6..0=0x27 90vsoxei32.v nf 28=0 27..26=3 vm vs2 rs1 14..12=0x6 vs3 6..0=0x27 91vsoxei64.v nf 28=0 27..26=3 vm vs2 rs1 14..12=0x7 vs3 6..0=0x27 92vsoxei128.v nf 28=1 27..26=3 vm vs2 rs1 14..12=0x0 vs3 6..0=0x27 93vsoxei256.v nf 28=1 27..26=3 vm vs2 rs1 14..12=0x5 vs3 6..0=0x27 94vsoxei512.v nf 28=1 27..26=3 vm vs2 rs1 14..12=0x6 vs3 6..0=0x27 95vsoxei1024.v nf 28=1 27..26=3 vm vs2 rs1 14..12=0x7 vs3 6..0=0x27 96 97# Unit-stride F31..29=0ault-Only-First Loads 98# https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#77-unit-stride-fault-only-first-loads 99vle8ff.v nf 28=0 27..26=0 vm 24..20=0x10 rs1 14..12=0x0 vd 6..0=0x07 100vle16ff.v nf 28=0 27..26=0 vm 24..20=0x10 rs1 14..12=0x5 vd 6..0=0x07 101vle32ff.v nf 28=0 27..26=0 vm 24..20=0x10 rs1 14..12=0x6 vd 6..0=0x07 102vle64ff.v nf 28=0 27..26=0 vm 24..20=0x10 rs1 14..12=0x7 vd 6..0=0x07 103vle128ff.v nf 28=1 27..26=0 vm 24..20=0x10 rs1 14..12=0x0 vd 6..0=0x07 104vle256ff.v nf 28=1 27..26=0 vm 24..20=0x10 rs1 14..12=0x5 vd 6..0=0x07 105vle512ff.v nf 28=1 27..26=0 vm 24..20=0x10 rs1 14..12=0x6 vd 6..0=0x07 106vle1024ff.v nf 28=1 27..26=0 vm 24..20=0x10 rs1 14..12=0x7 vd 6..0=0x07 107 108# Vector Load/Store Whole Registers 109# https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#79-vector-loadstore-whole-register-instructions 110vl1re8.v 31..29=0 28=0 27..26=0 25=1 24..20=0x08 rs1 14..12=0x0 vd 6..0=0x07 111vl1re16.v 31..29=0 28=0 27..26=0 25=1 24..20=0x08 rs1 14..12=0x5 vd 6..0=0x07 112vl1re32.v 31..29=0 28=0 27..26=0 25=1 24..20=0x08 rs1 14..12=0x6 vd 6..0=0x07 113vl1re64.v 31..29=0 28=0 27..26=0 25=1 24..20=0x08 rs1 14..12=0x7 vd 6..0=0x07 114vl2re8.v 31..29=1 28=0 27..26=0 25=1 24..20=0x08 rs1 14..12=0x0 vd 6..0=0x07 115vl2re16.v 31..29=1 28=0 27..26=0 25=1 24..20=0x08 rs1 14..12=0x5 vd 6..0=0x07 116vl2re32.v 31..29=1 28=0 27..26=0 25=1 24..20=0x08 rs1 14..12=0x6 vd 6..0=0x07 117vl2re64.v 31..29=1 28=0 27..26=0 25=1 24..20=0x08 rs1 14..12=0x7 vd 6..0=0x07 118vl4re8.v 31..29=3 28=0 27..26=0 25=1 24..20=0x08 rs1 14..12=0x0 vd 6..0=0x07 119vl4re16.v 31..29=3 28=0 27..26=0 25=1 24..20=0x08 rs1 14..12=0x5 vd 6..0=0x07 120vl4re32.v 31..29=3 28=0 27..26=0 25=1 24..20=0x08 rs1 14..12=0x6 vd 6..0=0x07 121vl4re64.v 31..29=3 28=0 27..26=0 25=1 24..20=0x08 rs1 14..12=0x7 vd 6..0=0x07 122vl8re8.v 31..29=7 28=0 27..26=0 25=1 24..20=0x08 rs1 14..12=0x0 vd 6..0=0x07 123vl8re16.v 31..29=7 28=0 27..26=0 25=1 24..20=0x08 rs1 14..12=0x5 vd 6..0=0x07 124vl8re32.v 31..29=7 28=0 27..26=0 25=1 24..20=0x08 rs1 14..12=0x6 vd 6..0=0x07 125vl8re64.v 31..29=7 28=0 27..26=0 25=1 24..20=0x08 rs1 14..12=0x7 vd 6..0=0x07 126vs1r.v 31..29=0 28=0 27..26=0 25=1 24..20=0x08 rs1 14..12=0x0 vs3 6..0=0x27 127vs2r.v 31..29=1 28=0 27..26=0 25=1 24..20=0x08 rs1 14..12=0x0 vs3 6..0=0x27 128vs4r.v 31..29=3 28=0 27..26=0 25=1 24..20=0x08 rs1 14..12=0x0 vs3 6..0=0x27 129vs8r.v 31..29=7 28=0 27..26=0 25=1 24..20=0x08 rs1 14..12=0x0 vs3 6..0=0x27 130 131# Vector Floating-Point Instructions 132# https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#14-vector-floating-point-instructions 133# OPFVF 134vfadd.vf 31..26=0x00 vm vs2 rs1 14..12=0x5 vd 6..0=0x57 135vfsub.vf 31..26=0x02 vm vs2 rs1 14..12=0x5 vd 6..0=0x57 136vfmin.vf 31..26=0x04 vm vs2 rs1 14..12=0x5 vd 6..0=0x57 137vfmax.vf 31..26=0x06 vm vs2 rs1 14..12=0x5 vd 6..0=0x57 138vfsgnj.vf 31..26=0x08 vm vs2 rs1 14..12=0x5 vd 6..0=0x57 139vfsgnjn.vf 31..26=0x09 vm vs2 rs1 14..12=0x5 vd 6..0=0x57 140vfsgnjx.vf 31..26=0x0a vm vs2 rs1 14..12=0x5 vd 6..0=0x57 141vfslide1up.vf 31..26=0x0e vm vs2 rs1 14..12=0x5 vd 6..0=0x57 142vfslide1down.vf 31..26=0x0f vm vs2 rs1 14..12=0x5 vd 6..0=0x57 143vfmv.s.f 31..26=0x10 25=1 24..20=0 rs1 14..12=0x5 vd 6..0=0x57 144 145vfmerge.vfm 31..26=0x17 25=0 vs2 rs1 14..12=0x5 vd 6..0=0x57 146vfmv.v.f 31..26=0x17 25=1 24..20=0 rs1 14..12=0x5 vd 6..0=0x57 147vmfeq.vf 31..26=0x18 vm vs2 rs1 14..12=0x5 vd 6..0=0x57 148vmfle.vf 31..26=0x19 vm vs2 rs1 14..12=0x5 vd 6..0=0x57 149vmflt.vf 31..26=0x1b vm vs2 rs1 14..12=0x5 vd 6..0=0x57 150vmfne.vf 31..26=0x1c vm vs2 rs1 14..12=0x5 vd 6..0=0x57 151vmfgt.vf 31..26=0x1d vm vs2 rs1 14..12=0x5 vd 6..0=0x57 152vmfge.vf 31..26=0x1f vm vs2 rs1 14..12=0x5 vd 6..0=0x57 153 154vfdiv.vf 31..26=0x20 vm vs2 rs1 14..12=0x5 vd 6..0=0x57 155vfrdiv.vf 31..26=0x21 vm vs2 rs1 14..12=0x5 vd 6..0=0x57 156vfmul.vf 31..26=0x24 vm vs2 rs1 14..12=0x5 vd 6..0=0x57 157vfrsub.vf 31..26=0x27 vm vs2 rs1 14..12=0x5 vd 6..0=0x57 158vfmadd.vf 31..26=0x28 vm vs2 rs1 14..12=0x5 vd 6..0=0x57 159vfnmadd.vf 31..26=0x29 vm vs2 rs1 14..12=0x5 vd 6..0=0x57 160vfmsub.vf 31..26=0x2a vm vs2 rs1 14..12=0x5 vd 6..0=0x57 161vfnmsub.vf 31..26=0x2b vm vs2 rs1 14..12=0x5 vd 6..0=0x57 162vfmacc.vf 31..26=0x2c vm vs2 rs1 14..12=0x5 vd 6..0=0x57 163vfnmacc.vf 31..26=0x2d vm vs2 rs1 14..12=0x5 vd 6..0=0x57 164vfmsac.vf 31..26=0x2e vm vs2 rs1 14..12=0x5 vd 6..0=0x57 165vfnmsac.vf 31..26=0x2f vm vs2 rs1 14..12=0x5 vd 6..0=0x57 166 167vfwadd.vf 31..26=0x30 vm vs2 rs1 14..12=0x5 vd 6..0=0x57 168vfwsub.vf 31..26=0x32 vm vs2 rs1 14..12=0x5 vd 6..0=0x57 169vfwadd.wf 31..26=0x34 vm vs2 rs1 14..12=0x5 vd 6..0=0x57 170vfwsub.wf 31..26=0x36 vm vs2 rs1 14..12=0x5 vd 6..0=0x57 171vfwmul.vf 31..26=0x38 vm vs2 rs1 14..12=0x5 vd 6..0=0x57 172vfwmacc.vf 31..26=0x3c vm vs2 rs1 14..12=0x5 vd 6..0=0x57 173vfwnmacc.vf 31..26=0x3d vm vs2 rs1 14..12=0x5 vd 6..0=0x57 174vfwmsac.vf 31..26=0x3e vm vs2 rs1 14..12=0x5 vd 6..0=0x57 175vfwnmsac.vf 31..26=0x3f vm vs2 rs1 14..12=0x5 vd 6..0=0x57 176 177# OPFVV 178vfadd.vv 31..26=0x00 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 179vfredusum.vs 31..26=0x01 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 180vfsub.vv 31..26=0x02 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 181vfredosum.vs 31..26=0x03 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 182vfmin.vv 31..26=0x04 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 183vfredmin.vs 31..26=0x05 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 184vfmax.vv 31..26=0x06 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 185vfredmax.vs 31..26=0x07 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 186vfsgnj.vv 31..26=0x08 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 187vfsgnjn.vv 31..26=0x09 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 188vfsgnjx.vv 31..26=0x0a vm vs2 vs1 14..12=0x1 vd 6..0=0x57 189vfmv.f.s 31..26=0x10 25=1 vs2 19..15=0 14..12=0x1 rd 6..0=0x57 190 191vmfeq.vv 31..26=0x18 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 192vmfle.vv 31..26=0x19 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 193vmflt.vv 31..26=0x1b vm vs2 vs1 14..12=0x1 vd 6..0=0x57 194vmfne.vv 31..26=0x1c vm vs2 vs1 14..12=0x1 vd 6..0=0x57 195 196vfdiv.vv 31..26=0x20 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 197vfmul.vv 31..26=0x24 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 198vfmadd.vv 31..26=0x28 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 199vfnmadd.vv 31..26=0x29 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 200vfmsub.vv 31..26=0x2a vm vs2 vs1 14..12=0x1 vd 6..0=0x57 201vfnmsub.vv 31..26=0x2b vm vs2 vs1 14..12=0x1 vd 6..0=0x57 202vfmacc.vv 31..26=0x2c vm vs2 vs1 14..12=0x1 vd 6..0=0x57 203vfnmacc.vv 31..26=0x2d vm vs2 vs1 14..12=0x1 vd 6..0=0x57 204vfmsac.vv 31..26=0x2e vm vs2 vs1 14..12=0x1 vd 6..0=0x57 205vfnmsac.vv 31..26=0x2f vm vs2 vs1 14..12=0x1 vd 6..0=0x57 206 207vfcvt.xu.f.v 31..26=0x12 vm vs2 19..15=0x00 14..12=0x1 vd 6..0=0x57 208vfcvt.x.f.v 31..26=0x12 vm vs2 19..15=0x01 14..12=0x1 vd 6..0=0x57 209vfcvt.f.xu.v 31..26=0x12 vm vs2 19..15=0x02 14..12=0x1 vd 6..0=0x57 210vfcvt.f.x.v 31..26=0x12 vm vs2 19..15=0x03 14..12=0x1 vd 6..0=0x57 211vfcvt.rtz.xu.f.v 31..26=0x12 vm vs2 19..15=0x06 14..12=0x1 vd 6..0=0x57 212vfcvt.rtz.x.f.v 31..26=0x12 vm vs2 19..15=0x07 14..12=0x1 vd 6..0=0x57 213 214vfwcvt.xu.f.v 31..26=0x12 vm vs2 19..15=0x08 14..12=0x1 vd 6..0=0x57 215vfwcvt.x.f.v 31..26=0x12 vm vs2 19..15=0x09 14..12=0x1 vd 6..0=0x57 216vfwcvt.f.xu.v 31..26=0x12 vm vs2 19..15=0x0A 14..12=0x1 vd 6..0=0x57 217vfwcvt.f.x.v 31..26=0x12 vm vs2 19..15=0x0B 14..12=0x1 vd 6..0=0x57 218vfwcvt.f.f.v 31..26=0x12 vm vs2 19..15=0x0C 14..12=0x1 vd 6..0=0x57 219vfwcvt.rtz.xu.f.v 31..26=0x12 vm vs2 19..15=0x0E 14..12=0x1 vd 6..0=0x57 220vfwcvt.rtz.x.f.v 31..26=0x12 vm vs2 19..15=0x0F 14..12=0x1 vd 6..0=0x57 221 222vfncvt.xu.f.w 31..26=0x12 vm vs2 19..15=0x10 14..12=0x1 vd 6..0=0x57 223vfncvt.x.f.w 31..26=0x12 vm vs2 19..15=0x11 14..12=0x1 vd 6..0=0x57 224vfncvt.f.xu.w 31..26=0x12 vm vs2 19..15=0x12 14..12=0x1 vd 6..0=0x57 225vfncvt.f.x.w 31..26=0x12 vm vs2 19..15=0x13 14..12=0x1 vd 6..0=0x57 226vfncvt.f.f.w 31..26=0x12 vm vs2 19..15=0x14 14..12=0x1 vd 6..0=0x57 227vfncvt.rod.f.f.w 31..26=0x12 vm vs2 19..15=0x15 14..12=0x1 vd 6..0=0x57 228vfncvt.rtz.xu.f.w 31..26=0x12 vm vs2 19..15=0x16 14..12=0x1 vd 6..0=0x57 229vfncvt.rtz.x.f.w 31..26=0x12 vm vs2 19..15=0x17 14..12=0x1 vd 6..0=0x57 230 231vfsqrt.v 31..26=0x13 vm vs2 19..15=0x00 14..12=0x1 vd 6..0=0x57 232vfrsqrt7.v 31..26=0x13 vm vs2 19..15=0x04 14..12=0x1 vd 6..0=0x57 233vfrec7.v 31..26=0x13 vm vs2 19..15=0x05 14..12=0x1 vd 6..0=0x57 234vfclass.v 31..26=0x13 vm vs2 19..15=0x10 14..12=0x1 vd 6..0=0x57 235 236vfwadd.vv 31..26=0x30 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 237vfwredusum.vs 31..26=0x31 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 238vfwsub.vv 31..26=0x32 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 239vfwredosum.vs 31..26=0x33 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 240vfwadd.wv 31..26=0x34 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 241vfwsub.wv 31..26=0x36 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 242vfwmul.vv 31..26=0x38 vm vs2 vs1 14..12=0x1 vd 6..0=0x57 243vfwmacc.vv 31..26=0x3c vm vs2 vs1 14..12=0x1 vd 6..0=0x57 244vfwnmacc.vv 31..26=0x3d vm vs2 vs1 14..12=0x1 vd 6..0=0x57 245vfwmsac.vv 31..26=0x3e vm vs2 vs1 14..12=0x1 vd 6..0=0x57 246vfwnmsac.vv 31..26=0x3f vm vs2 vs1 14..12=0x1 vd 6..0=0x57 247 248# OPIVX 249vadd.vx 31..26=0x00 vm vs2 rs1 14..12=0x4 vd 6..0=0x57 250vsub.vx 31..26=0x02 vm vs2 rs1 14..12=0x4 vd 6..0=0x57 251vrsub.vx 31..26=0x03 vm vs2 rs1 14..12=0x4 vd 6..0=0x57 252vminu.vx 31..26=0x04 vm vs2 rs1 14..12=0x4 vd 6..0=0x57 253vmin.vx 31..26=0x05 vm vs2 rs1 14..12=0x4 vd 6..0=0x57 254vmaxu.vx 31..26=0x06 vm vs2 rs1 14..12=0x4 vd 6..0=0x57 255vmax.vx 31..26=0x07 vm vs2 rs1 14..12=0x4 vd 6..0=0x57 256vand.vx 31..26=0x09 vm vs2 rs1 14..12=0x4 vd 6..0=0x57 257vor.vx 31..26=0x0a vm vs2 rs1 14..12=0x4 vd 6..0=0x57 258vxor.vx 31..26=0x0b vm vs2 rs1 14..12=0x4 vd 6..0=0x57 259vrgather.vx 31..26=0x0c vm vs2 rs1 14..12=0x4 vd 6..0=0x57 260vslideup.vx 31..26=0x0e vm vs2 rs1 14..12=0x4 vd 6..0=0x57 261vslidedown.vx 31..26=0x0f vm vs2 rs1 14..12=0x4 vd 6..0=0x57 262 263vadc.vxm 31..26=0x10 25=0 vs2 rs1 14..12=0x4 vd 6..0=0x57 264vmadc.vxm 31..26=0x11 25=0 vs2 rs1 14..12=0x4 vd 6..0=0x57 265vmadc.vx 31..26=0x11 25=1 vs2 rs1 14..12=0x4 vd 6..0=0x57 266vsbc.vxm 31..26=0x12 25=0 vs2 rs1 14..12=0x4 vd 6..0=0x57 267vmsbc.vxm 31..26=0x13 25=0 vs2 rs1 14..12=0x4 vd 6..0=0x57 268vmsbc.vx 31..26=0x13 25=1 vs2 rs1 14..12=0x4 vd 6..0=0x57 269vmerge.vxm 31..26=0x17 25=0 vs2 rs1 14..12=0x4 vd 6..0=0x57 270vmv.v.x 31..26=0x17 25=1 24..20=0 rs1 14..12=0x4 vd 6..0=0x57 271vmseq.vx 31..26=0x18 vm vs2 rs1 14..12=0x4 vd 6..0=0x57 272vmsne.vx 31..26=0x19 vm vs2 rs1 14..12=0x4 vd 6..0=0x57 273vmsltu.vx 31..26=0x1a vm vs2 rs1 14..12=0x4 vd 6..0=0x57 274vmslt.vx 31..26=0x1b vm vs2 rs1 14..12=0x4 vd 6..0=0x57 275vmsleu.vx 31..26=0x1c vm vs2 rs1 14..12=0x4 vd 6..0=0x57 276vmsle.vx 31..26=0x1d vm vs2 rs1 14..12=0x4 vd 6..0=0x57 277vmsgtu.vx 31..26=0x1e vm vs2 rs1 14..12=0x4 vd 6..0=0x57 278vmsgt.vx 31..26=0x1f vm vs2 rs1 14..12=0x4 vd 6..0=0x57 279 280vsaddu.vx 31..26=0x20 vm vs2 rs1 14..12=0x4 vd 6..0=0x57 281vsadd.vx 31..26=0x21 vm vs2 rs1 14..12=0x4 vd 6..0=0x57 282vssubu.vx 31..26=0x22 vm vs2 rs1 14..12=0x4 vd 6..0=0x57 283vssub.vx 31..26=0x23 vm vs2 rs1 14..12=0x4 vd 6..0=0x57 284vsll.vx 31..26=0x25 vm vs2 rs1 14..12=0x4 vd 6..0=0x57 285vsmul.vx 31..26=0x27 vm vs2 rs1 14..12=0x4 vd 6..0=0x57 286vsrl.vx 31..26=0x28 vm vs2 rs1 14..12=0x4 vd 6..0=0x57 287vsra.vx 31..26=0x29 vm vs2 rs1 14..12=0x4 vd 6..0=0x57 288vssrl.vx 31..26=0x2a vm vs2 rs1 14..12=0x4 vd 6..0=0x57 289vssra.vx 31..26=0x2b vm vs2 rs1 14..12=0x4 vd 6..0=0x57 290vnsrl.wx 31..26=0x2c vm vs2 rs1 14..12=0x4 vd 6..0=0x57 291vnsra.wx 31..26=0x2d vm vs2 rs1 14..12=0x4 vd 6..0=0x57 292vnclipu.wx 31..26=0x2e vm vs2 rs1 14..12=0x4 vd 6..0=0x57 293vnclip.wx 31..26=0x2f vm vs2 rs1 14..12=0x4 vd 6..0=0x57 294 295# OPIVV 296vadd.vv 31..26=0x00 vm vs2 vs1 14..12=0x0 vd 6..0=0x57 297vsub.vv 31..26=0x02 vm vs2 vs1 14..12=0x0 vd 6..0=0x57 298vminu.vv 31..26=0x04 vm vs2 vs1 14..12=0x0 vd 6..0=0x57 299vmin.vv 31..26=0x05 vm vs2 vs1 14..12=0x0 vd 6..0=0x57 300vmaxu.vv 31..26=0x06 vm vs2 vs1 14..12=0x0 vd 6..0=0x57 301vmax.vv 31..26=0x07 vm vs2 vs1 14..12=0x0 vd 6..0=0x57 302vand.vv 31..26=0x09 vm vs2 vs1 14..12=0x0 vd 6..0=0x57 303vor.vv 31..26=0x0a vm vs2 vs1 14..12=0x0 vd 6..0=0x57 304vxor.vv 31..26=0x0b vm vs2 vs1 14..12=0x0 vd 6..0=0x57 305vrgather.vv 31..26=0x0c vm vs2 vs1 14..12=0x0 vd 6..0=0x57 306vrgatherei16.vv 31..26=0x0e vm vs2 vs1 14..12=0x0 vd 6..0=0x57 307 308vadc.vvm 31..26=0x10 25=0 vs2 vs1 14..12=0x0 vd 6..0=0x57 309vmadc.vvm 31..26=0x11 25=0 vs2 vs1 14..12=0x0 vd 6..0=0x57 310vmadc.vv 31..26=0x11 25=1 vs2 vs1 14..12=0x0 vd 6..0=0x57 311vsbc.vvm 31..26=0x12 25=0 vs2 vs1 14..12=0x0 vd 6..0=0x57 312vmsbc.vvm 31..26=0x13 25=0 vs2 vs1 14..12=0x0 vd 6..0=0x57 313vmsbc.vv 31..26=0x13 25=1 vs2 vs1 14..12=0x0 vd 6..0=0x57 314vmerge.vvm 31..26=0x17 25=0 vs2 vs1 14..12=0x0 vd 6..0=0x57 315vmv.v.v 31..26=0x17 25=1 24..20=0 vs1 14..12=0x0 vd 6..0=0x57 316vmseq.vv 31..26=0x18 vm vs2 vs1 14..12=0x0 vd 6..0=0x57 317vmsne.vv 31..26=0x19 vm vs2 vs1 14..12=0x0 vd 6..0=0x57 318vmsltu.vv 31..26=0x1a vm vs2 vs1 14..12=0x0 vd 6..0=0x57 319vmslt.vv 31..26=0x1b vm vs2 vs1 14..12=0x0 vd 6..0=0x57 320vmsleu.vv 31..26=0x1c vm vs2 vs1 14..12=0x0 vd 6..0=0x57 321vmsle.vv 31..26=0x1d vm vs2 vs1 14..12=0x0 vd 6..0=0x57 322 323vsaddu.vv 31..26=0x20 vm vs2 vs1 14..12=0x0 vd 6..0=0x57 324vsadd.vv 31..26=0x21 vm vs2 vs1 14..12=0x0 vd 6..0=0x57 325vssubu.vv 31..26=0x22 vm vs2 vs1 14..12=0x0 vd 6..0=0x57 326vssub.vv 31..26=0x23 vm vs2 vs1 14..12=0x0 vd 6..0=0x57 327vsll.vv 31..26=0x25 vm vs2 vs1 14..12=0x0 vd 6..0=0x57 328vsmul.vv 31..26=0x27 vm vs2 vs1 14..12=0x0 vd 6..0=0x57 329vsrl.vv 31..26=0x28 vm vs2 vs1 14..12=0x0 vd 6..0=0x57 330vsra.vv 31..26=0x29 vm vs2 vs1 14..12=0x0 vd 6..0=0x57 331vssrl.vv 31..26=0x2a vm vs2 vs1 14..12=0x0 vd 6..0=0x57 332vssra.vv 31..26=0x2b vm vs2 vs1 14..12=0x0 vd 6..0=0x57 333vnsrl.wv 31..26=0x2c vm vs2 vs1 14..12=0x0 vd 6..0=0x57 334vnsra.wv 31..26=0x2d vm vs2 vs1 14..12=0x0 vd 6..0=0x57 335vnclipu.wv 31..26=0x2e vm vs2 vs1 14..12=0x0 vd 6..0=0x57 336vnclip.wv 31..26=0x2f vm vs2 vs1 14..12=0x0 vd 6..0=0x57 337 338vwredsumu.vs 31..26=0x30 vm vs2 vs1 14..12=0x0 vd 6..0=0x57 339vwredsum.vs 31..26=0x31 vm vs2 vs1 14..12=0x0 vd 6..0=0x57 340 341# OPIVI 342vadd.vi 31..26=0x00 vm vs2 simm5 14..12=0x3 vd 6..0=0x57 343vrsub.vi 31..26=0x03 vm vs2 simm5 14..12=0x3 vd 6..0=0x57 344vand.vi 31..26=0x09 vm vs2 simm5 14..12=0x3 vd 6..0=0x57 345vor.vi 31..26=0x0a vm vs2 simm5 14..12=0x3 vd 6..0=0x57 346vxor.vi 31..26=0x0b vm vs2 simm5 14..12=0x3 vd 6..0=0x57 347vrgather.vi 31..26=0x0c vm vs2 simm5 14..12=0x3 vd 6..0=0x57 348vslideup.vi 31..26=0x0e vm vs2 simm5 14..12=0x3 vd 6..0=0x57 349vslidedown.vi 31..26=0x0f vm vs2 simm5 14..12=0x3 vd 6..0=0x57 350 351vadc.vim 31..26=0x10 25=0 vs2 simm5 14..12=0x3 vd 6..0=0x57 352vmadc.vim 31..26=0x11 25=0 vs2 simm5 14..12=0x3 vd 6..0=0x57 353vmadc.vi 31..26=0x11 25=1 vs2 simm5 14..12=0x3 vd 6..0=0x57 354vmerge.vim 31..26=0x17 25=0 vs2 simm5 14..12=0x3 vd 6..0=0x57 355vmv.v.i 31..26=0x17 25=1 24..20=0 simm5 14..12=0x3 vd 6..0=0x57 356vmseq.vi 31..26=0x18 vm vs2 simm5 14..12=0x3 vd 6..0=0x57 357vmsne.vi 31..26=0x19 vm vs2 simm5 14..12=0x3 vd 6..0=0x57 358vmsleu.vi 31..26=0x1c vm vs2 simm5 14..12=0x3 vd 6..0=0x57 359vmsle.vi 31..26=0x1d vm vs2 simm5 14..12=0x3 vd 6..0=0x57 360vmsgtu.vi 31..26=0x1e vm vs2 simm5 14..12=0x3 vd 6..0=0x57 361vmsgt.vi 31..26=0x1f vm vs2 simm5 14..12=0x3 vd 6..0=0x57 362 363vsaddu.vi 31..26=0x20 vm vs2 simm5 14..12=0x3 vd 6..0=0x57 364vsadd.vi 31..26=0x21 vm vs2 simm5 14..12=0x3 vd 6..0=0x57 365vsll.vi 31..26=0x25 vm vs2 simm5 14..12=0x3 vd 6..0=0x57 366vmv1r.v 31..26=0x27 25=1 vs2 19..15=0 14..12=0x3 vd 6..0=0x57 367vmv2r.v 31..26=0x27 25=1 vs2 19..15=1 14..12=0x3 vd 6..0=0x57 368vmv4r.v 31..26=0x27 25=1 vs2 19..15=3 14..12=0x3 vd 6..0=0x57 369vmv8r.v 31..26=0x27 25=1 vs2 19..15=7 14..12=0x3 vd 6..0=0x57 370vsrl.vi 31..26=0x28 vm vs2 simm5 14..12=0x3 vd 6..0=0x57 371vsra.vi 31..26=0x29 vm vs2 simm5 14..12=0x3 vd 6..0=0x57 372vssrl.vi 31..26=0x2a vm vs2 simm5 14..12=0x3 vd 6..0=0x57 373vssra.vi 31..26=0x2b vm vs2 simm5 14..12=0x3 vd 6..0=0x57 374vnsrl.wi 31..26=0x2c vm vs2 simm5 14..12=0x3 vd 6..0=0x57 375vnsra.wi 31..26=0x2d vm vs2 simm5 14..12=0x3 vd 6..0=0x57 376vnclipu.wi 31..26=0x2e vm vs2 simm5 14..12=0x3 vd 6..0=0x57 377vnclip.wi 31..26=0x2f vm vs2 simm5 14..12=0x3 vd 6..0=0x57 378 379# OPMVV 380vredsum.vs 31..26=0x00 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 381vredand.vs 31..26=0x01 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 382vredor.vs 31..26=0x02 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 383vredxor.vs 31..26=0x03 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 384vredminu.vs 31..26=0x04 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 385vredmin.vs 31..26=0x05 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 386vredmaxu.vs 31..26=0x06 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 387vredmax.vs 31..26=0x07 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 388vaaddu.vv 31..26=0x08 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 389vaadd.vv 31..26=0x09 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 390vasubu.vv 31..26=0x0a vm vs2 vs1 14..12=0x2 vd 6..0=0x57 391vasub.vv 31..26=0x0b vm vs2 vs1 14..12=0x2 vd 6..0=0x57 392 393vmv.x.s 31..26=0x10 25=1 vs2 19..15=0 14..12=0x2 rd 6..0=0x57 394 395# Vector Integer Extension Instructions 396# https://github.com/riscv/riscv-v-spec/blob/e49574c92b072fd4d71e6cb20f7e8154de5b83fe/v-spec.adoc#123-vector-integer-extension 397vzext.vf8 31..26=0x12 vm vs2 19..15=2 14..12=0x2 vd 6..0=0x57 398vsext.vf8 31..26=0x12 vm vs2 19..15=3 14..12=0x2 vd 6..0=0x57 399vzext.vf4 31..26=0x12 vm vs2 19..15=4 14..12=0x2 vd 6..0=0x57 400vsext.vf4 31..26=0x12 vm vs2 19..15=5 14..12=0x2 vd 6..0=0x57 401vzext.vf2 31..26=0x12 vm vs2 19..15=6 14..12=0x2 vd 6..0=0x57 402vsext.vf2 31..26=0x12 vm vs2 19..15=7 14..12=0x2 vd 6..0=0x57 403 404vcompress.vm 31..26=0x17 25=1 vs2 vs1 14..12=0x2 vd 6..0=0x57 405vmandnot.mm 31..26=0x18 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 406vmand.mm 31..26=0x19 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 407vmor.mm 31..26=0x1a vm vs2 vs1 14..12=0x2 vd 6..0=0x57 408vmxor.mm 31..26=0x1b vm vs2 vs1 14..12=0x2 vd 6..0=0x57 409vmornot.mm 31..26=0x1c vm vs2 vs1 14..12=0x2 vd 6..0=0x57 410vmnand.mm 31..26=0x1d vm vs2 vs1 14..12=0x2 vd 6..0=0x57 411vmnor.mm 31..26=0x1e vm vs2 vs1 14..12=0x2 vd 6..0=0x57 412vmxnor.mm 31..26=0x1f vm vs2 vs1 14..12=0x2 vd 6..0=0x57 413 414vmsbf.m 31..26=0x14 vm vs2 19..15=0x01 14..12=0x2 vd 6..0=0x57 415vmsof.m 31..26=0x14 vm vs2 19..15=0x02 14..12=0x2 vd 6..0=0x57 416vmsif.m 31..26=0x14 vm vs2 19..15=0x03 14..12=0x2 vd 6..0=0x57 417viota.m 31..26=0x14 vm vs2 19..15=0x10 14..12=0x2 vd 6..0=0x57 418vid.v 31..26=0x14 vm 24..20=0 19..15=0x11 14..12=0x2 vd 6..0=0x57 419vcpop.m 31..26=0x10 vm vs2 19..15=0x10 14..12=0x2 rd 6..0=0x57 420vfirst.m 31..26=0x10 vm vs2 19..15=0x11 14..12=0x2 rd 6..0=0x57 421 422vdivu.vv 31..26=0x20 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 423vdiv.vv 31..26=0x21 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 424vremu.vv 31..26=0x22 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 425vrem.vv 31..26=0x23 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 426vmulhu.vv 31..26=0x24 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 427vmul.vv 31..26=0x25 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 428vmulhsu.vv 31..26=0x26 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 429vmulh.vv 31..26=0x27 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 430vmadd.vv 31..26=0x29 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 431vnmsub.vv 31..26=0x2b vm vs2 vs1 14..12=0x2 vd 6..0=0x57 432vmacc.vv 31..26=0x2d vm vs2 vs1 14..12=0x2 vd 6..0=0x57 433vnmsac.vv 31..26=0x2f vm vs2 vs1 14..12=0x2 vd 6..0=0x57 434 435vwaddu.vv 31..26=0x30 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 436vwadd.vv 31..26=0x31 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 437vwsubu.vv 31..26=0x32 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 438vwsub.vv 31..26=0x33 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 439vwaddu.wv 31..26=0x34 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 440vwadd.wv 31..26=0x35 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 441vwsubu.wv 31..26=0x36 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 442vwsub.wv 31..26=0x37 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 443vwmulu.vv 31..26=0x38 vm vs2 vs1 14..12=0x2 vd 6..0=0x57 444vwmulsu.vv 31..26=0x3a vm vs2 vs1 14..12=0x2 vd 6..0=0x57 445vwmul.vv 31..26=0x3b vm vs2 vs1 14..12=0x2 vd 6..0=0x57 446vwmaccu.vv 31..26=0x3c vm vs2 vs1 14..12=0x2 vd 6..0=0x57 447vwmacc.vv 31..26=0x3d vm vs2 vs1 14..12=0x2 vd 6..0=0x57 448vwmaccsu.vv 31..26=0x3f vm vs2 vs1 14..12=0x2 vd 6..0=0x57 449 450# OPMVX 451vaaddu.vx 31..26=0x08 vm vs2 rs1 14..12=0x6 vd 6..0=0x57 452vaadd.vx 31..26=0x09 vm vs2 rs1 14..12=0x6 vd 6..0=0x57 453vasubu.vx 31..26=0x0a vm vs2 rs1 14..12=0x6 vd 6..0=0x57 454vasub.vx 31..26=0x0b vm vs2 rs1 14..12=0x6 vd 6..0=0x57 455 456vmv.s.x 31..26=0x10 25=1 24..20=0 rs1 14..12=0x6 vd 6..0=0x57 457vslide1up.vx 31..26=0x0e vm vs2 rs1 14..12=0x6 vd 6..0=0x57 458vslide1down.vx 31..26=0x0f vm vs2 rs1 14..12=0x6 vd 6..0=0x57 459 460vdivu.vx 31..26=0x20 vm vs2 rs1 14..12=0x6 vd 6..0=0x57 461vdiv.vx 31..26=0x21 vm vs2 rs1 14..12=0x6 vd 6..0=0x57 462vremu.vx 31..26=0x22 vm vs2 rs1 14..12=0x6 vd 6..0=0x57 463vrem.vx 31..26=0x23 vm vs2 rs1 14..12=0x6 vd 6..0=0x57 464vmulhu.vx 31..26=0x24 vm vs2 rs1 14..12=0x6 vd 6..0=0x57 465vmul.vx 31..26=0x25 vm vs2 rs1 14..12=0x6 vd 6..0=0x57 466vmulhsu.vx 31..26=0x26 vm vs2 rs1 14..12=0x6 vd 6..0=0x57 467vmulh.vx 31..26=0x27 vm vs2 rs1 14..12=0x6 vd 6..0=0x57 468vmadd.vx 31..26=0x29 vm vs2 rs1 14..12=0x6 vd 6..0=0x57 469vnmsub.vx 31..26=0x2b vm vs2 rs1 14..12=0x6 vd 6..0=0x57 470vmacc.vx 31..26=0x2d vm vs2 rs1 14..12=0x6 vd 6..0=0x57 471vnmsac.vx 31..26=0x2f vm vs2 rs1 14..12=0x6 vd 6..0=0x57 472 473vwaddu.vx 31..26=0x30 vm vs2 rs1 14..12=0x6 vd 6..0=0x57 474vwadd.vx 31..26=0x31 vm vs2 rs1 14..12=0x6 vd 6..0=0x57 475vwsubu.vx 31..26=0x32 vm vs2 rs1 14..12=0x6 vd 6..0=0x57 476vwsub.vx 31..26=0x33 vm vs2 rs1 14..12=0x6 vd 6..0=0x57 477vwaddu.wx 31..26=0x34 vm vs2 rs1 14..12=0x6 vd 6..0=0x57 478vwadd.wx 31..26=0x35 vm vs2 rs1 14..12=0x6 vd 6..0=0x57 479vwsubu.wx 31..26=0x36 vm vs2 rs1 14..12=0x6 vd 6..0=0x57 480vwsub.wx 31..26=0x37 vm vs2 rs1 14..12=0x6 vd 6..0=0x57 481vwmulu.vx 31..26=0x38 vm vs2 rs1 14..12=0x6 vd 6..0=0x57 482vwmulsu.vx 31..26=0x3a vm vs2 rs1 14..12=0x6 vd 6..0=0x57 483vwmul.vx 31..26=0x3b vm vs2 rs1 14..12=0x6 vd 6..0=0x57 484vwmaccu.vx 31..26=0x3c vm vs2 rs1 14..12=0x6 vd 6..0=0x57 485vwmacc.vx 31..26=0x3d vm vs2 rs1 14..12=0x6 vd 6..0=0x57 486vwmaccus.vx 31..26=0x3e vm vs2 rs1 14..12=0x6 vd 6..0=0x57 487vwmaccsu.vx 31..26=0x3f vm vs2 rs1 14..12=0x6 vd 6..0=0x57 488 489# Zvamo 490vamoswapei8.v 31..27=0x01 wd vm vs2 rs1 14..12=0x0 vd 6..0=0x2f 491vamoaddei8.v 31..27=0x00 wd vm vs2 rs1 14..12=0x0 vd 6..0=0x2f 492vamoxorei8.v 31..27=0x04 wd vm vs2 rs1 14..12=0x0 vd 6..0=0x2f 493vamoandei8.v 31..27=0x0c wd vm vs2 rs1 14..12=0x0 vd 6..0=0x2f 494vamoorei8.v 31..27=0x08 wd vm vs2 rs1 14..12=0x0 vd 6..0=0x2f 495vamominei8.v 31..27=0x10 wd vm vs2 rs1 14..12=0x0 vd 6..0=0x2f 496vamomaxei8.v 31..27=0x14 wd vm vs2 rs1 14..12=0x0 vd 6..0=0x2f 497vamominuei8.v 31..27=0x18 wd vm vs2 rs1 14..12=0x0 vd 6..0=0x2f 498vamomaxuei8.v 31..27=0x1c wd vm vs2 rs1 14..12=0x0 vd 6..0=0x2f 499 500vamoswapei16.v 31..27=0x01 wd vm vs2 rs1 14..12=0x5 vd 6..0=0x2f 501vamoaddei16.v 31..27=0x00 wd vm vs2 rs1 14..12=0x5 vd 6..0=0x2f 502vamoxorei16.v 31..27=0x04 wd vm vs2 rs1 14..12=0x5 vd 6..0=0x2f 503vamoandei16.v 31..27=0x0c wd vm vs2 rs1 14..12=0x5 vd 6..0=0x2f 504vamoorei16.v 31..27=0x08 wd vm vs2 rs1 14..12=0x5 vd 6..0=0x2f 505vamominei16.v 31..27=0x10 wd vm vs2 rs1 14..12=0x5 vd 6..0=0x2f 506vamomaxei16.v 31..27=0x14 wd vm vs2 rs1 14..12=0x5 vd 6..0=0x2f 507vamominuei16.v 31..27=0x18 wd vm vs2 rs1 14..12=0x5 vd 6..0=0x2f 508vamomaxuei16.v 31..27=0x1c wd vm vs2 rs1 14..12=0x5 vd 6..0=0x2f 509 510vamoswapei32.v 31..27=0x01 wd vm vs2 rs1 14..12=0x6 vd 6..0=0x2f 511vamoaddei32.v 31..27=0x00 wd vm vs2 rs1 14..12=0x6 vd 6..0=0x2f 512vamoxorei32.v 31..27=0x04 wd vm vs2 rs1 14..12=0x6 vd 6..0=0x2f 513vamoandei32.v 31..27=0x0c wd vm vs2 rs1 14..12=0x6 vd 6..0=0x2f 514vamoorei32.v 31..27=0x08 wd vm vs2 rs1 14..12=0x6 vd 6..0=0x2f 515vamominei32.v 31..27=0x10 wd vm vs2 rs1 14..12=0x6 vd 6..0=0x2f 516vamomaxei32.v 31..27=0x14 wd vm vs2 rs1 14..12=0x6 vd 6..0=0x2f 517vamominuei32.v 31..27=0x18 wd vm vs2 rs1 14..12=0x6 vd 6..0=0x2f 518vamomaxuei32.v 31..27=0x1c wd vm vs2 rs1 14..12=0x6 vd 6..0=0x2f 519 520vamoswapei64.v 31..27=0x01 wd vm vs2 rs1 14..12=0x7 vd 6..0=0x2f 521vamoaddei64.v 31..27=0x00 wd vm vs2 rs1 14..12=0x7 vd 6..0=0x2f 522vamoxorei64.v 31..27=0x04 wd vm vs2 rs1 14..12=0x7 vd 6..0=0x2f 523vamoandei64.v 31..27=0x0c wd vm vs2 rs1 14..12=0x7 vd 6..0=0x2f 524vamoorei64.v 31..27=0x08 wd vm vs2 rs1 14..12=0x7 vd 6..0=0x2f 525vamominei64.v 31..27=0x10 wd vm vs2 rs1 14..12=0x7 vd 6..0=0x2f 526vamomaxei64.v 31..27=0x14 wd vm vs2 rs1 14..12=0x7 vd 6..0=0x2f 527vamominuei64.v 31..27=0x18 wd vm vs2 rs1 14..12=0x7 vd 6..0=0x2f 528vamomaxuei64.v 31..27=0x1c wd vm vs2 rs1 14..12=0x7 vd 6..0=0x2f 529