1# format of a line in this file:
2# <instruction name> <args> <opcode>
3#
4# <opcode> is given by specifying one or more range/value pairs:
5# hi..lo=value or bit=value or arg=value (e.g. 6..2=0x45 10=1 rd=0)
6#
7# <args> is one of rd, rs1, rs2, rs3, imm20, imm12, imm12lo, imm12hi,
8# shamtw, shamt, rm
9
10beq     bimm12hi rs1 rs2 bimm12lo 14..12=0 6..2=0x18 1..0=3
11bne     bimm12hi rs1 rs2 bimm12lo 14..12=1 6..2=0x18 1..0=3
12blt     bimm12hi rs1 rs2 bimm12lo 14..12=4 6..2=0x18 1..0=3
13bge     bimm12hi rs1 rs2 bimm12lo 14..12=5 6..2=0x18 1..0=3
14bltu    bimm12hi rs1 rs2 bimm12lo 14..12=6 6..2=0x18 1..0=3
15bgeu    bimm12hi rs1 rs2 bimm12lo 14..12=7 6..2=0x18 1..0=3
16
17jalr    rd rs1 imm12              14..12=0 6..2=0x19 1..0=3
18
19jal     rd jimm20                          6..2=0x1b 1..0=3
20
21lui     rd imm20 6..2=0x0D 1..0=3
22auipc   rd imm20 6..2=0x05 1..0=3
23
24addi    rd rs1 imm12           14..12=0 6..2=0x04 1..0=3
25slti    rd rs1 imm12           14..12=2 6..2=0x04 1..0=3
26sltiu   rd rs1 imm12           14..12=3 6..2=0x04 1..0=3
27xori    rd rs1 imm12           14..12=4 6..2=0x04 1..0=3
28ori     rd rs1 imm12           14..12=6 6..2=0x04 1..0=3
29andi    rd rs1 imm12           14..12=7 6..2=0x04 1..0=3
30
31add     rd rs1 rs2 31..25=0  14..12=0 6..2=0x0C 1..0=3
32sub     rd rs1 rs2 31..25=32 14..12=0 6..2=0x0C 1..0=3
33sll     rd rs1 rs2 31..25=0  14..12=1 6..2=0x0C 1..0=3
34slt     rd rs1 rs2 31..25=0  14..12=2 6..2=0x0C 1..0=3
35sltu    rd rs1 rs2 31..25=0  14..12=3 6..2=0x0C 1..0=3
36xor     rd rs1 rs2 31..25=0  14..12=4 6..2=0x0C 1..0=3
37srl     rd rs1 rs2 31..25=0  14..12=5 6..2=0x0C 1..0=3
38sra     rd rs1 rs2 31..25=32 14..12=5 6..2=0x0C 1..0=3
39or      rd rs1 rs2 31..25=0  14..12=6 6..2=0x0C 1..0=3
40and     rd rs1 rs2 31..25=0  14..12=7 6..2=0x0C 1..0=3
41
42lb      rd rs1       imm12 14..12=0 6..2=0x00 1..0=3
43lh      rd rs1       imm12 14..12=1 6..2=0x00 1..0=3
44lw      rd rs1       imm12 14..12=2 6..2=0x00 1..0=3
45lbu     rd rs1       imm12 14..12=4 6..2=0x00 1..0=3
46lhu     rd rs1       imm12 14..12=5 6..2=0x00 1..0=3
47
48sb     imm12hi rs1 rs2 imm12lo 14..12=0 6..2=0x08 1..0=3
49sh     imm12hi rs1 rs2 imm12lo 14..12=1 6..2=0x08 1..0=3
50sw     imm12hi rs1 rs2 imm12lo 14..12=2 6..2=0x08 1..0=3
51
52fence       fm            pred succ     rs1 14..12=0 rd 6..2=0x03 1..0=3
53fence.i     imm12                       rs1 14..12=1 rd 6..2=0x03 1..0=3
54
55