1 //
2 // Copyright (c) 2010-2024 Antmicro
3 //
4 // This file is licensed under the MIT License.
5 // Full license text is available in 'licenses/MIT.txt'.
6 //
7 
8 namespace Antmicro.Renode.Peripherals.CPU
9 {
10     public interface ICPUWithAArch64Support : ICPU
11     {
TryGetSystemRegisterValue(AArch64SystemRegisterEncoding encoding, out ulong value)12         bool TryGetSystemRegisterValue(AArch64SystemRegisterEncoding encoding, out ulong value);
TrySetSystemRegisterValue(AArch64SystemRegisterEncoding encoding, ulong value)13         bool TrySetSystemRegisterValue(AArch64SystemRegisterEncoding encoding, ulong value);
14     }
15 
16     public struct AArch64SystemRegisterEncoding
17     {
18         // Parts of the MRS/MSR instructions unique for each system register.
19         // The order is in line with the documentation.
AArch64SystemRegisterEncodingAntmicro.Renode.Peripherals.CPU.AArch64SystemRegisterEncoding20         public AArch64SystemRegisterEncoding(byte op0, byte op1, byte crn, byte crm, byte op2)
21         {
22             Op0 = op0;
23             Op1 = op1;
24             Crn = crn;
25             Crm = crm;
26             Op2 = op2;
27         }
28 
ToStringAntmicro.Renode.Peripherals.CPU.AArch64SystemRegisterEncoding29         public override string ToString()
30         {
31             return $"op0={Op0}, op1={Op1}, crn={Crn}, crm={Crm}, op2={Op2}";
32         }
33 
34         public byte Crm;
35         public byte Crn;
36         public byte Op0;
37         public byte Op1;
38         public byte Op2;
39     }
40 }
41 
42