itcm: Memory.MappedMemory @ {
        sysbus new Bus.BusPointRegistration {
            address: 0x00000000;
            cpu: cpu0
        };
        sysbus 0x11000000
    }
    size: 0x10000

program_flash: Memory.MappedMemory @ sysbus 0x400000
    size: 0x400000

data_flash: Memory.MappedMemory @ sysbus 0x10000000
    size: 0x20000

dtcm: Memory.MappedMemory @ {
        sysbus new Bus.BusPointRegistration {
            address: 0x20000000;
            cpu: cpu0
        };
        sysbus 0x21000000
    }
    size: 0x20000

sram01: Memory.MappedMemory @ sysbus 0x20400000
    size: 0x50000

mc_cgm_css0: Python.PythonPeripheral @ sysbus 0x402D8304
    size: 0x4
    initable: true
    filename: "scripts/pydev/flipflop.py"

mc_cgm_css3: Python.PythonPeripheral @ sysbus 0x402D83C4
    size: 0x4
    initable: true
    filename: "scripts/pydev/flipflop.py"

mc_cgm_css4: Python.PythonPeripheral @ sysbus 0x402D8404
    size: 0x4
    initable: true
    filename: "scripts/pydev/flipflop.py"

mc_cgm_css5: Python.PythonPeripheral @ sysbus 0x402D8444
    size: 0x4
    initable: true
    filename: "scripts/pydev/flipflop.py"

mc_cgm_css6: Python.PythonPeripheral @ sysbus 0x402D8484
    size: 0x4
    initable: true
    filename: "scripts/pydev/flipflop.py"

mc_cgm_css11: Python.PythonPeripheral @ sysbus 0x402D85C4
    size: 0x4
    initable: true
    filename: "scripts/pydev/flipflop.py"

pll_status: Python.PythonPeripheral @ sysbus 0x402E0004
    size: 0x4
    initable: true
    filename: "scripts/pydev/flipflop.py"

// autogenerated

siul2: Miscellaneous.S32K3XX_SystemIntegrationUnitLite2 @ sysbus 0x40290000
    IRQ1->nvic0@53
    IRQ2->nvic0@54
    IRQ3->nvic0@55
    IRQ4->nvic0@56
    11 -> userled1green@0
    140 -> userled1blue@0
    142 -> userled1red@0

userled1green: Miscellaneous.LED @ siul2 0xb
    invert: true

userled1blue: Miscellaneous.LED @ siul2 0x8c
    invert: true

userled1red: Miscellaneous.LED @ siul2 0x8e
    invert: true

nvic0: IRQControllers.NVIC @ {
        sysbus new Bus.BusPointRegistration { address: 0xe000e000; cpu: cpu0 }
    }
    -> cpu0@0

cpu0: CPU.CortexM @ sysbus
    cpuType: "cortex-m7"
    nvic: nvic0

// lpi2c0: I2C.S32K3XX_LowPowerInterIntegratedCircuit @ sysbus 0x40350000
//     ->nvic0@161
//
// lpi2c1: I2C.S32K3XX_LowPowerInterIntegratedCircuit @ sysbus 0x40354000
//     ->nvic0@162

lpspi3: SPI.IMXRT_LPSPI @ sysbus 0x40364000
    ->nvic0@168

lpuart0: UART.NXP_LPUART @ sysbus 0x40328000
    IRQ->nvic0@141

lpuart1: UART.NXP_LPUART @ sysbus 0x4032c000
    IRQ->nvic0@142

lpuart2: UART.NXP_LPUART @ sysbus 0x40330000
    IRQ->nvic0@143

lpuart3: UART.NXP_LPUART @ sysbus 0x40334000
    IRQ->nvic0@144

lpuart4: UART.NXP_LPUART @ sysbus 0x40338000
    IRQ->nvic0@145

lpuart5: UART.NXP_LPUART @ sysbus 0x4033c000
    IRQ->nvic0@146

lpuart6: UART.NXP_LPUART @ sysbus 0x40340000
    IRQ->nvic0@147

lpuart7: UART.NXP_LPUART @ sysbus 0x40344000
    IRQ->nvic0@148

lpuart8: UART.NXP_LPUART @ sysbus 0x4048c000
    IRQ->nvic0@149

lpuart9: UART.NXP_LPUART @ sysbus 0x40490000
    IRQ->nvic0@150

lpuart10: UART.NXP_LPUART @ sysbus 0x40494000
    IRQ->nvic0@151

lpuart11: UART.NXP_LPUART @ sysbus 0x40498000
    IRQ->nvic0@152

lpuart12: UART.NXP_LPUART @ sysbus 0x4049c000
    IRQ->nvic0@153

lpuart13: UART.NXP_LPUART @ sysbus 0x404a0000
    IRQ->nvic0@154

lpuart14: UART.NXP_LPUART @ sysbus 0x404a4000
    IRQ->nvic0@155

lpuart15: UART.NXP_LPUART @ sysbus 0x404a8000
    IRQ->nvic0@156

// nxp,mr_canhubk3 overlay

sysbus:
    init:
        Tag <0x402C8004 0x4> "SIRC_status" 0x00000001
        Tag <0x402CC004 0x4> "SXOSC_status" 0x80000000
        Tag <0x402D4004 0x4> "FXOSC_status" 0x80000000
        Tag <0x402DC108 0x4> "ME_MP_part0_status" 0x00000001
        Tag <0x402DC114 0x4> "ME_MP_part0_set1_status" 0xFFFFFFFF
        Tag <0x402DC310 0x4> "ME_MP_part1_set0_status" 0xFFFFFFFF
        Tag <0x402DC314 0x4> "ME_MP_part1_set1_status" 0xFFFFFFFF
        Tag <0x402DC318 0x4> "ME_MP_part1_set2_status" 0xFFFFFFFF
        Tag <0x402DC31C 0x4> "ME_MP_part1_set3_status" 0xFFFFFFFF
        Tag <0x402DC510 0x4> "ME_MP_part2_set0_status" 0xFFFFFFFF
        Tag <0x402DC514 0x4> "ME_MP_part2_set1_status" 0xFFFFFFFF
        Tag <0x402DC188 0x4> "" 0x80000001
        Tag <0x402D8310 0x4> "" 0x80010000
        Tag <0x4039C064 0x4> "" 0xa0000003
        Tag <0x402D83C8 0x4> "" 0x80000000

// cortex-m overlay

dwt: Miscellaneous.DWT @ sysbus 0xE0001000
    frequency: 72000000

can0: CAN.S32K3XX_FlexCAN @ sysbus 0x40304000
    numberOfMessageBuffers: 96
    enhancedRxFifoSize: 20
    -> nvic0@109

can1: CAN.S32K3XX_FlexCAN @ sysbus 0x40308000
    numberOfMessageBuffers: 64
    -> nvic0@113

can2: CAN.S32K3XX_FlexCAN @ sysbus 0x4030C000
    numberOfMessageBuffers: 64
    -> nvic0@116

can3: CAN.S32K3XX_FlexCAN @ sysbus 0x40310000
    numberOfMessageBuffers: 64
    -> nvic0@119

can4: CAN.S32K3XX_FlexCAN @ sysbus 0x40314000
    numberOfMessageBuffers: 64
    -> nvic0@121

can5: CAN.S32K3XX_FlexCAN @ sysbus 0x40318000
    numberOfMessageBuffers: 64
    -> nvic0@123