1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * DRM driver for Solomon SSD130x OLED displays
4 *
5 * Copyright 2022 Red Hat Inc.
6 * Author: Javier Martinez Canillas <javierm@redhat.com>
7 *
8 * Based on drivers/video/fbdev/ssd1307fb.c
9 * Copyright 2012 Free Electrons
10 */
11
12 #include <linux/backlight.h>
13 #include <linux/bitfield.h>
14 #include <linux/bits.h>
15 #include <linux/delay.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/property.h>
18 #include <linux/pwm.h>
19 #include <linux/regulator/consumer.h>
20
21 #include <drm/drm_atomic.h>
22 #include <drm/drm_atomic_helper.h>
23 #include <drm/drm_crtc_helper.h>
24 #include <drm/drm_damage_helper.h>
25 #include <drm/drm_edid.h>
26 #include <drm/drm_fbdev_generic.h>
27 #include <drm/drm_format_helper.h>
28 #include <drm/drm_framebuffer.h>
29 #include <drm/drm_gem_atomic_helper.h>
30 #include <drm/drm_gem_framebuffer_helper.h>
31 #include <drm/drm_gem_shmem_helper.h>
32 #include <drm/drm_managed.h>
33 #include <drm/drm_modes.h>
34 #include <drm/drm_rect.h>
35 #include <drm/drm_probe_helper.h>
36
37 #include "ssd130x.h"
38
39 #define DRIVER_NAME "ssd130x"
40 #define DRIVER_DESC "DRM driver for Solomon SSD130x OLED displays"
41 #define DRIVER_DATE "20220131"
42 #define DRIVER_MAJOR 1
43 #define DRIVER_MINOR 0
44
45 #define SSD130X_PAGE_COL_START_LOW 0x00
46 #define SSD130X_PAGE_COL_START_HIGH 0x10
47 #define SSD130X_SET_ADDRESS_MODE 0x20
48 #define SSD130X_SET_COL_RANGE 0x21
49 #define SSD130X_SET_PAGE_RANGE 0x22
50 #define SSD130X_CONTRAST 0x81
51 #define SSD130X_SET_LOOKUP_TABLE 0x91
52 #define SSD130X_CHARGE_PUMP 0x8d
53 #define SSD130X_SET_SEG_REMAP 0xa0
54 #define SSD130X_DISPLAY_OFF 0xae
55 #define SSD130X_SET_MULTIPLEX_RATIO 0xa8
56 #define SSD130X_DISPLAY_ON 0xaf
57 #define SSD130X_START_PAGE_ADDRESS 0xb0
58 #define SSD130X_SET_COM_SCAN_DIR 0xc0
59 #define SSD130X_SET_DISPLAY_OFFSET 0xd3
60 #define SSD130X_SET_CLOCK_FREQ 0xd5
61 #define SSD130X_SET_AREA_COLOR_MODE 0xd8
62 #define SSD130X_SET_PRECHARGE_PERIOD 0xd9
63 #define SSD130X_SET_COM_PINS_CONFIG 0xda
64 #define SSD130X_SET_VCOMH 0xdb
65
66 #define SSD130X_PAGE_COL_START_MASK GENMASK(3, 0)
67 #define SSD130X_PAGE_COL_START_HIGH_SET(val) FIELD_PREP(SSD130X_PAGE_COL_START_MASK, (val) >> 4)
68 #define SSD130X_PAGE_COL_START_LOW_SET(val) FIELD_PREP(SSD130X_PAGE_COL_START_MASK, (val))
69 #define SSD130X_START_PAGE_ADDRESS_MASK GENMASK(2, 0)
70 #define SSD130X_START_PAGE_ADDRESS_SET(val) FIELD_PREP(SSD130X_START_PAGE_ADDRESS_MASK, (val))
71 #define SSD130X_SET_SEG_REMAP_MASK GENMASK(0, 0)
72 #define SSD130X_SET_SEG_REMAP_SET(val) FIELD_PREP(SSD130X_SET_SEG_REMAP_MASK, (val))
73 #define SSD130X_SET_COM_SCAN_DIR_MASK GENMASK(3, 3)
74 #define SSD130X_SET_COM_SCAN_DIR_SET(val) FIELD_PREP(SSD130X_SET_COM_SCAN_DIR_MASK, (val))
75 #define SSD130X_SET_CLOCK_DIV_MASK GENMASK(3, 0)
76 #define SSD130X_SET_CLOCK_DIV_SET(val) FIELD_PREP(SSD130X_SET_CLOCK_DIV_MASK, (val))
77 #define SSD130X_SET_CLOCK_FREQ_MASK GENMASK(7, 4)
78 #define SSD130X_SET_CLOCK_FREQ_SET(val) FIELD_PREP(SSD130X_SET_CLOCK_FREQ_MASK, (val))
79 #define SSD130X_SET_PRECHARGE_PERIOD1_MASK GENMASK(3, 0)
80 #define SSD130X_SET_PRECHARGE_PERIOD1_SET(val) FIELD_PREP(SSD130X_SET_PRECHARGE_PERIOD1_MASK, (val))
81 #define SSD130X_SET_PRECHARGE_PERIOD2_MASK GENMASK(7, 4)
82 #define SSD130X_SET_PRECHARGE_PERIOD2_SET(val) FIELD_PREP(SSD130X_SET_PRECHARGE_PERIOD2_MASK, (val))
83 #define SSD130X_SET_COM_PINS_CONFIG1_MASK GENMASK(4, 4)
84 #define SSD130X_SET_COM_PINS_CONFIG1_SET(val) FIELD_PREP(SSD130X_SET_COM_PINS_CONFIG1_MASK, (val))
85 #define SSD130X_SET_COM_PINS_CONFIG2_MASK GENMASK(5, 5)
86 #define SSD130X_SET_COM_PINS_CONFIG2_SET(val) FIELD_PREP(SSD130X_SET_COM_PINS_CONFIG2_MASK, (val))
87
88 #define SSD130X_SET_ADDRESS_MODE_HORIZONTAL 0x00
89 #define SSD130X_SET_ADDRESS_MODE_VERTICAL 0x01
90 #define SSD130X_SET_ADDRESS_MODE_PAGE 0x02
91
92 #define SSD130X_SET_AREA_COLOR_MODE_ENABLE 0x1e
93 #define SSD130X_SET_AREA_COLOR_MODE_LOW_POWER 0x05
94
95 #define MAX_CONTRAST 255
96
97 const struct ssd130x_deviceinfo ssd130x_variants[] = {
98 [SH1106_ID] = {
99 .default_vcomh = 0x40,
100 .default_dclk_div = 1,
101 .default_dclk_frq = 5,
102 .default_width = 132,
103 .default_height = 64,
104 .page_mode_only = 1,
105 .page_height = 8,
106 },
107 [SSD1305_ID] = {
108 .default_vcomh = 0x34,
109 .default_dclk_div = 1,
110 .default_dclk_frq = 7,
111 .default_width = 132,
112 .default_height = 64,
113 .page_height = 8,
114 },
115 [SSD1306_ID] = {
116 .default_vcomh = 0x20,
117 .default_dclk_div = 1,
118 .default_dclk_frq = 8,
119 .need_chargepump = 1,
120 .default_width = 128,
121 .default_height = 64,
122 .page_height = 8,
123 },
124 [SSD1307_ID] = {
125 .default_vcomh = 0x20,
126 .default_dclk_div = 2,
127 .default_dclk_frq = 12,
128 .need_pwm = 1,
129 .default_width = 128,
130 .default_height = 39,
131 .page_height = 8,
132 },
133 [SSD1309_ID] = {
134 .default_vcomh = 0x34,
135 .default_dclk_div = 1,
136 .default_dclk_frq = 10,
137 .default_width = 128,
138 .default_height = 64,
139 .page_height = 8,
140 }
141 };
142 EXPORT_SYMBOL_NS_GPL(ssd130x_variants, DRM_SSD130X);
143
144 struct ssd130x_plane_state {
145 struct drm_shadow_plane_state base;
146 /* Intermediate buffer to convert pixels from XRGB8888 to HW format */
147 u8 *buffer;
148 /* Buffer to store pixels in HW format and written to the panel */
149 u8 *data_array;
150 };
151
to_ssd130x_plane_state(struct drm_plane_state * state)152 static inline struct ssd130x_plane_state *to_ssd130x_plane_state(struct drm_plane_state *state)
153 {
154 return container_of(state, struct ssd130x_plane_state, base.base);
155 }
156
drm_to_ssd130x(struct drm_device * drm)157 static inline struct ssd130x_device *drm_to_ssd130x(struct drm_device *drm)
158 {
159 return container_of(drm, struct ssd130x_device, drm);
160 }
161
162 /*
163 * Helper to write data (SSD130X_DATA) to the device.
164 */
ssd130x_write_data(struct ssd130x_device * ssd130x,u8 * values,int count)165 static int ssd130x_write_data(struct ssd130x_device *ssd130x, u8 *values, int count)
166 {
167 return regmap_bulk_write(ssd130x->regmap, SSD130X_DATA, values, count);
168 }
169
170 /*
171 * Helper to write command (SSD130X_COMMAND). The fist variadic argument
172 * is the command to write and the following are the command options.
173 *
174 * Note that the ssd130x protocol requires each command and option to be
175 * written as a SSD130X_COMMAND device register value. That is why a call
176 * to regmap_write(..., SSD130X_COMMAND, ...) is done for each argument.
177 */
ssd130x_write_cmd(struct ssd130x_device * ssd130x,int count,...)178 static int ssd130x_write_cmd(struct ssd130x_device *ssd130x, int count,
179 /* u8 cmd, u8 option, ... */...)
180 {
181 va_list ap;
182 u8 value;
183 int ret;
184
185 va_start(ap, count);
186
187 do {
188 value = va_arg(ap, int);
189 ret = regmap_write(ssd130x->regmap, SSD130X_COMMAND, value);
190 if (ret)
191 goto out_end;
192 } while (--count);
193
194 out_end:
195 va_end(ap);
196
197 return ret;
198 }
199
200 /* Set address range for horizontal/vertical addressing modes */
ssd130x_set_col_range(struct ssd130x_device * ssd130x,u8 col_start,u8 cols)201 static int ssd130x_set_col_range(struct ssd130x_device *ssd130x,
202 u8 col_start, u8 cols)
203 {
204 u8 col_end = col_start + cols - 1;
205 int ret;
206
207 if (col_start == ssd130x->col_start && col_end == ssd130x->col_end)
208 return 0;
209
210 ret = ssd130x_write_cmd(ssd130x, 3, SSD130X_SET_COL_RANGE, col_start, col_end);
211 if (ret < 0)
212 return ret;
213
214 ssd130x->col_start = col_start;
215 ssd130x->col_end = col_end;
216 return 0;
217 }
218
ssd130x_set_page_range(struct ssd130x_device * ssd130x,u8 page_start,u8 pages)219 static int ssd130x_set_page_range(struct ssd130x_device *ssd130x,
220 u8 page_start, u8 pages)
221 {
222 u8 page_end = page_start + pages - 1;
223 int ret;
224
225 if (page_start == ssd130x->page_start && page_end == ssd130x->page_end)
226 return 0;
227
228 ret = ssd130x_write_cmd(ssd130x, 3, SSD130X_SET_PAGE_RANGE, page_start, page_end);
229 if (ret < 0)
230 return ret;
231
232 ssd130x->page_start = page_start;
233 ssd130x->page_end = page_end;
234 return 0;
235 }
236
237 /* Set page and column start address for page addressing mode */
ssd130x_set_page_pos(struct ssd130x_device * ssd130x,u8 page_start,u8 col_start)238 static int ssd130x_set_page_pos(struct ssd130x_device *ssd130x,
239 u8 page_start, u8 col_start)
240 {
241 int ret;
242 u32 page, col_low, col_high;
243
244 page = SSD130X_START_PAGE_ADDRESS |
245 SSD130X_START_PAGE_ADDRESS_SET(page_start);
246 col_low = SSD130X_PAGE_COL_START_LOW |
247 SSD130X_PAGE_COL_START_LOW_SET(col_start);
248 col_high = SSD130X_PAGE_COL_START_HIGH |
249 SSD130X_PAGE_COL_START_HIGH_SET(col_start);
250 ret = ssd130x_write_cmd(ssd130x, 3, page, col_low, col_high);
251 if (ret < 0)
252 return ret;
253
254 return 0;
255 }
256
ssd130x_pwm_enable(struct ssd130x_device * ssd130x)257 static int ssd130x_pwm_enable(struct ssd130x_device *ssd130x)
258 {
259 struct device *dev = ssd130x->dev;
260 struct pwm_state pwmstate;
261
262 ssd130x->pwm = pwm_get(dev, NULL);
263 if (IS_ERR(ssd130x->pwm)) {
264 dev_err(dev, "Could not get PWM from firmware description!\n");
265 return PTR_ERR(ssd130x->pwm);
266 }
267
268 pwm_init_state(ssd130x->pwm, &pwmstate);
269 pwm_set_relative_duty_cycle(&pwmstate, 50, 100);
270 pwm_apply_state(ssd130x->pwm, &pwmstate);
271
272 /* Enable the PWM */
273 pwm_enable(ssd130x->pwm);
274
275 dev_dbg(dev, "Using PWM%d with a %lluns period.\n",
276 ssd130x->pwm->pwm, pwm_get_period(ssd130x->pwm));
277
278 return 0;
279 }
280
ssd130x_reset(struct ssd130x_device * ssd130x)281 static void ssd130x_reset(struct ssd130x_device *ssd130x)
282 {
283 if (!ssd130x->reset)
284 return;
285
286 /* Reset the screen */
287 gpiod_set_value_cansleep(ssd130x->reset, 1);
288 udelay(4);
289 gpiod_set_value_cansleep(ssd130x->reset, 0);
290 udelay(4);
291 }
292
ssd130x_power_on(struct ssd130x_device * ssd130x)293 static int ssd130x_power_on(struct ssd130x_device *ssd130x)
294 {
295 struct device *dev = ssd130x->dev;
296 int ret;
297
298 ssd130x_reset(ssd130x);
299
300 ret = regulator_enable(ssd130x->vcc_reg);
301 if (ret) {
302 dev_err(dev, "Failed to enable VCC: %d\n", ret);
303 return ret;
304 }
305
306 if (ssd130x->device_info->need_pwm) {
307 ret = ssd130x_pwm_enable(ssd130x);
308 if (ret) {
309 dev_err(dev, "Failed to enable PWM: %d\n", ret);
310 regulator_disable(ssd130x->vcc_reg);
311 return ret;
312 }
313 }
314
315 return 0;
316 }
317
ssd130x_power_off(struct ssd130x_device * ssd130x)318 static void ssd130x_power_off(struct ssd130x_device *ssd130x)
319 {
320 pwm_disable(ssd130x->pwm);
321 pwm_put(ssd130x->pwm);
322
323 regulator_disable(ssd130x->vcc_reg);
324 }
325
ssd130x_init(struct ssd130x_device * ssd130x)326 static int ssd130x_init(struct ssd130x_device *ssd130x)
327 {
328 u32 precharge, dclk, com_invdir, compins, chargepump, seg_remap;
329 bool scan_mode;
330 int ret;
331
332 /* Set initial contrast */
333 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_CONTRAST, ssd130x->contrast);
334 if (ret < 0)
335 return ret;
336
337 /* Set segment re-map */
338 seg_remap = (SSD130X_SET_SEG_REMAP |
339 SSD130X_SET_SEG_REMAP_SET(ssd130x->seg_remap));
340 ret = ssd130x_write_cmd(ssd130x, 1, seg_remap);
341 if (ret < 0)
342 return ret;
343
344 /* Set COM direction */
345 com_invdir = (SSD130X_SET_COM_SCAN_DIR |
346 SSD130X_SET_COM_SCAN_DIR_SET(ssd130x->com_invdir));
347 ret = ssd130x_write_cmd(ssd130x, 1, com_invdir);
348 if (ret < 0)
349 return ret;
350
351 /* Set multiplex ratio value */
352 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_MULTIPLEX_RATIO, ssd130x->height - 1);
353 if (ret < 0)
354 return ret;
355
356 /* set display offset value */
357 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_DISPLAY_OFFSET, ssd130x->com_offset);
358 if (ret < 0)
359 return ret;
360
361 /* Set clock frequency */
362 dclk = (SSD130X_SET_CLOCK_DIV_SET(ssd130x->dclk_div - 1) |
363 SSD130X_SET_CLOCK_FREQ_SET(ssd130x->dclk_frq));
364 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_CLOCK_FREQ, dclk);
365 if (ret < 0)
366 return ret;
367
368 /* Set Area Color Mode ON/OFF & Low Power Display Mode */
369 if (ssd130x->area_color_enable || ssd130x->low_power) {
370 u32 mode = 0;
371
372 if (ssd130x->area_color_enable)
373 mode |= SSD130X_SET_AREA_COLOR_MODE_ENABLE;
374
375 if (ssd130x->low_power)
376 mode |= SSD130X_SET_AREA_COLOR_MODE_LOW_POWER;
377
378 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_AREA_COLOR_MODE, mode);
379 if (ret < 0)
380 return ret;
381 }
382
383 /* Set precharge period in number of ticks from the internal clock */
384 precharge = (SSD130X_SET_PRECHARGE_PERIOD1_SET(ssd130x->prechargep1) |
385 SSD130X_SET_PRECHARGE_PERIOD2_SET(ssd130x->prechargep2));
386 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_PRECHARGE_PERIOD, precharge);
387 if (ret < 0)
388 return ret;
389
390 /* Set COM pins configuration */
391 compins = BIT(1);
392 /*
393 * The COM scan mode field values are the inverse of the boolean DT
394 * property "solomon,com-seq". The value 0b means scan from COM0 to
395 * COM[N - 1] while 1b means scan from COM[N - 1] to COM0.
396 */
397 scan_mode = !ssd130x->com_seq;
398 compins |= (SSD130X_SET_COM_PINS_CONFIG1_SET(scan_mode) |
399 SSD130X_SET_COM_PINS_CONFIG2_SET(ssd130x->com_lrremap));
400 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_COM_PINS_CONFIG, compins);
401 if (ret < 0)
402 return ret;
403
404 /* Set VCOMH */
405 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_VCOMH, ssd130x->vcomh);
406 if (ret < 0)
407 return ret;
408
409 /* Turn on the DC-DC Charge Pump */
410 chargepump = BIT(4);
411
412 if (ssd130x->device_info->need_chargepump)
413 chargepump |= BIT(2);
414
415 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_CHARGE_PUMP, chargepump);
416 if (ret < 0)
417 return ret;
418
419 /* Set lookup table */
420 if (ssd130x->lookup_table_set) {
421 int i;
422
423 ret = ssd130x_write_cmd(ssd130x, 1, SSD130X_SET_LOOKUP_TABLE);
424 if (ret < 0)
425 return ret;
426
427 for (i = 0; i < ARRAY_SIZE(ssd130x->lookup_table); i++) {
428 u8 val = ssd130x->lookup_table[i];
429
430 if (val < 31 || val > 63)
431 dev_warn(ssd130x->dev,
432 "lookup table index %d value out of range 31 <= %d <= 63\n",
433 i, val);
434 ret = ssd130x_write_cmd(ssd130x, 1, val);
435 if (ret < 0)
436 return ret;
437 }
438 }
439
440 /* Switch to page addressing mode */
441 if (ssd130x->page_address_mode)
442 return ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_ADDRESS_MODE,
443 SSD130X_SET_ADDRESS_MODE_PAGE);
444
445 /* Switch to horizontal addressing mode */
446 return ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_ADDRESS_MODE,
447 SSD130X_SET_ADDRESS_MODE_HORIZONTAL);
448 }
449
ssd130x_update_rect(struct ssd130x_device * ssd130x,struct ssd130x_plane_state * ssd130x_state,struct drm_rect * rect)450 static int ssd130x_update_rect(struct ssd130x_device *ssd130x,
451 struct ssd130x_plane_state *ssd130x_state,
452 struct drm_rect *rect)
453 {
454 unsigned int x = rect->x1;
455 unsigned int y = rect->y1;
456 u8 *buf = ssd130x_state->buffer;
457 u8 *data_array = ssd130x_state->data_array;
458 unsigned int width = drm_rect_width(rect);
459 unsigned int height = drm_rect_height(rect);
460 unsigned int line_length = DIV_ROUND_UP(width, 8);
461 unsigned int page_height = ssd130x->device_info->page_height;
462 unsigned int pages = DIV_ROUND_UP(height, page_height);
463 struct drm_device *drm = &ssd130x->drm;
464 u32 array_idx = 0;
465 int ret, i, j, k;
466
467 drm_WARN_ONCE(drm, y % 8 != 0, "y must be aligned to screen page\n");
468
469 /*
470 * The screen is divided in pages, each having a height of 8
471 * pixels, and the width of the screen. When sending a byte of
472 * data to the controller, it gives the 8 bits for the current
473 * column. I.e, the first byte are the 8 bits of the first
474 * column, then the 8 bits for the second column, etc.
475 *
476 *
477 * Representation of the screen, assuming it is 5 bits
478 * wide. Each letter-number combination is a bit that controls
479 * one pixel.
480 *
481 * A0 A1 A2 A3 A4
482 * B0 B1 B2 B3 B4
483 * C0 C1 C2 C3 C4
484 * D0 D1 D2 D3 D4
485 * E0 E1 E2 E3 E4
486 * F0 F1 F2 F3 F4
487 * G0 G1 G2 G3 G4
488 * H0 H1 H2 H3 H4
489 *
490 * If you want to update this screen, you need to send 5 bytes:
491 * (1) A0 B0 C0 D0 E0 F0 G0 H0
492 * (2) A1 B1 C1 D1 E1 F1 G1 H1
493 * (3) A2 B2 C2 D2 E2 F2 G2 H2
494 * (4) A3 B3 C3 D3 E3 F3 G3 H3
495 * (5) A4 B4 C4 D4 E4 F4 G4 H4
496 */
497
498 if (!ssd130x->page_address_mode) {
499 /* Set address range for horizontal addressing mode */
500 ret = ssd130x_set_col_range(ssd130x, ssd130x->col_offset + x, width);
501 if (ret < 0)
502 return ret;
503
504 ret = ssd130x_set_page_range(ssd130x, ssd130x->page_offset + y / 8, pages);
505 if (ret < 0)
506 return ret;
507 }
508
509 for (i = 0; i < pages; i++) {
510 int m = 8;
511
512 /* Last page may be partial */
513 if (8 * (y / 8 + i + 1) > ssd130x->height)
514 m = ssd130x->height % 8;
515 for (j = 0; j < width; j++) {
516 u8 data = 0;
517
518 for (k = 0; k < m; k++) {
519 u8 byte = buf[(8 * i + k) * line_length + j / 8];
520 u8 bit = (byte >> (j % 8)) & 1;
521
522 data |= bit << k;
523 }
524 data_array[array_idx++] = data;
525 }
526
527 /*
528 * In page addressing mode, the start address needs to be reset,
529 * and each page then needs to be written out separately.
530 */
531 if (ssd130x->page_address_mode) {
532 ret = ssd130x_set_page_pos(ssd130x,
533 ssd130x->page_offset + i,
534 ssd130x->col_offset + x);
535 if (ret < 0)
536 return ret;
537
538 ret = ssd130x_write_data(ssd130x, data_array, width);
539 if (ret < 0)
540 return ret;
541
542 array_idx = 0;
543 }
544 }
545
546 /* Write out update in one go if we aren't using page addressing mode */
547 if (!ssd130x->page_address_mode)
548 ret = ssd130x_write_data(ssd130x, data_array, width * pages);
549
550 return ret;
551 }
552
ssd130x_clear_screen(struct ssd130x_device * ssd130x,struct ssd130x_plane_state * ssd130x_state)553 static void ssd130x_clear_screen(struct ssd130x_device *ssd130x,
554 struct ssd130x_plane_state *ssd130x_state)
555 {
556 struct drm_rect fullscreen = {
557 .x1 = 0,
558 .x2 = ssd130x->width,
559 .y1 = 0,
560 .y2 = ssd130x->height,
561 };
562
563 ssd130x_update_rect(ssd130x, ssd130x_state, &fullscreen);
564 }
565
ssd130x_fb_blit_rect(struct drm_plane_state * state,const struct iosys_map * vmap,struct drm_rect * rect)566 static int ssd130x_fb_blit_rect(struct drm_plane_state *state,
567 const struct iosys_map *vmap,
568 struct drm_rect *rect)
569 {
570 struct drm_framebuffer *fb = state->fb;
571 struct ssd130x_device *ssd130x = drm_to_ssd130x(fb->dev);
572 unsigned int page_height = ssd130x->device_info->page_height;
573 struct ssd130x_plane_state *ssd130x_state = to_ssd130x_plane_state(state);
574 u8 *buf = ssd130x_state->buffer;
575 struct iosys_map dst;
576 unsigned int dst_pitch;
577 int ret = 0;
578
579 /* Align y to display page boundaries */
580 rect->y1 = round_down(rect->y1, page_height);
581 rect->y2 = min_t(unsigned int, round_up(rect->y2, page_height), ssd130x->height);
582
583 dst_pitch = DIV_ROUND_UP(drm_rect_width(rect), 8);
584
585 ret = drm_gem_fb_begin_cpu_access(fb, DMA_FROM_DEVICE);
586 if (ret)
587 return ret;
588
589 iosys_map_set_vaddr(&dst, buf);
590 drm_fb_xrgb8888_to_mono(&dst, &dst_pitch, vmap, fb, rect);
591
592 drm_gem_fb_end_cpu_access(fb, DMA_FROM_DEVICE);
593
594 ssd130x_update_rect(ssd130x, ssd130x_state, rect);
595
596 return ret;
597 }
598
ssd130x_primary_plane_helper_atomic_check(struct drm_plane * plane,struct drm_atomic_state * state)599 static int ssd130x_primary_plane_helper_atomic_check(struct drm_plane *plane,
600 struct drm_atomic_state *state)
601 {
602 struct drm_device *drm = plane->dev;
603 struct ssd130x_device *ssd130x = drm_to_ssd130x(drm);
604 struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);
605 struct ssd130x_plane_state *ssd130x_state = to_ssd130x_plane_state(plane_state);
606 unsigned int page_height = ssd130x->device_info->page_height;
607 unsigned int pages = DIV_ROUND_UP(ssd130x->height, page_height);
608 const struct drm_format_info *fi;
609 unsigned int pitch;
610 int ret;
611
612 ret = drm_plane_helper_atomic_check(plane, state);
613 if (ret)
614 return ret;
615
616 fi = drm_format_info(DRM_FORMAT_R1);
617 if (!fi)
618 return -EINVAL;
619
620 pitch = drm_format_info_min_pitch(fi, 0, ssd130x->width);
621
622 ssd130x_state->buffer = kcalloc(pitch, ssd130x->height, GFP_KERNEL);
623 if (!ssd130x_state->buffer)
624 return -ENOMEM;
625
626 ssd130x_state->data_array = kcalloc(ssd130x->width, pages, GFP_KERNEL);
627 if (!ssd130x_state->data_array) {
628 kfree(ssd130x_state->buffer);
629 /* Set to prevent a double free in .atomic_destroy_state() */
630 ssd130x_state->buffer = NULL;
631 return -ENOMEM;
632 }
633
634 return 0;
635 }
636
ssd130x_primary_plane_helper_atomic_update(struct drm_plane * plane,struct drm_atomic_state * state)637 static void ssd130x_primary_plane_helper_atomic_update(struct drm_plane *plane,
638 struct drm_atomic_state *state)
639 {
640 struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);
641 struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);
642 struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state);
643 struct drm_atomic_helper_damage_iter iter;
644 struct drm_device *drm = plane->dev;
645 struct drm_rect dst_clip;
646 struct drm_rect damage;
647 int idx;
648
649 if (!drm_dev_enter(drm, &idx))
650 return;
651
652 drm_atomic_helper_damage_iter_init(&iter, old_plane_state, plane_state);
653 drm_atomic_for_each_plane_damage(&iter, &damage) {
654 dst_clip = plane_state->dst;
655
656 if (!drm_rect_intersect(&dst_clip, &damage))
657 continue;
658
659 ssd130x_fb_blit_rect(plane_state, &shadow_plane_state->data[0], &dst_clip);
660 }
661
662 drm_dev_exit(idx);
663 }
664
ssd130x_primary_plane_helper_atomic_disable(struct drm_plane * plane,struct drm_atomic_state * state)665 static void ssd130x_primary_plane_helper_atomic_disable(struct drm_plane *plane,
666 struct drm_atomic_state *state)
667 {
668 struct drm_device *drm = plane->dev;
669 struct ssd130x_device *ssd130x = drm_to_ssd130x(drm);
670 struct ssd130x_plane_state *ssd130x_state = to_ssd130x_plane_state(plane->state);
671 int idx;
672
673 if (!drm_dev_enter(drm, &idx))
674 return;
675
676 ssd130x_clear_screen(ssd130x, ssd130x_state);
677
678 drm_dev_exit(idx);
679 }
680
681 /* Called during init to allocate the plane's atomic state. */
ssd130x_primary_plane_reset(struct drm_plane * plane)682 static void ssd130x_primary_plane_reset(struct drm_plane *plane)
683 {
684 struct ssd130x_plane_state *ssd130x_state;
685
686 WARN_ON(plane->state);
687
688 ssd130x_state = kzalloc(sizeof(*ssd130x_state), GFP_KERNEL);
689 if (!ssd130x_state)
690 return;
691
692 __drm_gem_reset_shadow_plane(plane, &ssd130x_state->base);
693 }
694
ssd130x_primary_plane_duplicate_state(struct drm_plane * plane)695 static struct drm_plane_state *ssd130x_primary_plane_duplicate_state(struct drm_plane *plane)
696 {
697 struct drm_shadow_plane_state *new_shadow_plane_state;
698 struct ssd130x_plane_state *old_ssd130x_state;
699 struct ssd130x_plane_state *ssd130x_state;
700
701 if (WARN_ON(!plane->state))
702 return NULL;
703
704 old_ssd130x_state = to_ssd130x_plane_state(plane->state);
705 ssd130x_state = kmemdup(old_ssd130x_state, sizeof(*ssd130x_state), GFP_KERNEL);
706 if (!ssd130x_state)
707 return NULL;
708
709 /* The buffers are not duplicated and are allocated in .atomic_check */
710 ssd130x_state->buffer = NULL;
711 ssd130x_state->data_array = NULL;
712
713 new_shadow_plane_state = &ssd130x_state->base;
714
715 __drm_gem_duplicate_shadow_plane_state(plane, new_shadow_plane_state);
716
717 return &new_shadow_plane_state->base;
718 }
719
ssd130x_primary_plane_destroy_state(struct drm_plane * plane,struct drm_plane_state * state)720 static void ssd130x_primary_plane_destroy_state(struct drm_plane *plane,
721 struct drm_plane_state *state)
722 {
723 struct ssd130x_plane_state *ssd130x_state = to_ssd130x_plane_state(state);
724
725 kfree(ssd130x_state->data_array);
726 kfree(ssd130x_state->buffer);
727
728 __drm_gem_destroy_shadow_plane_state(&ssd130x_state->base);
729
730 kfree(ssd130x_state);
731 }
732
733 static const struct drm_plane_helper_funcs ssd130x_primary_plane_helper_funcs = {
734 DRM_GEM_SHADOW_PLANE_HELPER_FUNCS,
735 .atomic_check = ssd130x_primary_plane_helper_atomic_check,
736 .atomic_update = ssd130x_primary_plane_helper_atomic_update,
737 .atomic_disable = ssd130x_primary_plane_helper_atomic_disable,
738 };
739
740 static const struct drm_plane_funcs ssd130x_primary_plane_funcs = {
741 .update_plane = drm_atomic_helper_update_plane,
742 .disable_plane = drm_atomic_helper_disable_plane,
743 .reset = ssd130x_primary_plane_reset,
744 .atomic_duplicate_state = ssd130x_primary_plane_duplicate_state,
745 .atomic_destroy_state = ssd130x_primary_plane_destroy_state,
746 .destroy = drm_plane_cleanup,
747 };
748
ssd130x_crtc_helper_mode_valid(struct drm_crtc * crtc,const struct drm_display_mode * mode)749 static enum drm_mode_status ssd130x_crtc_helper_mode_valid(struct drm_crtc *crtc,
750 const struct drm_display_mode *mode)
751 {
752 struct ssd130x_device *ssd130x = drm_to_ssd130x(crtc->dev);
753
754 if (mode->hdisplay != ssd130x->mode.hdisplay &&
755 mode->vdisplay != ssd130x->mode.vdisplay)
756 return MODE_ONE_SIZE;
757 else if (mode->hdisplay != ssd130x->mode.hdisplay)
758 return MODE_ONE_WIDTH;
759 else if (mode->vdisplay != ssd130x->mode.vdisplay)
760 return MODE_ONE_HEIGHT;
761
762 return MODE_OK;
763 }
764
765 /*
766 * The CRTC is always enabled. Screen updates are performed by
767 * the primary plane's atomic_update function. Disabling clears
768 * the screen in the primary plane's atomic_disable function.
769 */
770 static const struct drm_crtc_helper_funcs ssd130x_crtc_helper_funcs = {
771 .mode_valid = ssd130x_crtc_helper_mode_valid,
772 .atomic_check = drm_crtc_helper_atomic_check,
773 };
774
775 static const struct drm_crtc_funcs ssd130x_crtc_funcs = {
776 .reset = drm_atomic_helper_crtc_reset,
777 .destroy = drm_crtc_cleanup,
778 .set_config = drm_atomic_helper_set_config,
779 .page_flip = drm_atomic_helper_page_flip,
780 .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
781 .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
782 };
783
ssd130x_encoder_helper_atomic_enable(struct drm_encoder * encoder,struct drm_atomic_state * state)784 static void ssd130x_encoder_helper_atomic_enable(struct drm_encoder *encoder,
785 struct drm_atomic_state *state)
786 {
787 struct drm_device *drm = encoder->dev;
788 struct ssd130x_device *ssd130x = drm_to_ssd130x(drm);
789 int ret;
790
791 ret = ssd130x_power_on(ssd130x);
792 if (ret)
793 return;
794
795 ret = ssd130x_init(ssd130x);
796 if (ret)
797 goto power_off;
798
799 ssd130x_write_cmd(ssd130x, 1, SSD130X_DISPLAY_ON);
800
801 backlight_enable(ssd130x->bl_dev);
802
803 return;
804
805 power_off:
806 ssd130x_power_off(ssd130x);
807 return;
808 }
809
ssd130x_encoder_helper_atomic_disable(struct drm_encoder * encoder,struct drm_atomic_state * state)810 static void ssd130x_encoder_helper_atomic_disable(struct drm_encoder *encoder,
811 struct drm_atomic_state *state)
812 {
813 struct drm_device *drm = encoder->dev;
814 struct ssd130x_device *ssd130x = drm_to_ssd130x(drm);
815
816 backlight_disable(ssd130x->bl_dev);
817
818 ssd130x_write_cmd(ssd130x, 1, SSD130X_DISPLAY_OFF);
819
820 ssd130x_power_off(ssd130x);
821 }
822
823 static const struct drm_encoder_helper_funcs ssd130x_encoder_helper_funcs = {
824 .atomic_enable = ssd130x_encoder_helper_atomic_enable,
825 .atomic_disable = ssd130x_encoder_helper_atomic_disable,
826 };
827
828 static const struct drm_encoder_funcs ssd130x_encoder_funcs = {
829 .destroy = drm_encoder_cleanup,
830 };
831
ssd130x_connector_helper_get_modes(struct drm_connector * connector)832 static int ssd130x_connector_helper_get_modes(struct drm_connector *connector)
833 {
834 struct ssd130x_device *ssd130x = drm_to_ssd130x(connector->dev);
835 struct drm_display_mode *mode;
836 struct device *dev = ssd130x->dev;
837
838 mode = drm_mode_duplicate(connector->dev, &ssd130x->mode);
839 if (!mode) {
840 dev_err(dev, "Failed to duplicated mode\n");
841 return 0;
842 }
843
844 drm_mode_probed_add(connector, mode);
845 drm_set_preferred_mode(connector, mode->hdisplay, mode->vdisplay);
846
847 /* There is only a single mode */
848 return 1;
849 }
850
851 static const struct drm_connector_helper_funcs ssd130x_connector_helper_funcs = {
852 .get_modes = ssd130x_connector_helper_get_modes,
853 };
854
855 static const struct drm_connector_funcs ssd130x_connector_funcs = {
856 .reset = drm_atomic_helper_connector_reset,
857 .fill_modes = drm_helper_probe_single_connector_modes,
858 .destroy = drm_connector_cleanup,
859 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
860 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
861 };
862
863 static const struct drm_mode_config_funcs ssd130x_mode_config_funcs = {
864 .fb_create = drm_gem_fb_create_with_dirty,
865 .atomic_check = drm_atomic_helper_check,
866 .atomic_commit = drm_atomic_helper_commit,
867 };
868
869 static const uint32_t ssd130x_formats[] = {
870 DRM_FORMAT_XRGB8888,
871 };
872
873 DEFINE_DRM_GEM_FOPS(ssd130x_fops);
874
875 static const struct drm_driver ssd130x_drm_driver = {
876 DRM_GEM_SHMEM_DRIVER_OPS,
877 .name = DRIVER_NAME,
878 .desc = DRIVER_DESC,
879 .date = DRIVER_DATE,
880 .major = DRIVER_MAJOR,
881 .minor = DRIVER_MINOR,
882 .driver_features = DRIVER_ATOMIC | DRIVER_GEM | DRIVER_MODESET,
883 .fops = &ssd130x_fops,
884 };
885
ssd130x_update_bl(struct backlight_device * bdev)886 static int ssd130x_update_bl(struct backlight_device *bdev)
887 {
888 struct ssd130x_device *ssd130x = bl_get_data(bdev);
889 int brightness = backlight_get_brightness(bdev);
890 int ret;
891
892 ssd130x->contrast = brightness;
893
894 ret = ssd130x_write_cmd(ssd130x, 1, SSD130X_CONTRAST);
895 if (ret < 0)
896 return ret;
897
898 ret = ssd130x_write_cmd(ssd130x, 1, ssd130x->contrast);
899 if (ret < 0)
900 return ret;
901
902 return 0;
903 }
904
905 static const struct backlight_ops ssd130xfb_bl_ops = {
906 .update_status = ssd130x_update_bl,
907 };
908
ssd130x_parse_properties(struct ssd130x_device * ssd130x)909 static void ssd130x_parse_properties(struct ssd130x_device *ssd130x)
910 {
911 struct device *dev = ssd130x->dev;
912
913 if (device_property_read_u32(dev, "solomon,width", &ssd130x->width))
914 ssd130x->width = ssd130x->device_info->default_width;
915
916 if (device_property_read_u32(dev, "solomon,height", &ssd130x->height))
917 ssd130x->height = ssd130x->device_info->default_height;
918
919 if (device_property_read_u32(dev, "solomon,page-offset", &ssd130x->page_offset))
920 ssd130x->page_offset = 1;
921
922 if (device_property_read_u32(dev, "solomon,col-offset", &ssd130x->col_offset))
923 ssd130x->col_offset = 0;
924
925 if (device_property_read_u32(dev, "solomon,com-offset", &ssd130x->com_offset))
926 ssd130x->com_offset = 0;
927
928 if (device_property_read_u32(dev, "solomon,prechargep1", &ssd130x->prechargep1))
929 ssd130x->prechargep1 = 2;
930
931 if (device_property_read_u32(dev, "solomon,prechargep2", &ssd130x->prechargep2))
932 ssd130x->prechargep2 = 2;
933
934 if (!device_property_read_u8_array(dev, "solomon,lookup-table",
935 ssd130x->lookup_table,
936 ARRAY_SIZE(ssd130x->lookup_table)))
937 ssd130x->lookup_table_set = 1;
938
939 ssd130x->seg_remap = !device_property_read_bool(dev, "solomon,segment-no-remap");
940 ssd130x->com_seq = device_property_read_bool(dev, "solomon,com-seq");
941 ssd130x->com_lrremap = device_property_read_bool(dev, "solomon,com-lrremap");
942 ssd130x->com_invdir = device_property_read_bool(dev, "solomon,com-invdir");
943 ssd130x->area_color_enable =
944 device_property_read_bool(dev, "solomon,area-color-enable");
945 ssd130x->low_power = device_property_read_bool(dev, "solomon,low-power");
946
947 ssd130x->contrast = 127;
948 ssd130x->vcomh = ssd130x->device_info->default_vcomh;
949
950 /* Setup display timing */
951 if (device_property_read_u32(dev, "solomon,dclk-div", &ssd130x->dclk_div))
952 ssd130x->dclk_div = ssd130x->device_info->default_dclk_div;
953 if (device_property_read_u32(dev, "solomon,dclk-frq", &ssd130x->dclk_frq))
954 ssd130x->dclk_frq = ssd130x->device_info->default_dclk_frq;
955 }
956
ssd130x_init_modeset(struct ssd130x_device * ssd130x)957 static int ssd130x_init_modeset(struct ssd130x_device *ssd130x)
958 {
959 struct drm_display_mode *mode = &ssd130x->mode;
960 struct device *dev = ssd130x->dev;
961 struct drm_device *drm = &ssd130x->drm;
962 unsigned long max_width, max_height;
963 struct drm_plane *primary_plane;
964 struct drm_crtc *crtc;
965 struct drm_encoder *encoder;
966 struct drm_connector *connector;
967 int ret;
968
969 /*
970 * Modesetting
971 */
972
973 ret = drmm_mode_config_init(drm);
974 if (ret) {
975 dev_err(dev, "DRM mode config init failed: %d\n", ret);
976 return ret;
977 }
978
979 mode->type = DRM_MODE_TYPE_DRIVER;
980 mode->clock = 1;
981 mode->hdisplay = mode->htotal = ssd130x->width;
982 mode->hsync_start = mode->hsync_end = ssd130x->width;
983 mode->vdisplay = mode->vtotal = ssd130x->height;
984 mode->vsync_start = mode->vsync_end = ssd130x->height;
985 mode->width_mm = 27;
986 mode->height_mm = 27;
987
988 max_width = max_t(unsigned long, mode->hdisplay, DRM_SHADOW_PLANE_MAX_WIDTH);
989 max_height = max_t(unsigned long, mode->vdisplay, DRM_SHADOW_PLANE_MAX_HEIGHT);
990
991 drm->mode_config.min_width = mode->hdisplay;
992 drm->mode_config.max_width = max_width;
993 drm->mode_config.min_height = mode->vdisplay;
994 drm->mode_config.max_height = max_height;
995 drm->mode_config.preferred_depth = 24;
996 drm->mode_config.funcs = &ssd130x_mode_config_funcs;
997
998 /* Primary plane */
999
1000 primary_plane = &ssd130x->primary_plane;
1001 ret = drm_universal_plane_init(drm, primary_plane, 0, &ssd130x_primary_plane_funcs,
1002 ssd130x_formats, ARRAY_SIZE(ssd130x_formats),
1003 NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
1004 if (ret) {
1005 dev_err(dev, "DRM primary plane init failed: %d\n", ret);
1006 return ret;
1007 }
1008
1009 drm_plane_helper_add(primary_plane, &ssd130x_primary_plane_helper_funcs);
1010
1011 drm_plane_enable_fb_damage_clips(primary_plane);
1012
1013 /* CRTC */
1014
1015 crtc = &ssd130x->crtc;
1016 ret = drm_crtc_init_with_planes(drm, crtc, primary_plane, NULL,
1017 &ssd130x_crtc_funcs, NULL);
1018 if (ret) {
1019 dev_err(dev, "DRM crtc init failed: %d\n", ret);
1020 return ret;
1021 }
1022
1023 drm_crtc_helper_add(crtc, &ssd130x_crtc_helper_funcs);
1024
1025 /* Encoder */
1026
1027 encoder = &ssd130x->encoder;
1028 ret = drm_encoder_init(drm, encoder, &ssd130x_encoder_funcs,
1029 DRM_MODE_ENCODER_NONE, NULL);
1030 if (ret) {
1031 dev_err(dev, "DRM encoder init failed: %d\n", ret);
1032 return ret;
1033 }
1034
1035 drm_encoder_helper_add(encoder, &ssd130x_encoder_helper_funcs);
1036
1037 encoder->possible_crtcs = drm_crtc_mask(crtc);
1038
1039 /* Connector */
1040
1041 connector = &ssd130x->connector;
1042 ret = drm_connector_init(drm, connector, &ssd130x_connector_funcs,
1043 DRM_MODE_CONNECTOR_Unknown);
1044 if (ret) {
1045 dev_err(dev, "DRM connector init failed: %d\n", ret);
1046 return ret;
1047 }
1048
1049 drm_connector_helper_add(connector, &ssd130x_connector_helper_funcs);
1050
1051 ret = drm_connector_attach_encoder(connector, encoder);
1052 if (ret) {
1053 dev_err(dev, "DRM attach connector to encoder failed: %d\n", ret);
1054 return ret;
1055 }
1056
1057 drm_mode_config_reset(drm);
1058
1059 return 0;
1060 }
1061
ssd130x_get_resources(struct ssd130x_device * ssd130x)1062 static int ssd130x_get_resources(struct ssd130x_device *ssd130x)
1063 {
1064 struct device *dev = ssd130x->dev;
1065
1066 ssd130x->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
1067 if (IS_ERR(ssd130x->reset))
1068 return dev_err_probe(dev, PTR_ERR(ssd130x->reset),
1069 "Failed to get reset gpio\n");
1070
1071 ssd130x->vcc_reg = devm_regulator_get(dev, "vcc");
1072 if (IS_ERR(ssd130x->vcc_reg))
1073 return dev_err_probe(dev, PTR_ERR(ssd130x->vcc_reg),
1074 "Failed to get VCC regulator\n");
1075
1076 return 0;
1077 }
1078
ssd130x_probe(struct device * dev,struct regmap * regmap)1079 struct ssd130x_device *ssd130x_probe(struct device *dev, struct regmap *regmap)
1080 {
1081 struct ssd130x_device *ssd130x;
1082 struct backlight_device *bl;
1083 struct drm_device *drm;
1084 int ret;
1085
1086 ssd130x = devm_drm_dev_alloc(dev, &ssd130x_drm_driver,
1087 struct ssd130x_device, drm);
1088 if (IS_ERR(ssd130x))
1089 return ERR_PTR(dev_err_probe(dev, PTR_ERR(ssd130x),
1090 "Failed to allocate DRM device\n"));
1091
1092 drm = &ssd130x->drm;
1093
1094 ssd130x->dev = dev;
1095 ssd130x->regmap = regmap;
1096 ssd130x->device_info = device_get_match_data(dev);
1097
1098 if (ssd130x->device_info->page_mode_only)
1099 ssd130x->page_address_mode = 1;
1100
1101 ssd130x_parse_properties(ssd130x);
1102
1103 ret = ssd130x_get_resources(ssd130x);
1104 if (ret)
1105 return ERR_PTR(ret);
1106
1107 bl = devm_backlight_device_register(dev, dev_name(dev), dev, ssd130x,
1108 &ssd130xfb_bl_ops, NULL);
1109 if (IS_ERR(bl))
1110 return ERR_PTR(dev_err_probe(dev, PTR_ERR(bl),
1111 "Unable to register backlight device\n"));
1112
1113 bl->props.brightness = ssd130x->contrast;
1114 bl->props.max_brightness = MAX_CONTRAST;
1115 ssd130x->bl_dev = bl;
1116
1117 ret = ssd130x_init_modeset(ssd130x);
1118 if (ret)
1119 return ERR_PTR(ret);
1120
1121 ret = drm_dev_register(drm, 0);
1122 if (ret)
1123 return ERR_PTR(dev_err_probe(dev, ret, "DRM device register failed\n"));
1124
1125 drm_fbdev_generic_setup(drm, 32);
1126
1127 return ssd130x;
1128 }
1129 EXPORT_SYMBOL_GPL(ssd130x_probe);
1130
ssd130x_remove(struct ssd130x_device * ssd130x)1131 void ssd130x_remove(struct ssd130x_device *ssd130x)
1132 {
1133 drm_dev_unplug(&ssd130x->drm);
1134 }
1135 EXPORT_SYMBOL_GPL(ssd130x_remove);
1136
ssd130x_shutdown(struct ssd130x_device * ssd130x)1137 void ssd130x_shutdown(struct ssd130x_device *ssd130x)
1138 {
1139 drm_atomic_helper_shutdown(&ssd130x->drm);
1140 }
1141 EXPORT_SYMBOL_GPL(ssd130x_shutdown);
1142
1143 MODULE_DESCRIPTION(DRIVER_DESC);
1144 MODULE_AUTHOR("Javier Martinez Canillas <javierm@redhat.com>");
1145 MODULE_LICENSE("GPL v2");
1146
