1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * pSeries_lpar.c
4 * Copyright (C) 2001 Todd Inglett, IBM Corporation
5 *
6 * pSeries LPAR support.
7 */
8
9 /* Enables debugging of low-level hash table routines - careful! */
10 #undef DEBUG
11 #define pr_fmt(fmt) "lpar: " fmt
12
13 #include <linux/kernel.h>
14 #include <linux/dma-mapping.h>
15 #include <linux/console.h>
16 #include <linux/export.h>
17 #include <linux/jump_label.h>
18 #include <linux/delay.h>
19 #include <linux/stop_machine.h>
20 #include <linux/spinlock.h>
21 #include <linux/cpuhotplug.h>
22 #include <linux/workqueue.h>
23 #include <linux/proc_fs.h>
24 #include <linux/pgtable.h>
25 #include <linux/debugfs.h>
26
27 #include <asm/processor.h>
28 #include <asm/mmu.h>
29 #include <asm/page.h>
30 #include <asm/setup.h>
31 #include <asm/mmu_context.h>
32 #include <asm/iommu.h>
33 #include <asm/tlb.h>
34 #include <asm/cputable.h>
35 #include <asm/papr-sysparm.h>
36 #include <asm/udbg.h>
37 #include <asm/smp.h>
38 #include <asm/trace.h>
39 #include <asm/firmware.h>
40 #include <asm/plpar_wrappers.h>
41 #include <asm/kexec.h>
42 #include <asm/fadump.h>
43 #include <asm/dtl.h>
44 #include <asm/vphn.h>
45
46 #include "pseries.h"
47
48 /* Flag bits for H_BULK_REMOVE */
49 #define HBR_REQUEST 0x4000000000000000UL
50 #define HBR_RESPONSE 0x8000000000000000UL
51 #define HBR_END 0xc000000000000000UL
52 #define HBR_AVPN 0x0200000000000000UL
53 #define HBR_ANDCOND 0x0100000000000000UL
54
55
56 /* in hvCall.S */
57 EXPORT_SYMBOL(plpar_hcall);
58 EXPORT_SYMBOL(plpar_hcall9);
59 EXPORT_SYMBOL(plpar_hcall_norets);
60
61 #ifdef CONFIG_PPC_64S_HASH_MMU
62 /*
63 * H_BLOCK_REMOVE supported block size for this page size in segment who's base
64 * page size is that page size.
65 *
66 * The first index is the segment base page size, the second one is the actual
67 * page size.
68 */
69 static int hblkrm_size[MMU_PAGE_COUNT][MMU_PAGE_COUNT] __ro_after_init;
70 #endif
71
72 /*
73 * Due to the involved complexity, and that the current hypervisor is only
74 * returning this value or 0, we are limiting the support of the H_BLOCK_REMOVE
75 * buffer size to 8 size block.
76 */
77 #define HBLKRM_SUPPORTED_BLOCK_SIZE 8
78
79 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
80 static u8 dtl_mask = DTL_LOG_PREEMPT;
81 #else
82 static u8 dtl_mask;
83 #endif
84
alloc_dtl_buffers(unsigned long * time_limit)85 void alloc_dtl_buffers(unsigned long *time_limit)
86 {
87 int cpu;
88 struct paca_struct *pp;
89 struct dtl_entry *dtl;
90
91 for_each_possible_cpu(cpu) {
92 pp = paca_ptrs[cpu];
93 if (pp->dispatch_log)
94 continue;
95 dtl = kmem_cache_alloc(dtl_cache, GFP_KERNEL);
96 if (!dtl) {
97 pr_warn("Failed to allocate dispatch trace log for cpu %d\n",
98 cpu);
99 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
100 pr_warn("Stolen time statistics will be unreliable\n");
101 #endif
102 break;
103 }
104
105 pp->dtl_ridx = 0;
106 pp->dispatch_log = dtl;
107 pp->dispatch_log_end = dtl + N_DISPATCH_LOG;
108 pp->dtl_curr = dtl;
109
110 if (time_limit && time_after(jiffies, *time_limit)) {
111 cond_resched();
112 *time_limit = jiffies + HZ;
113 }
114 }
115 }
116
register_dtl_buffer(int cpu)117 void register_dtl_buffer(int cpu)
118 {
119 long ret;
120 struct paca_struct *pp;
121 struct dtl_entry *dtl;
122 int hwcpu = get_hard_smp_processor_id(cpu);
123
124 pp = paca_ptrs[cpu];
125 dtl = pp->dispatch_log;
126 if (dtl && dtl_mask) {
127 pp->dtl_ridx = 0;
128 pp->dtl_curr = dtl;
129 lppaca_of(cpu).dtl_idx = 0;
130
131 /* hypervisor reads buffer length from this field */
132 dtl->enqueue_to_dispatch_time = cpu_to_be32(DISPATCH_LOG_BYTES);
133 ret = register_dtl(hwcpu, __pa(dtl));
134 if (ret)
135 pr_err("WARNING: DTL registration of cpu %d (hw %d) failed with %ld\n",
136 cpu, hwcpu, ret);
137
138 lppaca_of(cpu).dtl_enable_mask = dtl_mask;
139 }
140 }
141
142 #ifdef CONFIG_PPC_SPLPAR
143 struct dtl_worker {
144 struct delayed_work work;
145 int cpu;
146 };
147
148 struct vcpu_dispatch_data {
149 int last_disp_cpu;
150
151 int total_disp;
152
153 int same_cpu_disp;
154 int same_chip_disp;
155 int diff_chip_disp;
156 int far_chip_disp;
157
158 int numa_home_disp;
159 int numa_remote_disp;
160 int numa_far_disp;
161 };
162
163 /*
164 * This represents the number of cpus in the hypervisor. Since there is no
165 * architected way to discover the number of processors in the host, we
166 * provision for dealing with NR_CPUS. This is currently 2048 by default, and
167 * is sufficient for our purposes. This will need to be tweaked if
168 * CONFIG_NR_CPUS is changed.
169 */
170 #define NR_CPUS_H NR_CPUS
171
172 DEFINE_RWLOCK(dtl_access_lock);
173 static DEFINE_PER_CPU(struct vcpu_dispatch_data, vcpu_disp_data);
174 static DEFINE_PER_CPU(u64, dtl_entry_ridx);
175 static DEFINE_PER_CPU(struct dtl_worker, dtl_workers);
176 static enum cpuhp_state dtl_worker_state;
177 static DEFINE_MUTEX(dtl_enable_mutex);
178 static int vcpudispatch_stats_on __read_mostly;
179 static int vcpudispatch_stats_freq = 50;
180 static __be32 *vcpu_associativity, *pcpu_associativity;
181
182
free_dtl_buffers(unsigned long * time_limit)183 static void free_dtl_buffers(unsigned long *time_limit)
184 {
185 #ifndef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
186 int cpu;
187 struct paca_struct *pp;
188
189 for_each_possible_cpu(cpu) {
190 pp = paca_ptrs[cpu];
191 if (!pp->dispatch_log)
192 continue;
193 kmem_cache_free(dtl_cache, pp->dispatch_log);
194 pp->dtl_ridx = 0;
195 pp->dispatch_log = 0;
196 pp->dispatch_log_end = 0;
197 pp->dtl_curr = 0;
198
199 if (time_limit && time_after(jiffies, *time_limit)) {
200 cond_resched();
201 *time_limit = jiffies + HZ;
202 }
203 }
204 #endif
205 }
206
init_cpu_associativity(void)207 static int init_cpu_associativity(void)
208 {
209 vcpu_associativity = kcalloc(num_possible_cpus() / threads_per_core,
210 VPHN_ASSOC_BUFSIZE * sizeof(__be32), GFP_KERNEL);
211 pcpu_associativity = kcalloc(NR_CPUS_H / threads_per_core,
212 VPHN_ASSOC_BUFSIZE * sizeof(__be32), GFP_KERNEL);
213
214 if (!vcpu_associativity || !pcpu_associativity) {
215 pr_err("error allocating memory for associativity information\n");
216 return -ENOMEM;
217 }
218
219 return 0;
220 }
221
destroy_cpu_associativity(void)222 static void destroy_cpu_associativity(void)
223 {
224 kfree(vcpu_associativity);
225 kfree(pcpu_associativity);
226 vcpu_associativity = pcpu_associativity = 0;
227 }
228
__get_cpu_associativity(int cpu,__be32 * cpu_assoc,int flag)229 static __be32 *__get_cpu_associativity(int cpu, __be32 *cpu_assoc, int flag)
230 {
231 __be32 *assoc;
232 int rc = 0;
233
234 assoc = &cpu_assoc[(int)(cpu / threads_per_core) * VPHN_ASSOC_BUFSIZE];
235 if (!assoc[0]) {
236 rc = hcall_vphn(cpu, flag, &assoc[0]);
237 if (rc)
238 return NULL;
239 }
240
241 return assoc;
242 }
243
get_pcpu_associativity(int cpu)244 static __be32 *get_pcpu_associativity(int cpu)
245 {
246 return __get_cpu_associativity(cpu, pcpu_associativity, VPHN_FLAG_PCPU);
247 }
248
get_vcpu_associativity(int cpu)249 static __be32 *get_vcpu_associativity(int cpu)
250 {
251 return __get_cpu_associativity(cpu, vcpu_associativity, VPHN_FLAG_VCPU);
252 }
253
cpu_relative_dispatch_distance(int last_disp_cpu,int cur_disp_cpu)254 static int cpu_relative_dispatch_distance(int last_disp_cpu, int cur_disp_cpu)
255 {
256 __be32 *last_disp_cpu_assoc, *cur_disp_cpu_assoc;
257
258 if (last_disp_cpu >= NR_CPUS_H || cur_disp_cpu >= NR_CPUS_H)
259 return -EINVAL;
260
261 last_disp_cpu_assoc = get_pcpu_associativity(last_disp_cpu);
262 cur_disp_cpu_assoc = get_pcpu_associativity(cur_disp_cpu);
263
264 if (!last_disp_cpu_assoc || !cur_disp_cpu_assoc)
265 return -EIO;
266
267 return cpu_relative_distance(last_disp_cpu_assoc, cur_disp_cpu_assoc);
268 }
269
cpu_home_node_dispatch_distance(int disp_cpu)270 static int cpu_home_node_dispatch_distance(int disp_cpu)
271 {
272 __be32 *disp_cpu_assoc, *vcpu_assoc;
273 int vcpu_id = smp_processor_id();
274
275 if (disp_cpu >= NR_CPUS_H) {
276 pr_debug_ratelimited("vcpu dispatch cpu %d > %d\n",
277 disp_cpu, NR_CPUS_H);
278 return -EINVAL;
279 }
280
281 disp_cpu_assoc = get_pcpu_associativity(disp_cpu);
282 vcpu_assoc = get_vcpu_associativity(vcpu_id);
283
284 if (!disp_cpu_assoc || !vcpu_assoc)
285 return -EIO;
286
287 return cpu_relative_distance(disp_cpu_assoc, vcpu_assoc);
288 }
289
update_vcpu_disp_stat(int disp_cpu)290 static void update_vcpu_disp_stat(int disp_cpu)
291 {
292 struct vcpu_dispatch_data *disp;
293 int distance;
294
295 disp = this_cpu_ptr(&vcpu_disp_data);
296 if (disp->last_disp_cpu == -1) {
297 disp->last_disp_cpu = disp_cpu;
298 return;
299 }
300
301 disp->total_disp++;
302
303 if (disp->last_disp_cpu == disp_cpu ||
304 (cpu_first_thread_sibling(disp->last_disp_cpu) ==
305 cpu_first_thread_sibling(disp_cpu)))
306 disp->same_cpu_disp++;
307 else {
308 distance = cpu_relative_dispatch_distance(disp->last_disp_cpu,
309 disp_cpu);
310 if (distance < 0)
311 pr_debug_ratelimited("vcpudispatch_stats: cpu %d: error determining associativity\n",
312 smp_processor_id());
313 else {
314 switch (distance) {
315 case 0:
316 disp->same_chip_disp++;
317 break;
318 case 1:
319 disp->diff_chip_disp++;
320 break;
321 case 2:
322 disp->far_chip_disp++;
323 break;
324 default:
325 pr_debug_ratelimited("vcpudispatch_stats: cpu %d (%d -> %d): unexpected relative dispatch distance %d\n",
326 smp_processor_id(),
327 disp->last_disp_cpu,
328 disp_cpu,
329 distance);
330 }
331 }
332 }
333
334 distance = cpu_home_node_dispatch_distance(disp_cpu);
335 if (distance < 0)
336 pr_debug_ratelimited("vcpudispatch_stats: cpu %d: error determining associativity\n",
337 smp_processor_id());
338 else {
339 switch (distance) {
340 case 0:
341 disp->numa_home_disp++;
342 break;
343 case 1:
344 disp->numa_remote_disp++;
345 break;
346 case 2:
347 disp->numa_far_disp++;
348 break;
349 default:
350 pr_debug_ratelimited("vcpudispatch_stats: cpu %d on %d: unexpected numa dispatch distance %d\n",
351 smp_processor_id(),
352 disp_cpu,
353 distance);
354 }
355 }
356
357 disp->last_disp_cpu = disp_cpu;
358 }
359
process_dtl_buffer(struct work_struct * work)360 static void process_dtl_buffer(struct work_struct *work)
361 {
362 struct dtl_entry dtle;
363 u64 i = __this_cpu_read(dtl_entry_ridx);
364 struct dtl_entry *dtl = local_paca->dispatch_log + (i % N_DISPATCH_LOG);
365 struct dtl_entry *dtl_end = local_paca->dispatch_log_end;
366 struct lppaca *vpa = local_paca->lppaca_ptr;
367 struct dtl_worker *d = container_of(work, struct dtl_worker, work.work);
368
369 if (!local_paca->dispatch_log)
370 return;
371
372 /* if we have been migrated away, we cancel ourself */
373 if (d->cpu != smp_processor_id()) {
374 pr_debug("vcpudispatch_stats: cpu %d worker migrated -- canceling worker\n",
375 smp_processor_id());
376 return;
377 }
378
379 if (i == be64_to_cpu(vpa->dtl_idx))
380 goto out;
381
382 while (i < be64_to_cpu(vpa->dtl_idx)) {
383 dtle = *dtl;
384 barrier();
385 if (i + N_DISPATCH_LOG < be64_to_cpu(vpa->dtl_idx)) {
386 /* buffer has overflowed */
387 pr_debug_ratelimited("vcpudispatch_stats: cpu %d lost %lld DTL samples\n",
388 d->cpu,
389 be64_to_cpu(vpa->dtl_idx) - N_DISPATCH_LOG - i);
390 i = be64_to_cpu(vpa->dtl_idx) - N_DISPATCH_LOG;
391 dtl = local_paca->dispatch_log + (i % N_DISPATCH_LOG);
392 continue;
393 }
394 update_vcpu_disp_stat(be16_to_cpu(dtle.processor_id));
395 ++i;
396 ++dtl;
397 if (dtl == dtl_end)
398 dtl = local_paca->dispatch_log;
399 }
400
401 __this_cpu_write(dtl_entry_ridx, i);
402
403 out:
404 schedule_delayed_work_on(d->cpu, to_delayed_work(work),
405 HZ / vcpudispatch_stats_freq);
406 }
407
dtl_worker_online(unsigned int cpu)408 static int dtl_worker_online(unsigned int cpu)
409 {
410 struct dtl_worker *d = &per_cpu(dtl_workers, cpu);
411
412 memset(d, 0, sizeof(*d));
413 INIT_DELAYED_WORK(&d->work, process_dtl_buffer);
414 d->cpu = cpu;
415
416 #ifndef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
417 per_cpu(dtl_entry_ridx, cpu) = 0;
418 register_dtl_buffer(cpu);
419 #else
420 per_cpu(dtl_entry_ridx, cpu) = be64_to_cpu(lppaca_of(cpu).dtl_idx);
421 #endif
422
423 schedule_delayed_work_on(cpu, &d->work, HZ / vcpudispatch_stats_freq);
424 return 0;
425 }
426
dtl_worker_offline(unsigned int cpu)427 static int dtl_worker_offline(unsigned int cpu)
428 {
429 struct dtl_worker *d = &per_cpu(dtl_workers, cpu);
430
431 cancel_delayed_work_sync(&d->work);
432
433 #ifndef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
434 unregister_dtl(get_hard_smp_processor_id(cpu));
435 #endif
436
437 return 0;
438 }
439
set_global_dtl_mask(u8 mask)440 static void set_global_dtl_mask(u8 mask)
441 {
442 int cpu;
443
444 dtl_mask = mask;
445 for_each_present_cpu(cpu)
446 lppaca_of(cpu).dtl_enable_mask = dtl_mask;
447 }
448
reset_global_dtl_mask(void)449 static void reset_global_dtl_mask(void)
450 {
451 int cpu;
452
453 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
454 dtl_mask = DTL_LOG_PREEMPT;
455 #else
456 dtl_mask = 0;
457 #endif
458 for_each_present_cpu(cpu)
459 lppaca_of(cpu).dtl_enable_mask = dtl_mask;
460 }
461
dtl_worker_enable(unsigned long * time_limit)462 static int dtl_worker_enable(unsigned long *time_limit)
463 {
464 int rc = 0, state;
465
466 if (!write_trylock(&dtl_access_lock)) {
467 rc = -EBUSY;
468 goto out;
469 }
470
471 set_global_dtl_mask(DTL_LOG_ALL);
472
473 /* Setup dtl buffers and register those */
474 alloc_dtl_buffers(time_limit);
475
476 state = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "powerpc/dtl:online",
477 dtl_worker_online, dtl_worker_offline);
478 if (state < 0) {
479 pr_err("vcpudispatch_stats: unable to setup workqueue for DTL processing\n");
480 free_dtl_buffers(time_limit);
481 reset_global_dtl_mask();
482 write_unlock(&dtl_access_lock);
483 rc = -EINVAL;
484 goto out;
485 }
486 dtl_worker_state = state;
487
488 out:
489 return rc;
490 }
491
dtl_worker_disable(unsigned long * time_limit)492 static void dtl_worker_disable(unsigned long *time_limit)
493 {
494 cpuhp_remove_state(dtl_worker_state);
495 free_dtl_buffers(time_limit);
496 reset_global_dtl_mask();
497 write_unlock(&dtl_access_lock);
498 }
499
vcpudispatch_stats_write(struct file * file,const char __user * p,size_t count,loff_t * ppos)500 static ssize_t vcpudispatch_stats_write(struct file *file, const char __user *p,
501 size_t count, loff_t *ppos)
502 {
503 unsigned long time_limit = jiffies + HZ;
504 struct vcpu_dispatch_data *disp;
505 int rc, cmd, cpu;
506 char buf[16];
507
508 if (count > 15)
509 return -EINVAL;
510
511 if (copy_from_user(buf, p, count))
512 return -EFAULT;
513
514 buf[count] = 0;
515 rc = kstrtoint(buf, 0, &cmd);
516 if (rc || cmd < 0 || cmd > 1) {
517 pr_err("vcpudispatch_stats: please use 0 to disable or 1 to enable dispatch statistics\n");
518 return rc ? rc : -EINVAL;
519 }
520
521 mutex_lock(&dtl_enable_mutex);
522
523 if ((cmd == 0 && !vcpudispatch_stats_on) ||
524 (cmd == 1 && vcpudispatch_stats_on))
525 goto out;
526
527 if (cmd) {
528 rc = init_cpu_associativity();
529 if (rc)
530 goto out;
531
532 for_each_possible_cpu(cpu) {
533 disp = per_cpu_ptr(&vcpu_disp_data, cpu);
534 memset(disp, 0, sizeof(*disp));
535 disp->last_disp_cpu = -1;
536 }
537
538 rc = dtl_worker_enable(&time_limit);
539 if (rc) {
540 destroy_cpu_associativity();
541 goto out;
542 }
543 } else {
544 dtl_worker_disable(&time_limit);
545 destroy_cpu_associativity();
546 }
547
548 vcpudispatch_stats_on = cmd;
549
550 out:
551 mutex_unlock(&dtl_enable_mutex);
552 if (rc)
553 return rc;
554 return count;
555 }
556
vcpudispatch_stats_display(struct seq_file * p,void * v)557 static int vcpudispatch_stats_display(struct seq_file *p, void *v)
558 {
559 int cpu;
560 struct vcpu_dispatch_data *disp;
561
562 if (!vcpudispatch_stats_on) {
563 seq_puts(p, "off\n");
564 return 0;
565 }
566
567 for_each_online_cpu(cpu) {
568 disp = per_cpu_ptr(&vcpu_disp_data, cpu);
569 seq_printf(p, "cpu%d", cpu);
570 seq_put_decimal_ull(p, " ", disp->total_disp);
571 seq_put_decimal_ull(p, " ", disp->same_cpu_disp);
572 seq_put_decimal_ull(p, " ", disp->same_chip_disp);
573 seq_put_decimal_ull(p, " ", disp->diff_chip_disp);
574 seq_put_decimal_ull(p, " ", disp->far_chip_disp);
575 seq_put_decimal_ull(p, " ", disp->numa_home_disp);
576 seq_put_decimal_ull(p, " ", disp->numa_remote_disp);
577 seq_put_decimal_ull(p, " ", disp->numa_far_disp);
578 seq_puts(p, "\n");
579 }
580
581 return 0;
582 }
583
vcpudispatch_stats_open(struct inode * inode,struct file * file)584 static int vcpudispatch_stats_open(struct inode *inode, struct file *file)
585 {
586 return single_open(file, vcpudispatch_stats_display, NULL);
587 }
588
589 static const struct proc_ops vcpudispatch_stats_proc_ops = {
590 .proc_open = vcpudispatch_stats_open,
591 .proc_read = seq_read,
592 .proc_write = vcpudispatch_stats_write,
593 .proc_lseek = seq_lseek,
594 .proc_release = single_release,
595 };
596
vcpudispatch_stats_freq_write(struct file * file,const char __user * p,size_t count,loff_t * ppos)597 static ssize_t vcpudispatch_stats_freq_write(struct file *file,
598 const char __user *p, size_t count, loff_t *ppos)
599 {
600 int rc, freq;
601 char buf[16];
602
603 if (count > 15)
604 return -EINVAL;
605
606 if (copy_from_user(buf, p, count))
607 return -EFAULT;
608
609 buf[count] = 0;
610 rc = kstrtoint(buf, 0, &freq);
611 if (rc || freq < 1 || freq > HZ) {
612 pr_err("vcpudispatch_stats_freq: please specify a frequency between 1 and %d\n",
613 HZ);
614 return rc ? rc : -EINVAL;
615 }
616
617 vcpudispatch_stats_freq = freq;
618
619 return count;
620 }
621
vcpudispatch_stats_freq_display(struct seq_file * p,void * v)622 static int vcpudispatch_stats_freq_display(struct seq_file *p, void *v)
623 {
624 seq_printf(p, "%d\n", vcpudispatch_stats_freq);
625 return 0;
626 }
627
vcpudispatch_stats_freq_open(struct inode * inode,struct file * file)628 static int vcpudispatch_stats_freq_open(struct inode *inode, struct file *file)
629 {
630 return single_open(file, vcpudispatch_stats_freq_display, NULL);
631 }
632
633 static const struct proc_ops vcpudispatch_stats_freq_proc_ops = {
634 .proc_open = vcpudispatch_stats_freq_open,
635 .proc_read = seq_read,
636 .proc_write = vcpudispatch_stats_freq_write,
637 .proc_lseek = seq_lseek,
638 .proc_release = single_release,
639 };
640
vcpudispatch_stats_procfs_init(void)641 static int __init vcpudispatch_stats_procfs_init(void)
642 {
643 if (!lppaca_shared_proc())
644 return 0;
645
646 if (!proc_create("powerpc/vcpudispatch_stats", 0600, NULL,
647 &vcpudispatch_stats_proc_ops))
648 pr_err("vcpudispatch_stats: error creating procfs file\n");
649 else if (!proc_create("powerpc/vcpudispatch_stats_freq", 0600, NULL,
650 &vcpudispatch_stats_freq_proc_ops))
651 pr_err("vcpudispatch_stats_freq: error creating procfs file\n");
652
653 return 0;
654 }
655
656 machine_device_initcall(pseries, vcpudispatch_stats_procfs_init);
657
658 #ifdef CONFIG_PARAVIRT_TIME_ACCOUNTING
pseries_paravirt_steal_clock(int cpu)659 u64 pseries_paravirt_steal_clock(int cpu)
660 {
661 struct lppaca *lppaca = &lppaca_of(cpu);
662
663 return be64_to_cpu(READ_ONCE(lppaca->enqueue_dispatch_tb)) +
664 be64_to_cpu(READ_ONCE(lppaca->ready_enqueue_tb));
665 }
666 #endif
667
668 #endif /* CONFIG_PPC_SPLPAR */
669
vpa_init(int cpu)670 void vpa_init(int cpu)
671 {
672 int hwcpu = get_hard_smp_processor_id(cpu);
673 unsigned long addr;
674 long ret;
675
676 /*
677 * The spec says it "may be problematic" if CPU x registers the VPA of
678 * CPU y. We should never do that, but wail if we ever do.
679 */
680 WARN_ON(cpu != smp_processor_id());
681
682 if (cpu_has_feature(CPU_FTR_ALTIVEC))
683 lppaca_of(cpu).vmxregs_in_use = 1;
684
685 if (cpu_has_feature(CPU_FTR_ARCH_207S))
686 lppaca_of(cpu).ebb_regs_in_use = 1;
687
688 addr = __pa(&lppaca_of(cpu));
689 ret = register_vpa(hwcpu, addr);
690
691 if (ret) {
692 pr_err("WARNING: VPA registration for cpu %d (hw %d) of area "
693 "%lx failed with %ld\n", cpu, hwcpu, addr, ret);
694 return;
695 }
696
697 #ifdef CONFIG_PPC_64S_HASH_MMU
698 /*
699 * PAPR says this feature is SLB-Buffer but firmware never
700 * reports that. All SPLPAR support SLB shadow buffer.
701 */
702 if (!radix_enabled() && firmware_has_feature(FW_FEATURE_SPLPAR)) {
703 addr = __pa(paca_ptrs[cpu]->slb_shadow_ptr);
704 ret = register_slb_shadow(hwcpu, addr);
705 if (ret)
706 pr_err("WARNING: SLB shadow buffer registration for "
707 "cpu %d (hw %d) of area %lx failed with %ld\n",
708 cpu, hwcpu, addr, ret);
709 }
710 #endif /* CONFIG_PPC_64S_HASH_MMU */
711
712 /*
713 * Register dispatch trace log, if one has been allocated.
714 */
715 register_dtl_buffer(cpu);
716 }
717
718 #ifdef CONFIG_PPC_BOOK3S_64
719
pseries_lpar_register_process_table(unsigned long base,unsigned long page_size,unsigned long table_size)720 static int __init pseries_lpar_register_process_table(unsigned long base,
721 unsigned long page_size, unsigned long table_size)
722 {
723 long rc;
724 unsigned long flags = 0;
725
726 if (table_size)
727 flags |= PROC_TABLE_NEW;
728 if (radix_enabled()) {
729 flags |= PROC_TABLE_RADIX;
730 if (mmu_has_feature(MMU_FTR_GTSE))
731 flags |= PROC_TABLE_GTSE;
732 } else
733 flags |= PROC_TABLE_HPT_SLB;
734 for (;;) {
735 rc = plpar_hcall_norets(H_REGISTER_PROC_TBL, flags, base,
736 page_size, table_size);
737 if (!H_IS_LONG_BUSY(rc))
738 break;
739 mdelay(get_longbusy_msecs(rc));
740 }
741 if (rc != H_SUCCESS) {
742 pr_err("Failed to register process table (rc=%ld)\n", rc);
743 BUG();
744 }
745 return rc;
746 }
747
748 #ifdef CONFIG_PPC_64S_HASH_MMU
749
pSeries_lpar_hpte_insert(unsigned long hpte_group,unsigned long vpn,unsigned long pa,unsigned long rflags,unsigned long vflags,int psize,int apsize,int ssize)750 static long pSeries_lpar_hpte_insert(unsigned long hpte_group,
751 unsigned long vpn, unsigned long pa,
752 unsigned long rflags, unsigned long vflags,
753 int psize, int apsize, int ssize)
754 {
755 unsigned long lpar_rc;
756 unsigned long flags;
757 unsigned long slot;
758 unsigned long hpte_v, hpte_r;
759
760 if (!(vflags & HPTE_V_BOLTED))
761 pr_devel("hpte_insert(group=%lx, vpn=%016lx, "
762 "pa=%016lx, rflags=%lx, vflags=%lx, psize=%d)\n",
763 hpte_group, vpn, pa, rflags, vflags, psize);
764
765 hpte_v = hpte_encode_v(vpn, psize, apsize, ssize) | vflags | HPTE_V_VALID;
766 hpte_r = hpte_encode_r(pa, psize, apsize) | rflags;
767
768 if (!(vflags & HPTE_V_BOLTED))
769 pr_devel(" hpte_v=%016lx, hpte_r=%016lx\n", hpte_v, hpte_r);
770
771 /* Now fill in the actual HPTE */
772 /* Set CEC cookie to 0 */
773 /* Zero page = 0 */
774 /* I-cache Invalidate = 0 */
775 /* I-cache synchronize = 0 */
776 /* Exact = 0 */
777 flags = 0;
778
779 if (firmware_has_feature(FW_FEATURE_XCMO) && !(hpte_r & HPTE_R_N))
780 flags |= H_COALESCE_CAND;
781
782 lpar_rc = plpar_pte_enter(flags, hpte_group, hpte_v, hpte_r, &slot);
783 if (unlikely(lpar_rc == H_PTEG_FULL)) {
784 pr_devel("Hash table group is full\n");
785 return -1;
786 }
787
788 /*
789 * Since we try and ioremap PHBs we don't own, the pte insert
790 * will fail. However we must catch the failure in hash_page
791 * or we will loop forever, so return -2 in this case.
792 */
793 if (unlikely(lpar_rc != H_SUCCESS)) {
794 pr_err("Failed hash pte insert with error %ld\n", lpar_rc);
795 return -2;
796 }
797 if (!(vflags & HPTE_V_BOLTED))
798 pr_devel(" -> slot: %lu\n", slot & 7);
799
800 /* Because of iSeries, we have to pass down the secondary
801 * bucket bit here as well
802 */
803 return (slot & 7) | (!!(vflags & HPTE_V_SECONDARY) << 3);
804 }
805
806 static DEFINE_SPINLOCK(pSeries_lpar_tlbie_lock);
807
pSeries_lpar_hpte_remove(unsigned long hpte_group)808 static long pSeries_lpar_hpte_remove(unsigned long hpte_group)
809 {
810 unsigned long slot_offset;
811 unsigned long lpar_rc;
812 int i;
813 unsigned long dummy1, dummy2;
814
815 /* pick a random slot to start at */
816 slot_offset = mftb() & 0x7;
817
818 for (i = 0; i < HPTES_PER_GROUP; i++) {
819
820 /* don't remove a bolted entry */
821 lpar_rc = plpar_pte_remove(H_ANDCOND, hpte_group + slot_offset,
822 HPTE_V_BOLTED, &dummy1, &dummy2);
823 if (lpar_rc == H_SUCCESS)
824 return i;
825
826 /*
827 * The test for adjunct partition is performed before the
828 * ANDCOND test. H_RESOURCE may be returned, so we need to
829 * check for that as well.
830 */
831 BUG_ON(lpar_rc != H_NOT_FOUND && lpar_rc != H_RESOURCE);
832
833 slot_offset++;
834 slot_offset &= 0x7;
835 }
836
837 return -1;
838 }
839
840 /* Called during kexec sequence with MMU off */
manual_hpte_clear_all(void)841 static notrace void manual_hpte_clear_all(void)
842 {
843 unsigned long size_bytes = 1UL << ppc64_pft_size;
844 unsigned long hpte_count = size_bytes >> 4;
845 struct {
846 unsigned long pteh;
847 unsigned long ptel;
848 } ptes[4];
849 long lpar_rc;
850 unsigned long i, j;
851
852 /* Read in batches of 4,
853 * invalidate only valid entries not in the VRMA
854 * hpte_count will be a multiple of 4
855 */
856 for (i = 0; i < hpte_count; i += 4) {
857 lpar_rc = plpar_pte_read_4_raw(0, i, (void *)ptes);
858 if (lpar_rc != H_SUCCESS) {
859 pr_info("Failed to read hash page table at %ld err %ld\n",
860 i, lpar_rc);
861 continue;
862 }
863 for (j = 0; j < 4; j++){
864 if ((ptes[j].pteh & HPTE_V_VRMA_MASK) ==
865 HPTE_V_VRMA_MASK)
866 continue;
867 if (ptes[j].pteh & HPTE_V_VALID)
868 plpar_pte_remove_raw(0, i + j, 0,
869 &(ptes[j].pteh), &(ptes[j].ptel));
870 }
871 }
872 }
873
874 /* Called during kexec sequence with MMU off */
hcall_hpte_clear_all(void)875 static notrace int hcall_hpte_clear_all(void)
876 {
877 int rc;
878
879 do {
880 rc = plpar_hcall_norets(H_CLEAR_HPT);
881 } while (rc == H_CONTINUE);
882
883 return rc;
884 }
885
886 /* Called during kexec sequence with MMU off */
pseries_hpte_clear_all(void)887 static notrace void pseries_hpte_clear_all(void)
888 {
889 int rc;
890
891 rc = hcall_hpte_clear_all();
892 if (rc != H_SUCCESS)
893 manual_hpte_clear_all();
894
895 #ifdef __LITTLE_ENDIAN__
896 /*
897 * Reset exceptions to big endian.
898 *
899 * FIXME this is a hack for kexec, we need to reset the exception
900 * endian before starting the new kernel and this is a convenient place
901 * to do it.
902 *
903 * This is also called on boot when a fadump happens. In that case we
904 * must not change the exception endian mode.
905 */
906 if (firmware_has_feature(FW_FEATURE_SET_MODE) && !is_fadump_active())
907 pseries_big_endian_exceptions();
908 #endif
909 }
910
911 /*
912 * NOTE: for updatepp ops we are fortunate that the linux "newpp" bits and
913 * the low 3 bits of flags happen to line up. So no transform is needed.
914 * We can probably optimize here and assume the high bits of newpp are
915 * already zero. For now I am paranoid.
916 */
pSeries_lpar_hpte_updatepp(unsigned long slot,unsigned long newpp,unsigned long vpn,int psize,int apsize,int ssize,unsigned long inv_flags)917 static long pSeries_lpar_hpte_updatepp(unsigned long slot,
918 unsigned long newpp,
919 unsigned long vpn,
920 int psize, int apsize,
921 int ssize, unsigned long inv_flags)
922 {
923 unsigned long lpar_rc;
924 unsigned long flags;
925 unsigned long want_v;
926
927 want_v = hpte_encode_avpn(vpn, psize, ssize);
928
929 flags = (newpp & (HPTE_R_PP | HPTE_R_N | HPTE_R_KEY_LO)) | H_AVPN;
930 flags |= (newpp & HPTE_R_KEY_HI) >> 48;
931 if (mmu_has_feature(MMU_FTR_KERNEL_RO))
932 /* Move pp0 into bit 8 (IBM 55) */
933 flags |= (newpp & HPTE_R_PP0) >> 55;
934
935 pr_devel(" update: avpnv=%016lx, hash=%016lx, f=%lx, psize: %d ...",
936 want_v, slot, flags, psize);
937
938 lpar_rc = plpar_pte_protect(flags, slot, want_v);
939
940 if (lpar_rc == H_NOT_FOUND) {
941 pr_devel("not found !\n");
942 return -1;
943 }
944
945 pr_devel("ok\n");
946
947 BUG_ON(lpar_rc != H_SUCCESS);
948
949 return 0;
950 }
951
__pSeries_lpar_hpte_find(unsigned long want_v,unsigned long hpte_group)952 static long __pSeries_lpar_hpte_find(unsigned long want_v, unsigned long hpte_group)
953 {
954 long lpar_rc;
955 unsigned long i, j;
956 struct {
957 unsigned long pteh;
958 unsigned long ptel;
959 } ptes[4];
960
961 for (i = 0; i < HPTES_PER_GROUP; i += 4, hpte_group += 4) {
962
963 lpar_rc = plpar_pte_read_4(0, hpte_group, (void *)ptes);
964 if (lpar_rc != H_SUCCESS) {
965 pr_info("Failed to read hash page table at %ld err %ld\n",
966 hpte_group, lpar_rc);
967 continue;
968 }
969
970 for (j = 0; j < 4; j++) {
971 if (HPTE_V_COMPARE(ptes[j].pteh, want_v) &&
972 (ptes[j].pteh & HPTE_V_VALID))
973 return i + j;
974 }
975 }
976
977 return -1;
978 }
979
pSeries_lpar_hpte_find(unsigned long vpn,int psize,int ssize)980 static long pSeries_lpar_hpte_find(unsigned long vpn, int psize, int ssize)
981 {
982 long slot;
983 unsigned long hash;
984 unsigned long want_v;
985 unsigned long hpte_group;
986
987 hash = hpt_hash(vpn, mmu_psize_defs[psize].shift, ssize);
988 want_v = hpte_encode_avpn(vpn, psize, ssize);
989
990 /*
991 * We try to keep bolted entries always in primary hash
992 * But in some case we can find them in secondary too.
993 */
994 hpte_group = (hash & htab_hash_mask) * HPTES_PER_GROUP;
995 slot = __pSeries_lpar_hpte_find(want_v, hpte_group);
996 if (slot < 0) {
997 /* Try in secondary */
998 hpte_group = (~hash & htab_hash_mask) * HPTES_PER_GROUP;
999 slot = __pSeries_lpar_hpte_find(want_v, hpte_group);
1000 if (slot < 0)
1001 return -1;
1002 }
1003 return hpte_group + slot;
1004 }
1005
pSeries_lpar_hpte_updateboltedpp(unsigned long newpp,unsigned long ea,int psize,int ssize)1006 static void pSeries_lpar_hpte_updateboltedpp(unsigned long newpp,
1007 unsigned long ea,
1008 int psize, int ssize)
1009 {
1010 unsigned long vpn;
1011 unsigned long lpar_rc, slot, vsid, flags;
1012
1013 vsid = get_kernel_vsid(ea, ssize);
1014 vpn = hpt_vpn(ea, vsid, ssize);
1015
1016 slot = pSeries_lpar_hpte_find(vpn, psize, ssize);
1017 BUG_ON(slot == -1);
1018
1019 flags = newpp & (HPTE_R_PP | HPTE_R_N);
1020 if (mmu_has_feature(MMU_FTR_KERNEL_RO))
1021 /* Move pp0 into bit 8 (IBM 55) */
1022 flags |= (newpp & HPTE_R_PP0) >> 55;
1023
1024 flags |= ((newpp & HPTE_R_KEY_HI) >> 48) | (newpp & HPTE_R_KEY_LO);
1025
1026 lpar_rc = plpar_pte_protect(flags, slot, 0);
1027
1028 BUG_ON(lpar_rc != H_SUCCESS);
1029 }
1030
pSeries_lpar_hpte_invalidate(unsigned long slot,unsigned long vpn,int psize,int apsize,int ssize,int local)1031 static void pSeries_lpar_hpte_invalidate(unsigned long slot, unsigned long vpn,
1032 int psize, int apsize,
1033 int ssize, int local)
1034 {
1035 unsigned long want_v;
1036 unsigned long lpar_rc;
1037 unsigned long dummy1, dummy2;
1038
1039 pr_devel(" inval : slot=%lx, vpn=%016lx, psize: %d, local: %d\n",
1040 slot, vpn, psize, local);
1041
1042 want_v = hpte_encode_avpn(vpn, psize, ssize);
1043 lpar_rc = plpar_pte_remove(H_AVPN, slot, want_v, &dummy1, &dummy2);
1044 if (lpar_rc == H_NOT_FOUND)
1045 return;
1046
1047 BUG_ON(lpar_rc != H_SUCCESS);
1048 }
1049
1050
1051 /*
1052 * As defined in the PAPR's section 14.5.4.1.8
1053 * The control mask doesn't include the returned reference and change bit from
1054 * the processed PTE.
1055 */
1056 #define HBLKR_AVPN 0x0100000000000000UL
1057 #define HBLKR_CTRL_MASK 0xf800000000000000UL
1058 #define HBLKR_CTRL_SUCCESS 0x8000000000000000UL
1059 #define HBLKR_CTRL_ERRNOTFOUND 0x8800000000000000UL
1060 #define HBLKR_CTRL_ERRBUSY 0xa000000000000000UL
1061
1062 /*
1063 * Returned true if we are supporting this block size for the specified segment
1064 * base page size and actual page size.
1065 *
1066 * Currently, we only support 8 size block.
1067 */
is_supported_hlbkrm(int bpsize,int psize)1068 static inline bool is_supported_hlbkrm(int bpsize, int psize)
1069 {
1070 return (hblkrm_size[bpsize][psize] == HBLKRM_SUPPORTED_BLOCK_SIZE);
1071 }
1072
1073 /**
1074 * H_BLOCK_REMOVE caller.
1075 * @idx should point to the latest @param entry set with a PTEX.
1076 * If PTE cannot be processed because another CPUs has already locked that
1077 * group, those entries are put back in @param starting at index 1.
1078 * If entries has to be retried and @retry_busy is set to true, these entries
1079 * are retried until success. If @retry_busy is set to false, the returned
1080 * is the number of entries yet to process.
1081 */
call_block_remove(unsigned long idx,unsigned long * param,bool retry_busy)1082 static unsigned long call_block_remove(unsigned long idx, unsigned long *param,
1083 bool retry_busy)
1084 {
1085 unsigned long i, rc, new_idx;
1086 unsigned long retbuf[PLPAR_HCALL9_BUFSIZE];
1087
1088 if (idx < 2) {
1089 pr_warn("Unexpected empty call to H_BLOCK_REMOVE");
1090 return 0;
1091 }
1092 again:
1093 new_idx = 0;
1094 if (idx > PLPAR_HCALL9_BUFSIZE) {
1095 pr_err("Too many PTEs (%lu) for H_BLOCK_REMOVE", idx);
1096 idx = PLPAR_HCALL9_BUFSIZE;
1097 } else if (idx < PLPAR_HCALL9_BUFSIZE)
1098 param[idx] = HBR_END;
1099
1100 rc = plpar_hcall9(H_BLOCK_REMOVE, retbuf,
1101 param[0], /* AVA */
1102 param[1], param[2], param[3], param[4], /* TS0-7 */
1103 param[5], param[6], param[7], param[8]);
1104 if (rc == H_SUCCESS)
1105 return 0;
1106
1107 BUG_ON(rc != H_PARTIAL);
1108
1109 /* Check that the unprocessed entries were 'not found' or 'busy' */
1110 for (i = 0; i < idx-1; i++) {
1111 unsigned long ctrl = retbuf[i] & HBLKR_CTRL_MASK;
1112
1113 if (ctrl == HBLKR_CTRL_ERRBUSY) {
1114 param[++new_idx] = param[i+1];
1115 continue;
1116 }
1117
1118 BUG_ON(ctrl != HBLKR_CTRL_SUCCESS
1119 && ctrl != HBLKR_CTRL_ERRNOTFOUND);
1120 }
1121
1122 /*
1123 * If there were entries found busy, retry these entries if requested,
1124 * of if all the entries have to be retried.
1125 */
1126 if (new_idx && (retry_busy || new_idx == (PLPAR_HCALL9_BUFSIZE-1))) {
1127 idx = new_idx + 1;
1128 goto again;
1129 }
1130
1131 return new_idx;
1132 }
1133
1134 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1135 /*
1136 * Limit iterations holding pSeries_lpar_tlbie_lock to 3. We also need
1137 * to make sure that we avoid bouncing the hypervisor tlbie lock.
1138 */
1139 #define PPC64_HUGE_HPTE_BATCH 12
1140
hugepage_block_invalidate(unsigned long * slot,unsigned long * vpn,int count,int psize,int ssize)1141 static void hugepage_block_invalidate(unsigned long *slot, unsigned long *vpn,
1142 int count, int psize, int ssize)
1143 {
1144 unsigned long param[PLPAR_HCALL9_BUFSIZE];
1145 unsigned long shift, current_vpgb, vpgb;
1146 int i, pix = 0;
1147
1148 shift = mmu_psize_defs[psize].shift;
1149
1150 for (i = 0; i < count; i++) {
1151 /*
1152 * Shifting 3 bits more on the right to get a
1153 * 8 pages aligned virtual addresse.
1154 */
1155 vpgb = (vpn[i] >> (shift - VPN_SHIFT + 3));
1156 if (!pix || vpgb != current_vpgb) {
1157 /*
1158 * Need to start a new 8 pages block, flush
1159 * the current one if needed.
1160 */
1161 if (pix)
1162 (void)call_block_remove(pix, param, true);
1163 current_vpgb = vpgb;
1164 param[0] = hpte_encode_avpn(vpn[i], psize, ssize);
1165 pix = 1;
1166 }
1167
1168 param[pix++] = HBR_REQUEST | HBLKR_AVPN | slot[i];
1169 if (pix == PLPAR_HCALL9_BUFSIZE) {
1170 pix = call_block_remove(pix, param, false);
1171 /*
1172 * pix = 0 means that all the entries were
1173 * removed, we can start a new block.
1174 * Otherwise, this means that there are entries
1175 * to retry, and pix points to latest one, so
1176 * we should increment it and try to continue
1177 * the same block.
1178 */
1179 if (pix)
1180 pix++;
1181 }
1182 }
1183 if (pix)
1184 (void)call_block_remove(pix, param, true);
1185 }
1186
hugepage_bulk_invalidate(unsigned long * slot,unsigned long * vpn,int count,int psize,int ssize)1187 static void hugepage_bulk_invalidate(unsigned long *slot, unsigned long *vpn,
1188 int count, int psize, int ssize)
1189 {
1190 unsigned long param[PLPAR_HCALL9_BUFSIZE];
1191 int i = 0, pix = 0, rc;
1192
1193 for (i = 0; i < count; i++) {
1194
1195 if (!firmware_has_feature(FW_FEATURE_BULK_REMOVE)) {
1196 pSeries_lpar_hpte_invalidate(slot[i], vpn[i], psize, 0,
1197 ssize, 0);
1198 } else {
1199 param[pix] = HBR_REQUEST | HBR_AVPN | slot[i];
1200 param[pix+1] = hpte_encode_avpn(vpn[i], psize, ssize);
1201 pix += 2;
1202 if (pix == 8) {
1203 rc = plpar_hcall9(H_BULK_REMOVE, param,
1204 param[0], param[1], param[2],
1205 param[3], param[4], param[5],
1206 param[6], param[7]);
1207 BUG_ON(rc != H_SUCCESS);
1208 pix = 0;
1209 }
1210 }
1211 }
1212 if (pix) {
1213 param[pix] = HBR_END;
1214 rc = plpar_hcall9(H_BULK_REMOVE, param, param[0], param[1],
1215 param[2], param[3], param[4], param[5],
1216 param[6], param[7]);
1217 BUG_ON(rc != H_SUCCESS);
1218 }
1219 }
1220
__pSeries_lpar_hugepage_invalidate(unsigned long * slot,unsigned long * vpn,int count,int psize,int ssize)1221 static inline void __pSeries_lpar_hugepage_invalidate(unsigned long *slot,
1222 unsigned long *vpn,
1223 int count, int psize,
1224 int ssize)
1225 {
1226 unsigned long flags = 0;
1227 int lock_tlbie = !mmu_has_feature(MMU_FTR_LOCKLESS_TLBIE);
1228
1229 if (lock_tlbie)
1230 spin_lock_irqsave(&pSeries_lpar_tlbie_lock, flags);
1231
1232 /* Assuming THP size is 16M */
1233 if (is_supported_hlbkrm(psize, MMU_PAGE_16M))
1234 hugepage_block_invalidate(slot, vpn, count, psize, ssize);
1235 else
1236 hugepage_bulk_invalidate(slot, vpn, count, psize, ssize);
1237
1238 if (lock_tlbie)
1239 spin_unlock_irqrestore(&pSeries_lpar_tlbie_lock, flags);
1240 }
1241
pSeries_lpar_hugepage_invalidate(unsigned long vsid,unsigned long addr,unsigned char * hpte_slot_array,int psize,int ssize,int local)1242 static void pSeries_lpar_hugepage_invalidate(unsigned long vsid,
1243 unsigned long addr,
1244 unsigned char *hpte_slot_array,
1245 int psize, int ssize, int local)
1246 {
1247 int i, index = 0;
1248 unsigned long s_addr = addr;
1249 unsigned int max_hpte_count, valid;
1250 unsigned long vpn_array[PPC64_HUGE_HPTE_BATCH];
1251 unsigned long slot_array[PPC64_HUGE_HPTE_BATCH];
1252 unsigned long shift, hidx, vpn = 0, hash, slot;
1253
1254 shift = mmu_psize_defs[psize].shift;
1255 max_hpte_count = 1U << (PMD_SHIFT - shift);
1256
1257 for (i = 0; i < max_hpte_count; i++) {
1258 valid = hpte_valid(hpte_slot_array, i);
1259 if (!valid)
1260 continue;
1261 hidx = hpte_hash_index(hpte_slot_array, i);
1262
1263 /* get the vpn */
1264 addr = s_addr + (i * (1ul << shift));
1265 vpn = hpt_vpn(addr, vsid, ssize);
1266 hash = hpt_hash(vpn, shift, ssize);
1267 if (hidx & _PTEIDX_SECONDARY)
1268 hash = ~hash;
1269
1270 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
1271 slot += hidx & _PTEIDX_GROUP_IX;
1272
1273 slot_array[index] = slot;
1274 vpn_array[index] = vpn;
1275 if (index == PPC64_HUGE_HPTE_BATCH - 1) {
1276 /*
1277 * Now do a bluk invalidate
1278 */
1279 __pSeries_lpar_hugepage_invalidate(slot_array,
1280 vpn_array,
1281 PPC64_HUGE_HPTE_BATCH,
1282 psize, ssize);
1283 index = 0;
1284 } else
1285 index++;
1286 }
1287 if (index)
1288 __pSeries_lpar_hugepage_invalidate(slot_array, vpn_array,
1289 index, psize, ssize);
1290 }
1291 #else
pSeries_lpar_hugepage_invalidate(unsigned long vsid,unsigned long addr,unsigned char * hpte_slot_array,int psize,int ssize,int local)1292 static void pSeries_lpar_hugepage_invalidate(unsigned long vsid,
1293 unsigned long addr,
1294 unsigned char *hpte_slot_array,
1295 int psize, int ssize, int local)
1296 {
1297 WARN(1, "%s called without THP support\n", __func__);
1298 }
1299 #endif
1300
pSeries_lpar_hpte_removebolted(unsigned long ea,int psize,int ssize)1301 static int pSeries_lpar_hpte_removebolted(unsigned long ea,
1302 int psize, int ssize)
1303 {
1304 unsigned long vpn;
1305 unsigned long slot, vsid;
1306
1307 vsid = get_kernel_vsid(ea, ssize);
1308 vpn = hpt_vpn(ea, vsid, ssize);
1309
1310 slot = pSeries_lpar_hpte_find(vpn, psize, ssize);
1311 if (slot == -1)
1312 return -ENOENT;
1313
1314 /*
1315 * lpar doesn't use the passed actual page size
1316 */
1317 pSeries_lpar_hpte_invalidate(slot, vpn, psize, 0, ssize, 0);
1318 return 0;
1319 }
1320
1321
compute_slot(real_pte_t pte,unsigned long vpn,unsigned long index,unsigned long shift,int ssize)1322 static inline unsigned long compute_slot(real_pte_t pte,
1323 unsigned long vpn,
1324 unsigned long index,
1325 unsigned long shift,
1326 int ssize)
1327 {
1328 unsigned long slot, hash, hidx;
1329
1330 hash = hpt_hash(vpn, shift, ssize);
1331 hidx = __rpte_to_hidx(pte, index);
1332 if (hidx & _PTEIDX_SECONDARY)
1333 hash = ~hash;
1334 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
1335 slot += hidx & _PTEIDX_GROUP_IX;
1336 return slot;
1337 }
1338
1339 /**
1340 * The hcall H_BLOCK_REMOVE implies that the virtual pages to processed are
1341 * "all within the same naturally aligned 8 page virtual address block".
1342 */
do_block_remove(unsigned long number,struct ppc64_tlb_batch * batch,unsigned long * param)1343 static void do_block_remove(unsigned long number, struct ppc64_tlb_batch *batch,
1344 unsigned long *param)
1345 {
1346 unsigned long vpn;
1347 unsigned long i, pix = 0;
1348 unsigned long index, shift, slot, current_vpgb, vpgb;
1349 real_pte_t pte;
1350 int psize, ssize;
1351
1352 psize = batch->psize;
1353 ssize = batch->ssize;
1354
1355 for (i = 0; i < number; i++) {
1356 vpn = batch->vpn[i];
1357 pte = batch->pte[i];
1358 pte_iterate_hashed_subpages(pte, psize, vpn, index, shift) {
1359 /*
1360 * Shifting 3 bits more on the right to get a
1361 * 8 pages aligned virtual addresse.
1362 */
1363 vpgb = (vpn >> (shift - VPN_SHIFT + 3));
1364 if (!pix || vpgb != current_vpgb) {
1365 /*
1366 * Need to start a new 8 pages block, flush
1367 * the current one if needed.
1368 */
1369 if (pix)
1370 (void)call_block_remove(pix, param,
1371 true);
1372 current_vpgb = vpgb;
1373 param[0] = hpte_encode_avpn(vpn, psize,
1374 ssize);
1375 pix = 1;
1376 }
1377
1378 slot = compute_slot(pte, vpn, index, shift, ssize);
1379 param[pix++] = HBR_REQUEST | HBLKR_AVPN | slot;
1380
1381 if (pix == PLPAR_HCALL9_BUFSIZE) {
1382 pix = call_block_remove(pix, param, false);
1383 /*
1384 * pix = 0 means that all the entries were
1385 * removed, we can start a new block.
1386 * Otherwise, this means that there are entries
1387 * to retry, and pix points to latest one, so
1388 * we should increment it and try to continue
1389 * the same block.
1390 */
1391 if (pix)
1392 pix++;
1393 }
1394 } pte_iterate_hashed_end();
1395 }
1396
1397 if (pix)
1398 (void)call_block_remove(pix, param, true);
1399 }
1400
1401 /*
1402 * TLB Block Invalidate Characteristics
1403 *
1404 * These characteristics define the size of the block the hcall H_BLOCK_REMOVE
1405 * is able to process for each couple segment base page size, actual page size.
1406 *
1407 * The ibm,get-system-parameter properties is returning a buffer with the
1408 * following layout:
1409 *
1410 * [ 2 bytes size of the RTAS buffer (excluding these 2 bytes) ]
1411 * -----------------
1412 * TLB Block Invalidate Specifiers:
1413 * [ 1 byte LOG base 2 of the TLB invalidate block size being specified ]
1414 * [ 1 byte Number of page sizes (N) that are supported for the specified
1415 * TLB invalidate block size ]
1416 * [ 1 byte Encoded segment base page size and actual page size
1417 * MSB=0 means 4k segment base page size and actual page size
1418 * MSB=1 the penc value in mmu_psize_def ]
1419 * ...
1420 * -----------------
1421 * Next TLB Block Invalidate Specifiers...
1422 * -----------------
1423 * [ 0 ]
1424 */
set_hblkrm_bloc_size(int bpsize,int psize,unsigned int block_size)1425 static inline void set_hblkrm_bloc_size(int bpsize, int psize,
1426 unsigned int block_size)
1427 {
1428 if (block_size > hblkrm_size[bpsize][psize])
1429 hblkrm_size[bpsize][psize] = block_size;
1430 }
1431
1432 /*
1433 * Decode the Encoded segment base page size and actual page size.
1434 * PAPR specifies:
1435 * - bit 7 is the L bit
1436 * - bits 0-5 are the penc value
1437 * If the L bit is 0, this means 4K segment base page size and actual page size
1438 * otherwise the penc value should be read.
1439 */
1440 #define HBLKRM_L_MASK 0x80
1441 #define HBLKRM_PENC_MASK 0x3f
check_lp_set_hblkrm(unsigned int lp,unsigned int block_size)1442 static inline void __init check_lp_set_hblkrm(unsigned int lp,
1443 unsigned int block_size)
1444 {
1445 unsigned int bpsize, psize;
1446
1447 /* First, check the L bit, if not set, this means 4K */
1448 if ((lp & HBLKRM_L_MASK) == 0) {
1449 set_hblkrm_bloc_size(MMU_PAGE_4K, MMU_PAGE_4K, block_size);
1450 return;
1451 }
1452
1453 lp &= HBLKRM_PENC_MASK;
1454 for (bpsize = 0; bpsize < MMU_PAGE_COUNT; bpsize++) {
1455 struct mmu_psize_def *def = &mmu_psize_defs[bpsize];
1456
1457 for (psize = 0; psize < MMU_PAGE_COUNT; psize++) {
1458 if (def->penc[psize] == lp) {
1459 set_hblkrm_bloc_size(bpsize, psize, block_size);
1460 return;
1461 }
1462 }
1463 }
1464 }
1465
1466 /*
1467 * The size of the TLB Block Invalidate Characteristics is variable. But at the
1468 * maximum it will be the number of possible page sizes *2 + 10 bytes.
1469 * Currently MMU_PAGE_COUNT is 16, which means 42 bytes. Use a cache line size
1470 * (128 bytes) for the buffer to get plenty of space.
1471 */
1472 #define SPLPAR_TLB_BIC_MAXLENGTH 128
1473
pseries_lpar_read_hblkrm_characteristics(void)1474 void __init pseries_lpar_read_hblkrm_characteristics(void)
1475 {
1476 static struct papr_sysparm_buf buf __initdata;
1477 int len, idx, bpsize;
1478
1479 if (!firmware_has_feature(FW_FEATURE_BLOCK_REMOVE))
1480 return;
1481
1482 if (papr_sysparm_get(PAPR_SYSPARM_TLB_BLOCK_INVALIDATE_ATTRS, &buf))
1483 return;
1484
1485 len = be16_to_cpu(buf.len);
1486 if (len > SPLPAR_TLB_BIC_MAXLENGTH) {
1487 pr_warn("%s too large returned buffer %d", __func__, len);
1488 return;
1489 }
1490
1491 idx = 0;
1492 while (idx < len) {
1493 u8 block_shift = buf.val[idx++];
1494 u32 block_size;
1495 unsigned int npsize;
1496
1497 if (!block_shift)
1498 break;
1499
1500 block_size = 1 << block_shift;
1501
1502 for (npsize = buf.val[idx++];
1503 npsize > 0 && idx < len; npsize--)
1504 check_lp_set_hblkrm((unsigned int)buf.val[idx++],
1505 block_size);
1506 }
1507
1508 for (bpsize = 0; bpsize < MMU_PAGE_COUNT; bpsize++)
1509 for (idx = 0; idx < MMU_PAGE_COUNT; idx++)
1510 if (hblkrm_size[bpsize][idx])
1511 pr_info("H_BLOCK_REMOVE supports base psize:%d psize:%d block size:%d",
1512 bpsize, idx, hblkrm_size[bpsize][idx]);
1513 }
1514
1515 /*
1516 * Take a spinlock around flushes to avoid bouncing the hypervisor tlbie
1517 * lock.
1518 */
pSeries_lpar_flush_hash_range(unsigned long number,int local)1519 static void pSeries_lpar_flush_hash_range(unsigned long number, int local)
1520 {
1521 unsigned long vpn;
1522 unsigned long i, pix, rc;
1523 unsigned long flags = 0;
1524 struct ppc64_tlb_batch *batch = this_cpu_ptr(&ppc64_tlb_batch);
1525 int lock_tlbie = !mmu_has_feature(MMU_FTR_LOCKLESS_TLBIE);
1526 unsigned long param[PLPAR_HCALL9_BUFSIZE];
1527 unsigned long index, shift, slot;
1528 real_pte_t pte;
1529 int psize, ssize;
1530
1531 if (lock_tlbie)
1532 spin_lock_irqsave(&pSeries_lpar_tlbie_lock, flags);
1533
1534 if (is_supported_hlbkrm(batch->psize, batch->psize)) {
1535 do_block_remove(number, batch, param);
1536 goto out;
1537 }
1538
1539 psize = batch->psize;
1540 ssize = batch->ssize;
1541 pix = 0;
1542 for (i = 0; i < number; i++) {
1543 vpn = batch->vpn[i];
1544 pte = batch->pte[i];
1545 pte_iterate_hashed_subpages(pte, psize, vpn, index, shift) {
1546 slot = compute_slot(pte, vpn, index, shift, ssize);
1547 if (!firmware_has_feature(FW_FEATURE_BULK_REMOVE)) {
1548 /*
1549 * lpar doesn't use the passed actual page size
1550 */
1551 pSeries_lpar_hpte_invalidate(slot, vpn, psize,
1552 0, ssize, local);
1553 } else {
1554 param[pix] = HBR_REQUEST | HBR_AVPN | slot;
1555 param[pix+1] = hpte_encode_avpn(vpn, psize,
1556 ssize);
1557 pix += 2;
1558 if (pix == 8) {
1559 rc = plpar_hcall9(H_BULK_REMOVE, param,
1560 param[0], param[1], param[2],
1561 param[3], param[4], param[5],
1562 param[6], param[7]);
1563 BUG_ON(rc != H_SUCCESS);
1564 pix = 0;
1565 }
1566 }
1567 } pte_iterate_hashed_end();
1568 }
1569 if (pix) {
1570 param[pix] = HBR_END;
1571 rc = plpar_hcall9(H_BULK_REMOVE, param, param[0], param[1],
1572 param[2], param[3], param[4], param[5],
1573 param[6], param[7]);
1574 BUG_ON(rc != H_SUCCESS);
1575 }
1576
1577 out:
1578 if (lock_tlbie)
1579 spin_unlock_irqrestore(&pSeries_lpar_tlbie_lock, flags);
1580 }
1581
disable_bulk_remove(char * str)1582 static int __init disable_bulk_remove(char *str)
1583 {
1584 if (strcmp(str, "off") == 0 &&
1585 firmware_has_feature(FW_FEATURE_BULK_REMOVE)) {
1586 pr_info("Disabling BULK_REMOVE firmware feature");
1587 powerpc_firmware_features &= ~FW_FEATURE_BULK_REMOVE;
1588 }
1589 return 1;
1590 }
1591
1592 __setup("bulk_remove=", disable_bulk_remove);
1593
1594 #define HPT_RESIZE_TIMEOUT 10000 /* ms */
1595
1596 struct hpt_resize_state {
1597 unsigned long shift;
1598 int commit_rc;
1599 };
1600
pseries_lpar_resize_hpt_commit(void * data)1601 static int pseries_lpar_resize_hpt_commit(void *data)
1602 {
1603 struct hpt_resize_state *state = data;
1604
1605 state->commit_rc = plpar_resize_hpt_commit(0, state->shift);
1606 if (state->commit_rc != H_SUCCESS)
1607 return -EIO;
1608
1609 /* Hypervisor has transitioned the HTAB, update our globals */
1610 ppc64_pft_size = state->shift;
1611 htab_size_bytes = 1UL << ppc64_pft_size;
1612 htab_hash_mask = (htab_size_bytes >> 7) - 1;
1613
1614 return 0;
1615 }
1616
1617 /*
1618 * Must be called in process context. The caller must hold the
1619 * cpus_lock.
1620 */
pseries_lpar_resize_hpt(unsigned long shift)1621 static int pseries_lpar_resize_hpt(unsigned long shift)
1622 {
1623 struct hpt_resize_state state = {
1624 .shift = shift,
1625 .commit_rc = H_FUNCTION,
1626 };
1627 unsigned int delay, total_delay = 0;
1628 int rc;
1629 ktime_t t0, t1, t2;
1630
1631 might_sleep();
1632
1633 if (!firmware_has_feature(FW_FEATURE_HPT_RESIZE))
1634 return -ENODEV;
1635
1636 pr_info("Attempting to resize HPT to shift %lu\n", shift);
1637
1638 t0 = ktime_get();
1639
1640 rc = plpar_resize_hpt_prepare(0, shift);
1641 while (H_IS_LONG_BUSY(rc)) {
1642 delay = get_longbusy_msecs(rc);
1643 total_delay += delay;
1644 if (total_delay > HPT_RESIZE_TIMEOUT) {
1645 /* prepare with shift==0 cancels an in-progress resize */
1646 rc = plpar_resize_hpt_prepare(0, 0);
1647 if (rc != H_SUCCESS)
1648 pr_warn("Unexpected error %d cancelling timed out HPT resize\n",
1649 rc);
1650 return -ETIMEDOUT;
1651 }
1652 msleep(delay);
1653 rc = plpar_resize_hpt_prepare(0, shift);
1654 }
1655
1656 switch (rc) {
1657 case H_SUCCESS:
1658 /* Continue on */
1659 break;
1660
1661 case H_PARAMETER:
1662 pr_warn("Invalid argument from H_RESIZE_HPT_PREPARE\n");
1663 return -EINVAL;
1664 case H_RESOURCE:
1665 pr_warn("Operation not permitted from H_RESIZE_HPT_PREPARE\n");
1666 return -EPERM;
1667 default:
1668 pr_warn("Unexpected error %d from H_RESIZE_HPT_PREPARE\n", rc);
1669 return -EIO;
1670 }
1671
1672 t1 = ktime_get();
1673
1674 rc = stop_machine_cpuslocked(pseries_lpar_resize_hpt_commit,
1675 &state, NULL);
1676
1677 t2 = ktime_get();
1678
1679 if (rc != 0) {
1680 switch (state.commit_rc) {
1681 case H_PTEG_FULL:
1682 return -ENOSPC;
1683
1684 default:
1685 pr_warn("Unexpected error %d from H_RESIZE_HPT_COMMIT\n",
1686 state.commit_rc);
1687 return -EIO;
1688 };
1689 }
1690
1691 pr_info("HPT resize to shift %lu complete (%lld ms / %lld ms)\n",
1692 shift, (long long) ktime_ms_delta(t1, t0),
1693 (long long) ktime_ms_delta(t2, t1));
1694
1695 return 0;
1696 }
1697
hpte_init_pseries(void)1698 void __init hpte_init_pseries(void)
1699 {
1700 mmu_hash_ops.hpte_invalidate = pSeries_lpar_hpte_invalidate;
1701 mmu_hash_ops.hpte_updatepp = pSeries_lpar_hpte_updatepp;
1702 mmu_hash_ops.hpte_updateboltedpp = pSeries_lpar_hpte_updateboltedpp;
1703 mmu_hash_ops.hpte_insert = pSeries_lpar_hpte_insert;
1704 mmu_hash_ops.hpte_remove = pSeries_lpar_hpte_remove;
1705 mmu_hash_ops.hpte_removebolted = pSeries_lpar_hpte_removebolted;
1706 mmu_hash_ops.flush_hash_range = pSeries_lpar_flush_hash_range;
1707 mmu_hash_ops.hpte_clear_all = pseries_hpte_clear_all;
1708 mmu_hash_ops.hugepage_invalidate = pSeries_lpar_hugepage_invalidate;
1709
1710 if (firmware_has_feature(FW_FEATURE_HPT_RESIZE))
1711 mmu_hash_ops.resize_hpt = pseries_lpar_resize_hpt;
1712
1713 /*
1714 * On POWER9, we need to do a H_REGISTER_PROC_TBL hcall
1715 * to inform the hypervisor that we wish to use the HPT.
1716 */
1717 if (cpu_has_feature(CPU_FTR_ARCH_300))
1718 pseries_lpar_register_process_table(0, 0, 0);
1719 }
1720 #endif /* CONFIG_PPC_64S_HASH_MMU */
1721
1722 #ifdef CONFIG_PPC_RADIX_MMU
radix_init_pseries(void)1723 void __init radix_init_pseries(void)
1724 {
1725 pr_info("Using radix MMU under hypervisor\n");
1726
1727 pseries_lpar_register_process_table(__pa(process_tb),
1728 0, PRTB_SIZE_SHIFT - 12);
1729 }
1730 #endif
1731
1732 #ifdef CONFIG_PPC_SMLPAR
1733 #define CMO_FREE_HINT_DEFAULT 1
1734 static int cmo_free_hint_flag = CMO_FREE_HINT_DEFAULT;
1735
cmo_free_hint(char * str)1736 static int __init cmo_free_hint(char *str)
1737 {
1738 char *parm;
1739 parm = strstrip(str);
1740
1741 if (strcasecmp(parm, "no") == 0 || strcasecmp(parm, "off") == 0) {
1742 pr_info("%s: CMO free page hinting is not active.\n", __func__);
1743 cmo_free_hint_flag = 0;
1744 return 1;
1745 }
1746
1747 cmo_free_hint_flag = 1;
1748 pr_info("%s: CMO free page hinting is active.\n", __func__);
1749
1750 if (strcasecmp(parm, "yes") == 0 || strcasecmp(parm, "on") == 0)
1751 return 1;
1752
1753 return 0;
1754 }
1755
1756 __setup("cmo_free_hint=", cmo_free_hint);
1757
pSeries_set_page_state(struct page * page,int order,unsigned long state)1758 static void pSeries_set_page_state(struct page *page, int order,
1759 unsigned long state)
1760 {
1761 int i, j;
1762 unsigned long cmo_page_sz, addr;
1763
1764 cmo_page_sz = cmo_get_page_size();
1765 addr = __pa((unsigned long)page_address(page));
1766
1767 for (i = 0; i < (1 << order); i++, addr += PAGE_SIZE) {
1768 for (j = 0; j < PAGE_SIZE; j += cmo_page_sz)
1769 plpar_hcall_norets(H_PAGE_INIT, state, addr + j, 0);
1770 }
1771 }
1772
arch_free_page(struct page * page,int order)1773 void arch_free_page(struct page *page, int order)
1774 {
1775 if (radix_enabled())
1776 return;
1777 if (!cmo_free_hint_flag || !firmware_has_feature(FW_FEATURE_CMO))
1778 return;
1779
1780 pSeries_set_page_state(page, order, H_PAGE_SET_UNUSED);
1781 }
1782 EXPORT_SYMBOL(arch_free_page);
1783
1784 #endif /* CONFIG_PPC_SMLPAR */
1785 #endif /* CONFIG_PPC_BOOK3S_64 */
1786
1787 #ifdef CONFIG_TRACEPOINTS
1788 #ifdef CONFIG_JUMP_LABEL
1789 struct static_key hcall_tracepoint_key = STATIC_KEY_INIT;
1790
hcall_tracepoint_regfunc(void)1791 int hcall_tracepoint_regfunc(void)
1792 {
1793 static_key_slow_inc(&hcall_tracepoint_key);
1794 return 0;
1795 }
1796
hcall_tracepoint_unregfunc(void)1797 void hcall_tracepoint_unregfunc(void)
1798 {
1799 static_key_slow_dec(&hcall_tracepoint_key);
1800 }
1801 #else
1802 /*
1803 * We optimise our hcall path by placing hcall_tracepoint_refcount
1804 * directly in the TOC so we can check if the hcall tracepoints are
1805 * enabled via a single load.
1806 */
1807
1808 /* NB: reg/unreg are called while guarded with the tracepoints_mutex */
1809 extern long hcall_tracepoint_refcount;
1810
hcall_tracepoint_regfunc(void)1811 int hcall_tracepoint_regfunc(void)
1812 {
1813 hcall_tracepoint_refcount++;
1814 return 0;
1815 }
1816
hcall_tracepoint_unregfunc(void)1817 void hcall_tracepoint_unregfunc(void)
1818 {
1819 hcall_tracepoint_refcount--;
1820 }
1821 #endif
1822
1823 /*
1824 * Keep track of hcall tracing depth and prevent recursion. Warn if any is
1825 * detected because it may indicate a problem. This will not catch all
1826 * problems with tracing code making hcalls, because the tracing might have
1827 * been invoked from a non-hcall, so the first hcall could recurse into it
1828 * without warning here, but this better than nothing.
1829 *
1830 * Hcalls with specific problems being traced should use the _notrace
1831 * plpar_hcall variants.
1832 */
1833 static DEFINE_PER_CPU(unsigned int, hcall_trace_depth);
1834
1835
__trace_hcall_entry(unsigned long opcode,unsigned long * args)1836 notrace void __trace_hcall_entry(unsigned long opcode, unsigned long *args)
1837 {
1838 unsigned long flags;
1839 unsigned int *depth;
1840
1841 local_irq_save(flags);
1842
1843 depth = this_cpu_ptr(&hcall_trace_depth);
1844
1845 if (WARN_ON_ONCE(*depth))
1846 goto out;
1847
1848 (*depth)++;
1849 preempt_disable();
1850 trace_hcall_entry(opcode, args);
1851 (*depth)--;
1852
1853 out:
1854 local_irq_restore(flags);
1855 }
1856
__trace_hcall_exit(long opcode,long retval,unsigned long * retbuf)1857 notrace void __trace_hcall_exit(long opcode, long retval, unsigned long *retbuf)
1858 {
1859 unsigned long flags;
1860 unsigned int *depth;
1861
1862 local_irq_save(flags);
1863
1864 depth = this_cpu_ptr(&hcall_trace_depth);
1865
1866 if (*depth) /* Don't warn again on the way out */
1867 goto out;
1868
1869 (*depth)++;
1870 trace_hcall_exit(opcode, retval, retbuf);
1871 preempt_enable();
1872 (*depth)--;
1873
1874 out:
1875 local_irq_restore(flags);
1876 }
1877 #endif
1878
1879 /**
1880 * h_get_mpp
1881 * H_GET_MPP hcall returns info in 7 parms
1882 */
h_get_mpp(struct hvcall_mpp_data * mpp_data)1883 int h_get_mpp(struct hvcall_mpp_data *mpp_data)
1884 {
1885 int rc;
1886 unsigned long retbuf[PLPAR_HCALL9_BUFSIZE];
1887
1888 rc = plpar_hcall9(H_GET_MPP, retbuf);
1889
1890 mpp_data->entitled_mem = retbuf[0];
1891 mpp_data->mapped_mem = retbuf[1];
1892
1893 mpp_data->group_num = (retbuf[2] >> 2 * 8) & 0xffff;
1894 mpp_data->pool_num = retbuf[2] & 0xffff;
1895
1896 mpp_data->mem_weight = (retbuf[3] >> 7 * 8) & 0xff;
1897 mpp_data->unallocated_mem_weight = (retbuf[3] >> 6 * 8) & 0xff;
1898 mpp_data->unallocated_entitlement = retbuf[3] & 0xffffffffffffUL;
1899
1900 mpp_data->pool_size = retbuf[4];
1901 mpp_data->loan_request = retbuf[5];
1902 mpp_data->backing_mem = retbuf[6];
1903
1904 return rc;
1905 }
1906 EXPORT_SYMBOL(h_get_mpp);
1907
h_get_mpp_x(struct hvcall_mpp_x_data * mpp_x_data)1908 int h_get_mpp_x(struct hvcall_mpp_x_data *mpp_x_data)
1909 {
1910 int rc;
1911 unsigned long retbuf[PLPAR_HCALL9_BUFSIZE] = { 0 };
1912
1913 rc = plpar_hcall9(H_GET_MPP_X, retbuf);
1914
1915 mpp_x_data->coalesced_bytes = retbuf[0];
1916 mpp_x_data->pool_coalesced_bytes = retbuf[1];
1917 mpp_x_data->pool_purr_cycles = retbuf[2];
1918 mpp_x_data->pool_spurr_cycles = retbuf[3];
1919
1920 return rc;
1921 }
1922
1923 #ifdef CONFIG_PPC_64S_HASH_MMU
vsid_unscramble(unsigned long vsid,int ssize)1924 static unsigned long __init vsid_unscramble(unsigned long vsid, int ssize)
1925 {
1926 unsigned long protovsid;
1927 unsigned long va_bits = VA_BITS;
1928 unsigned long modinv, vsid_modulus;
1929 unsigned long max_mod_inv, tmp_modinv;
1930
1931 if (!mmu_has_feature(MMU_FTR_68_BIT_VA))
1932 va_bits = 65;
1933
1934 if (ssize == MMU_SEGSIZE_256M) {
1935 modinv = VSID_MULINV_256M;
1936 vsid_modulus = ((1UL << (va_bits - SID_SHIFT)) - 1);
1937 } else {
1938 modinv = VSID_MULINV_1T;
1939 vsid_modulus = ((1UL << (va_bits - SID_SHIFT_1T)) - 1);
1940 }
1941
1942 /*
1943 * vsid outside our range.
1944 */
1945 if (vsid >= vsid_modulus)
1946 return 0;
1947
1948 /*
1949 * If modinv is the modular multiplicate inverse of (x % vsid_modulus)
1950 * and vsid = (protovsid * x) % vsid_modulus, then we say:
1951 * protovsid = (vsid * modinv) % vsid_modulus
1952 */
1953
1954 /* Check if (vsid * modinv) overflow (63 bits) */
1955 max_mod_inv = 0x7fffffffffffffffull / vsid;
1956 if (modinv < max_mod_inv)
1957 return (vsid * modinv) % vsid_modulus;
1958
1959 tmp_modinv = modinv/max_mod_inv;
1960 modinv %= max_mod_inv;
1961
1962 protovsid = (((vsid * max_mod_inv) % vsid_modulus) * tmp_modinv) % vsid_modulus;
1963 protovsid = (protovsid + vsid * modinv) % vsid_modulus;
1964
1965 return protovsid;
1966 }
1967
reserve_vrma_context_id(void)1968 static int __init reserve_vrma_context_id(void)
1969 {
1970 unsigned long protovsid;
1971
1972 /*
1973 * Reserve context ids which map to reserved virtual addresses. For now
1974 * we only reserve the context id which maps to the VRMA VSID. We ignore
1975 * the addresses in "ibm,adjunct-virtual-addresses" because we don't
1976 * enable adjunct support via the "ibm,client-architecture-support"
1977 * interface.
1978 */
1979 protovsid = vsid_unscramble(VRMA_VSID, MMU_SEGSIZE_1T);
1980 hash__reserve_context_id(protovsid >> ESID_BITS_1T);
1981 return 0;
1982 }
1983 machine_device_initcall(pseries, reserve_vrma_context_id);
1984 #endif
1985
1986 #ifdef CONFIG_DEBUG_FS
1987 /* debugfs file interface for vpa data */
vpa_file_read(struct file * filp,char __user * buf,size_t len,loff_t * pos)1988 static ssize_t vpa_file_read(struct file *filp, char __user *buf, size_t len,
1989 loff_t *pos)
1990 {
1991 int cpu = (long)filp->private_data;
1992 struct lppaca *lppaca = &lppaca_of(cpu);
1993
1994 return simple_read_from_buffer(buf, len, pos, lppaca,
1995 sizeof(struct lppaca));
1996 }
1997
1998 static const struct file_operations vpa_fops = {
1999 .open = simple_open,
2000 .read = vpa_file_read,
2001 .llseek = default_llseek,
2002 };
2003
vpa_debugfs_init(void)2004 static int __init vpa_debugfs_init(void)
2005 {
2006 char name[16];
2007 long i;
2008 struct dentry *vpa_dir;
2009
2010 if (!firmware_has_feature(FW_FEATURE_SPLPAR))
2011 return 0;
2012
2013 vpa_dir = debugfs_create_dir("vpa", arch_debugfs_dir);
2014
2015 /* set up the per-cpu vpa file*/
2016 for_each_possible_cpu(i) {
2017 sprintf(name, "cpu-%ld", i);
2018 debugfs_create_file(name, 0400, vpa_dir, (void *)i, &vpa_fops);
2019 }
2020
2021 return 0;
2022 }
2023 machine_arch_initcall(pseries, vpa_debugfs_init);
2024 #endif /* CONFIG_DEBUG_FS */
2025