1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2020 Realtek Corporation
3 */
4
5 #include <linux/devcoredump.h>
6
7 #include "cam.h"
8 #include "chan.h"
9 #include "debug.h"
10 #include "fw.h"
11 #include "mac.h"
12 #include "ps.h"
13 #include "reg.h"
14 #include "ser.h"
15 #include "util.h"
16
17 #define SER_RECFG_TIMEOUT 1000
18
19 enum ser_evt {
20 SER_EV_NONE,
21 SER_EV_STATE_IN,
22 SER_EV_STATE_OUT,
23 SER_EV_L1_RESET, /* M1 */
24 SER_EV_DO_RECOVERY, /* M3 */
25 SER_EV_MAC_RESET_DONE, /* M5 */
26 SER_EV_L2_RESET,
27 SER_EV_L2_RECFG_DONE,
28 SER_EV_L2_RECFG_TIMEOUT,
29 SER_EV_M3_TIMEOUT,
30 SER_EV_FW_M5_TIMEOUT,
31 SER_EV_L0_RESET,
32 SER_EV_MAXX
33 };
34
35 enum ser_state {
36 SER_IDLE_ST,
37 SER_RESET_TRX_ST,
38 SER_DO_HCI_ST,
39 SER_L2_RESET_ST,
40 SER_ST_MAX_ST
41 };
42
43 struct ser_msg {
44 struct list_head list;
45 u8 event;
46 };
47
48 struct state_ent {
49 u8 state;
50 char *name;
51 void (*st_func)(struct rtw89_ser *ser, u8 event);
52 };
53
54 struct event_ent {
55 u8 event;
56 char *name;
57 };
58
ser_ev_name(struct rtw89_ser * ser,u8 event)59 static char *ser_ev_name(struct rtw89_ser *ser, u8 event)
60 {
61 if (event < SER_EV_MAXX)
62 return ser->ev_tbl[event].name;
63
64 return "err_ev_name";
65 }
66
ser_st_name(struct rtw89_ser * ser)67 static char *ser_st_name(struct rtw89_ser *ser)
68 {
69 if (ser->state < SER_ST_MAX_ST)
70 return ser->st_tbl[ser->state].name;
71
72 return "err_st_name";
73 }
74
75 #define RTW89_DEF_SER_CD_TYPE(_name, _type, _size) \
76 struct ser_cd_ ## _name { \
77 u32 type; \
78 u32 type_size; \
79 u64 padding; \
80 u8 data[_size]; \
81 } __packed; \
82 static void ser_cd_ ## _name ## _init(struct ser_cd_ ## _name *p) \
83 { \
84 p->type = _type; \
85 p->type_size = sizeof(p->data); \
86 p->padding = 0x0123456789abcdef; \
87 }
88
89 enum rtw89_ser_cd_type {
90 RTW89_SER_CD_FW_RSVD_PLE = 0,
91 RTW89_SER_CD_FW_BACKTRACE = 1,
92 };
93
94 RTW89_DEF_SER_CD_TYPE(fw_rsvd_ple,
95 RTW89_SER_CD_FW_RSVD_PLE,
96 RTW89_FW_RSVD_PLE_SIZE);
97
98 RTW89_DEF_SER_CD_TYPE(fw_backtrace,
99 RTW89_SER_CD_FW_BACKTRACE,
100 RTW89_FW_BACKTRACE_MAX_SIZE);
101
102 struct rtw89_ser_cd_buffer {
103 struct ser_cd_fw_rsvd_ple fwple;
104 struct ser_cd_fw_backtrace fwbt;
105 } __packed;
106
rtw89_ser_cd_prep(struct rtw89_dev * rtwdev)107 static struct rtw89_ser_cd_buffer *rtw89_ser_cd_prep(struct rtw89_dev *rtwdev)
108 {
109 struct rtw89_ser_cd_buffer *buf;
110
111 buf = vzalloc(sizeof(*buf));
112 if (!buf)
113 return NULL;
114
115 ser_cd_fw_rsvd_ple_init(&buf->fwple);
116 ser_cd_fw_backtrace_init(&buf->fwbt);
117
118 return buf;
119 }
120
rtw89_ser_cd_send(struct rtw89_dev * rtwdev,struct rtw89_ser_cd_buffer * buf)121 static void rtw89_ser_cd_send(struct rtw89_dev *rtwdev,
122 struct rtw89_ser_cd_buffer *buf)
123 {
124 rtw89_debug(rtwdev, RTW89_DBG_SER, "SER sends core dump\n");
125
126 /* After calling dev_coredump, buf's lifetime is supposed to be
127 * handled by the device coredump framework. Note that a new dump
128 * will be discarded if a previous one hasn't been released by
129 * framework yet.
130 */
131 dev_coredumpv(rtwdev->dev, buf, sizeof(*buf), GFP_KERNEL);
132 }
133
rtw89_ser_cd_free(struct rtw89_dev * rtwdev,struct rtw89_ser_cd_buffer * buf,bool free_self)134 static void rtw89_ser_cd_free(struct rtw89_dev *rtwdev,
135 struct rtw89_ser_cd_buffer *buf, bool free_self)
136 {
137 if (!free_self)
138 return;
139
140 rtw89_debug(rtwdev, RTW89_DBG_SER, "SER frees core dump by self\n");
141
142 /* When some problems happen during filling data of core dump,
143 * we won't send it to device coredump framework. Instead, we
144 * free buf by ourselves.
145 */
146 vfree(buf);
147 }
148
ser_state_run(struct rtw89_ser * ser,u8 evt)149 static void ser_state_run(struct rtw89_ser *ser, u8 evt)
150 {
151 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
152
153 rtw89_debug(rtwdev, RTW89_DBG_SER, "ser: %s receive %s\n",
154 ser_st_name(ser), ser_ev_name(ser, evt));
155
156 mutex_lock(&rtwdev->mutex);
157 rtw89_leave_lps(rtwdev);
158 mutex_unlock(&rtwdev->mutex);
159
160 ser->st_tbl[ser->state].st_func(ser, evt);
161 }
162
ser_state_goto(struct rtw89_ser * ser,u8 new_state)163 static void ser_state_goto(struct rtw89_ser *ser, u8 new_state)
164 {
165 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
166
167 if (ser->state == new_state || new_state >= SER_ST_MAX_ST)
168 return;
169 ser_state_run(ser, SER_EV_STATE_OUT);
170
171 rtw89_debug(rtwdev, RTW89_DBG_SER, "ser: %s goto -> %s\n",
172 ser_st_name(ser), ser->st_tbl[new_state].name);
173
174 ser->state = new_state;
175 ser_state_run(ser, SER_EV_STATE_IN);
176 }
177
__rtw89_ser_dequeue_msg(struct rtw89_ser * ser)178 static struct ser_msg *__rtw89_ser_dequeue_msg(struct rtw89_ser *ser)
179 {
180 struct ser_msg *msg;
181
182 spin_lock_irq(&ser->msg_q_lock);
183 msg = list_first_entry_or_null(&ser->msg_q, struct ser_msg, list);
184 if (msg)
185 list_del(&msg->list);
186 spin_unlock_irq(&ser->msg_q_lock);
187
188 return msg;
189 }
190
rtw89_ser_hdl_work(struct work_struct * work)191 static void rtw89_ser_hdl_work(struct work_struct *work)
192 {
193 struct ser_msg *msg;
194 struct rtw89_ser *ser = container_of(work, struct rtw89_ser,
195 ser_hdl_work);
196
197 while ((msg = __rtw89_ser_dequeue_msg(ser))) {
198 ser_state_run(ser, msg->event);
199 kfree(msg);
200 }
201 }
202
ser_send_msg(struct rtw89_ser * ser,u8 event)203 static int ser_send_msg(struct rtw89_ser *ser, u8 event)
204 {
205 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
206 struct ser_msg *msg = NULL;
207
208 if (test_bit(RTW89_SER_DRV_STOP_RUN, ser->flags))
209 return -EIO;
210
211 msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
212 if (!msg)
213 return -ENOMEM;
214
215 msg->event = event;
216
217 spin_lock_irq(&ser->msg_q_lock);
218 list_add(&msg->list, &ser->msg_q);
219 spin_unlock_irq(&ser->msg_q_lock);
220
221 ieee80211_queue_work(rtwdev->hw, &ser->ser_hdl_work);
222 return 0;
223 }
224
rtw89_ser_alarm_work(struct work_struct * work)225 static void rtw89_ser_alarm_work(struct work_struct *work)
226 {
227 struct rtw89_ser *ser = container_of(work, struct rtw89_ser,
228 ser_alarm_work.work);
229
230 ser_send_msg(ser, ser->alarm_event);
231 ser->alarm_event = SER_EV_NONE;
232 }
233
ser_set_alarm(struct rtw89_ser * ser,u32 ms,u8 event)234 static void ser_set_alarm(struct rtw89_ser *ser, u32 ms, u8 event)
235 {
236 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
237
238 if (test_bit(RTW89_SER_DRV_STOP_RUN, ser->flags))
239 return;
240
241 ser->alarm_event = event;
242 ieee80211_queue_delayed_work(rtwdev->hw, &ser->ser_alarm_work,
243 msecs_to_jiffies(ms));
244 }
245
ser_del_alarm(struct rtw89_ser * ser)246 static void ser_del_alarm(struct rtw89_ser *ser)
247 {
248 cancel_delayed_work(&ser->ser_alarm_work);
249 ser->alarm_event = SER_EV_NONE;
250 }
251
252 /* driver function */
drv_stop_tx(struct rtw89_ser * ser)253 static void drv_stop_tx(struct rtw89_ser *ser)
254 {
255 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
256
257 ieee80211_stop_queues(rtwdev->hw);
258 set_bit(RTW89_SER_DRV_STOP_TX, ser->flags);
259 }
260
drv_stop_rx(struct rtw89_ser * ser)261 static void drv_stop_rx(struct rtw89_ser *ser)
262 {
263 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
264
265 clear_bit(RTW89_FLAG_RUNNING, rtwdev->flags);
266 set_bit(RTW89_SER_DRV_STOP_RX, ser->flags);
267 }
268
drv_trx_reset(struct rtw89_ser * ser)269 static void drv_trx_reset(struct rtw89_ser *ser)
270 {
271 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
272
273 rtw89_hci_reset(rtwdev);
274 }
275
drv_resume_tx(struct rtw89_ser * ser)276 static void drv_resume_tx(struct rtw89_ser *ser)
277 {
278 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
279
280 if (!test_bit(RTW89_SER_DRV_STOP_TX, ser->flags))
281 return;
282
283 ieee80211_wake_queues(rtwdev->hw);
284 clear_bit(RTW89_SER_DRV_STOP_TX, ser->flags);
285 }
286
drv_resume_rx(struct rtw89_ser * ser)287 static void drv_resume_rx(struct rtw89_ser *ser)
288 {
289 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
290
291 if (!test_bit(RTW89_SER_DRV_STOP_RX, ser->flags))
292 return;
293
294 set_bit(RTW89_FLAG_RUNNING, rtwdev->flags);
295 clear_bit(RTW89_SER_DRV_STOP_RX, ser->flags);
296 }
297
ser_reset_vif(struct rtw89_dev * rtwdev,struct rtw89_vif * rtwvif)298 static void ser_reset_vif(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
299 {
300 rtw89_core_release_bit_map(rtwdev->hw_port, rtwvif->port);
301 rtwvif->net_type = RTW89_NET_TYPE_NO_LINK;
302 rtwvif->trigger = false;
303 }
304
ser_sta_deinit_cam_iter(void * data,struct ieee80211_sta * sta)305 static void ser_sta_deinit_cam_iter(void *data, struct ieee80211_sta *sta)
306 {
307 struct rtw89_vif *rtwvif = (struct rtw89_vif *)data;
308 struct rtw89_dev *rtwdev = rtwvif->rtwdev;
309 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
310
311 if (rtwvif->net_type == RTW89_NET_TYPE_AP_MODE || sta->tdls)
312 rtw89_cam_deinit_addr_cam(rtwdev, &rtwsta->addr_cam);
313 if (sta->tdls)
314 rtw89_cam_deinit_bssid_cam(rtwdev, &rtwsta->bssid_cam);
315
316 INIT_LIST_HEAD(&rtwsta->ba_cam_list);
317 }
318
ser_deinit_cam(struct rtw89_dev * rtwdev,struct rtw89_vif * rtwvif)319 static void ser_deinit_cam(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
320 {
321 ieee80211_iterate_stations_atomic(rtwdev->hw,
322 ser_sta_deinit_cam_iter,
323 rtwvif);
324
325 rtw89_cam_deinit(rtwdev, rtwvif);
326
327 bitmap_zero(rtwdev->cam_info.ba_cam_map, RTW89_MAX_BA_CAM_NUM);
328 }
329
ser_reset_mac_binding(struct rtw89_dev * rtwdev)330 static void ser_reset_mac_binding(struct rtw89_dev *rtwdev)
331 {
332 struct rtw89_vif *rtwvif;
333
334 rtw89_cam_reset_keys(rtwdev);
335 rtw89_for_each_rtwvif(rtwdev, rtwvif)
336 ser_deinit_cam(rtwdev, rtwvif);
337
338 rtw89_core_release_all_bits_map(rtwdev->mac_id_map, RTW89_MAX_MAC_ID_NUM);
339 rtw89_for_each_rtwvif(rtwdev, rtwvif)
340 ser_reset_vif(rtwdev, rtwvif);
341 }
342
343 /* hal function */
hal_enable_dma(struct rtw89_ser * ser)344 static int hal_enable_dma(struct rtw89_ser *ser)
345 {
346 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
347 int ret;
348
349 if (!test_bit(RTW89_SER_HAL_STOP_DMA, ser->flags))
350 return 0;
351
352 if (!rtwdev->hci.ops->mac_lv1_rcvy)
353 return -EIO;
354
355 ret = rtwdev->hci.ops->mac_lv1_rcvy(rtwdev, RTW89_LV1_RCVY_STEP_2);
356 if (!ret)
357 clear_bit(RTW89_SER_HAL_STOP_DMA, ser->flags);
358
359 return ret;
360 }
361
hal_stop_dma(struct rtw89_ser * ser)362 static int hal_stop_dma(struct rtw89_ser *ser)
363 {
364 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
365 int ret;
366
367 if (!rtwdev->hci.ops->mac_lv1_rcvy)
368 return -EIO;
369
370 ret = rtwdev->hci.ops->mac_lv1_rcvy(rtwdev, RTW89_LV1_RCVY_STEP_1);
371 if (!ret)
372 set_bit(RTW89_SER_HAL_STOP_DMA, ser->flags);
373
374 return ret;
375 }
376
hal_send_m2_event(struct rtw89_ser * ser)377 static void hal_send_m2_event(struct rtw89_ser *ser)
378 {
379 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
380
381 rtw89_mac_set_err_status(rtwdev, MAC_AX_ERR_L1_DISABLE_EN);
382 }
383
hal_send_m4_event(struct rtw89_ser * ser)384 static void hal_send_m4_event(struct rtw89_ser *ser)
385 {
386 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
387
388 rtw89_mac_set_err_status(rtwdev, MAC_AX_ERR_L1_RCVY_EN);
389 }
390
391 /* state handler */
ser_idle_st_hdl(struct rtw89_ser * ser,u8 evt)392 static void ser_idle_st_hdl(struct rtw89_ser *ser, u8 evt)
393 {
394 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
395
396 switch (evt) {
397 case SER_EV_STATE_IN:
398 rtw89_hci_recovery_complete(rtwdev);
399 clear_bit(RTW89_FLAG_CRASH_SIMULATING, rtwdev->flags);
400 break;
401 case SER_EV_L1_RESET:
402 ser_state_goto(ser, SER_RESET_TRX_ST);
403 break;
404 case SER_EV_L2_RESET:
405 ser_state_goto(ser, SER_L2_RESET_ST);
406 break;
407 case SER_EV_STATE_OUT:
408 rtw89_hci_recovery_start(rtwdev);
409 break;
410 default:
411 break;
412 }
413 }
414
ser_reset_trx_st_hdl(struct rtw89_ser * ser,u8 evt)415 static void ser_reset_trx_st_hdl(struct rtw89_ser *ser, u8 evt)
416 {
417 switch (evt) {
418 case SER_EV_STATE_IN:
419 drv_stop_tx(ser);
420
421 if (hal_stop_dma(ser)) {
422 ser_state_goto(ser, SER_L2_RESET_ST);
423 break;
424 }
425
426 drv_stop_rx(ser);
427 drv_trx_reset(ser);
428
429 /* wait m3 */
430 hal_send_m2_event(ser);
431
432 /* set alarm to prevent FW response timeout */
433 ser_set_alarm(ser, 1000, SER_EV_M3_TIMEOUT);
434 break;
435
436 case SER_EV_DO_RECOVERY:
437 ser_state_goto(ser, SER_DO_HCI_ST);
438 break;
439
440 case SER_EV_M3_TIMEOUT:
441 ser_state_goto(ser, SER_L2_RESET_ST);
442 break;
443
444 case SER_EV_STATE_OUT:
445 ser_del_alarm(ser);
446 hal_enable_dma(ser);
447 drv_resume_rx(ser);
448 drv_resume_tx(ser);
449 break;
450
451 default:
452 break;
453 }
454 }
455
ser_do_hci_st_hdl(struct rtw89_ser * ser,u8 evt)456 static void ser_do_hci_st_hdl(struct rtw89_ser *ser, u8 evt)
457 {
458 switch (evt) {
459 case SER_EV_STATE_IN:
460 /* wait m5 */
461 hal_send_m4_event(ser);
462
463 /* prevent FW response timeout */
464 ser_set_alarm(ser, 1000, SER_EV_FW_M5_TIMEOUT);
465 break;
466
467 case SER_EV_FW_M5_TIMEOUT:
468 ser_state_goto(ser, SER_L2_RESET_ST);
469 break;
470
471 case SER_EV_MAC_RESET_DONE:
472 ser_state_goto(ser, SER_IDLE_ST);
473 break;
474
475 case SER_EV_STATE_OUT:
476 ser_del_alarm(ser);
477 break;
478
479 default:
480 break;
481 }
482 }
483
ser_mac_mem_dump(struct rtw89_dev * rtwdev,u8 * buf,u8 sel,u32 start_addr,u32 len)484 static void ser_mac_mem_dump(struct rtw89_dev *rtwdev, u8 *buf,
485 u8 sel, u32 start_addr, u32 len)
486 {
487 u32 *ptr = (u32 *)buf;
488 u32 base_addr, start_page, residue;
489 u32 cnt = 0;
490 u32 i;
491
492 start_page = start_addr / MAC_MEM_DUMP_PAGE_SIZE;
493 residue = start_addr % MAC_MEM_DUMP_PAGE_SIZE;
494 base_addr = rtw89_mac_mem_base_addrs[sel];
495 base_addr += start_page * MAC_MEM_DUMP_PAGE_SIZE;
496
497 while (cnt < len) {
498 rtw89_write32(rtwdev, R_AX_FILTER_MODEL_ADDR, base_addr);
499
500 for (i = R_AX_INDIR_ACCESS_ENTRY + residue;
501 i < R_AX_INDIR_ACCESS_ENTRY + MAC_MEM_DUMP_PAGE_SIZE;
502 i += 4, ptr++) {
503 *ptr = rtw89_read32(rtwdev, i);
504 cnt += 4;
505 if (cnt >= len)
506 break;
507 }
508
509 residue = 0;
510 base_addr += MAC_MEM_DUMP_PAGE_SIZE;
511 }
512 }
513
rtw89_ser_fw_rsvd_ple_dump(struct rtw89_dev * rtwdev,u8 * buf)514 static void rtw89_ser_fw_rsvd_ple_dump(struct rtw89_dev *rtwdev, u8 *buf)
515 {
516 u32 start_addr = rtwdev->chip->rsvd_ple_ofst;
517
518 rtw89_debug(rtwdev, RTW89_DBG_SER,
519 "dump mem for fw rsvd payload engine (start addr: 0x%x)\n",
520 start_addr);
521 ser_mac_mem_dump(rtwdev, buf, RTW89_MAC_MEM_SHARED_BUF, start_addr,
522 RTW89_FW_RSVD_PLE_SIZE);
523 }
524
525 struct __fw_backtrace_entry {
526 u32 wcpu_addr;
527 u32 size;
528 u32 key;
529 } __packed;
530
531 struct __fw_backtrace_info {
532 u32 ra;
533 u32 sp;
534 } __packed;
535
536 static_assert(RTW89_FW_BACKTRACE_INFO_SIZE ==
537 sizeof(struct __fw_backtrace_info));
538
rtw89_ser_fw_backtrace_dump(struct rtw89_dev * rtwdev,u8 * buf,const struct __fw_backtrace_entry * ent)539 static int rtw89_ser_fw_backtrace_dump(struct rtw89_dev *rtwdev, u8 *buf,
540 const struct __fw_backtrace_entry *ent)
541 {
542 struct __fw_backtrace_info *ptr = (struct __fw_backtrace_info *)buf;
543 u32 fwbt_addr = ent->wcpu_addr & RTW89_WCPU_BASE_MASK;
544 u32 fwbt_size = ent->size;
545 u32 fwbt_key = ent->key;
546 u32 i;
547
548 if (fwbt_addr == 0) {
549 rtw89_warn(rtwdev, "FW backtrace invalid address: 0x%x\n",
550 fwbt_addr);
551 return -EINVAL;
552 }
553
554 if (fwbt_key != RTW89_FW_BACKTRACE_KEY) {
555 rtw89_warn(rtwdev, "FW backtrace invalid key: 0x%x\n",
556 fwbt_key);
557 return -EINVAL;
558 }
559
560 if (fwbt_size == 0 || !RTW89_VALID_FW_BACKTRACE_SIZE(fwbt_size) ||
561 fwbt_size > RTW89_FW_BACKTRACE_MAX_SIZE) {
562 rtw89_warn(rtwdev, "FW backtrace invalid size: 0x%x\n",
563 fwbt_size);
564 return -EINVAL;
565 }
566
567 rtw89_debug(rtwdev, RTW89_DBG_SER, "dump fw backtrace start\n");
568 rtw89_write32(rtwdev, R_AX_FILTER_MODEL_ADDR, fwbt_addr);
569
570 for (i = R_AX_INDIR_ACCESS_ENTRY;
571 i < R_AX_INDIR_ACCESS_ENTRY + fwbt_size;
572 i += RTW89_FW_BACKTRACE_INFO_SIZE, ptr++) {
573 *ptr = (struct __fw_backtrace_info){
574 .ra = rtw89_read32(rtwdev, i),
575 .sp = rtw89_read32(rtwdev, i + 4),
576 };
577 rtw89_debug(rtwdev, RTW89_DBG_SER,
578 "next sp: 0x%x, next ra: 0x%x\n",
579 ptr->sp, ptr->ra);
580 }
581
582 rtw89_debug(rtwdev, RTW89_DBG_SER, "dump fw backtrace end\n");
583 return 0;
584 }
585
ser_l2_reset_st_pre_hdl(struct rtw89_ser * ser)586 static void ser_l2_reset_st_pre_hdl(struct rtw89_ser *ser)
587 {
588 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
589 struct rtw89_ser_cd_buffer *buf;
590 struct __fw_backtrace_entry fwbt_ent;
591 int ret = 0;
592
593 buf = rtw89_ser_cd_prep(rtwdev);
594 if (!buf) {
595 ret = -ENOMEM;
596 goto bottom;
597 }
598
599 rtw89_ser_fw_rsvd_ple_dump(rtwdev, buf->fwple.data);
600
601 fwbt_ent = *(struct __fw_backtrace_entry *)buf->fwple.data;
602 ret = rtw89_ser_fw_backtrace_dump(rtwdev, buf->fwbt.data, &fwbt_ent);
603 if (ret)
604 goto bottom;
605
606 rtw89_ser_cd_send(rtwdev, buf);
607
608 bottom:
609 rtw89_ser_cd_free(rtwdev, buf, !!ret);
610
611 ser_reset_mac_binding(rtwdev);
612 rtw89_core_stop(rtwdev);
613 rtw89_entity_init(rtwdev);
614 INIT_LIST_HEAD(&rtwdev->rtwvifs_list);
615 }
616
ser_l2_reset_st_hdl(struct rtw89_ser * ser,u8 evt)617 static void ser_l2_reset_st_hdl(struct rtw89_ser *ser, u8 evt)
618 {
619 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
620
621 switch (evt) {
622 case SER_EV_STATE_IN:
623 mutex_lock(&rtwdev->mutex);
624 ser_l2_reset_st_pre_hdl(ser);
625 mutex_unlock(&rtwdev->mutex);
626
627 ieee80211_restart_hw(rtwdev->hw);
628 ser_set_alarm(ser, SER_RECFG_TIMEOUT, SER_EV_L2_RECFG_TIMEOUT);
629 break;
630
631 case SER_EV_L2_RECFG_TIMEOUT:
632 rtw89_info(rtwdev, "Err: ser L2 re-config timeout\n");
633 fallthrough;
634 case SER_EV_L2_RECFG_DONE:
635 ser_state_goto(ser, SER_IDLE_ST);
636 break;
637
638 case SER_EV_STATE_OUT:
639 ser_del_alarm(ser);
640 break;
641
642 default:
643 break;
644 }
645 }
646
647 static const struct event_ent ser_ev_tbl[] = {
648 {SER_EV_NONE, "SER_EV_NONE"},
649 {SER_EV_STATE_IN, "SER_EV_STATE_IN"},
650 {SER_EV_STATE_OUT, "SER_EV_STATE_OUT"},
651 {SER_EV_L1_RESET, "SER_EV_L1_RESET"},
652 {SER_EV_DO_RECOVERY, "SER_EV_DO_RECOVERY m3"},
653 {SER_EV_MAC_RESET_DONE, "SER_EV_MAC_RESET_DONE m5"},
654 {SER_EV_L2_RESET, "SER_EV_L2_RESET"},
655 {SER_EV_L2_RECFG_DONE, "SER_EV_L2_RECFG_DONE"},
656 {SER_EV_L2_RECFG_TIMEOUT, "SER_EV_L2_RECFG_TIMEOUT"},
657 {SER_EV_M3_TIMEOUT, "SER_EV_M3_TIMEOUT"},
658 {SER_EV_FW_M5_TIMEOUT, "SER_EV_FW_M5_TIMEOUT"},
659 {SER_EV_L0_RESET, "SER_EV_L0_RESET"},
660 {SER_EV_MAXX, "SER_EV_MAX"}
661 };
662
663 static const struct state_ent ser_st_tbl[] = {
664 {SER_IDLE_ST, "SER_IDLE_ST", ser_idle_st_hdl},
665 {SER_RESET_TRX_ST, "SER_RESET_TRX_ST", ser_reset_trx_st_hdl},
666 {SER_DO_HCI_ST, "SER_DO_HCI_ST", ser_do_hci_st_hdl},
667 {SER_L2_RESET_ST, "SER_L2_RESET_ST", ser_l2_reset_st_hdl}
668 };
669
rtw89_ser_init(struct rtw89_dev * rtwdev)670 int rtw89_ser_init(struct rtw89_dev *rtwdev)
671 {
672 struct rtw89_ser *ser = &rtwdev->ser;
673
674 memset(ser, 0, sizeof(*ser));
675 INIT_LIST_HEAD(&ser->msg_q);
676 ser->state = SER_IDLE_ST;
677 ser->st_tbl = ser_st_tbl;
678 ser->ev_tbl = ser_ev_tbl;
679
680 bitmap_zero(ser->flags, RTW89_NUM_OF_SER_FLAGS);
681 spin_lock_init(&ser->msg_q_lock);
682 INIT_WORK(&ser->ser_hdl_work, rtw89_ser_hdl_work);
683 INIT_DELAYED_WORK(&ser->ser_alarm_work, rtw89_ser_alarm_work);
684 return 0;
685 }
686
rtw89_ser_deinit(struct rtw89_dev * rtwdev)687 int rtw89_ser_deinit(struct rtw89_dev *rtwdev)
688 {
689 struct rtw89_ser *ser = (struct rtw89_ser *)&rtwdev->ser;
690
691 set_bit(RTW89_SER_DRV_STOP_RUN, ser->flags);
692 cancel_delayed_work_sync(&ser->ser_alarm_work);
693 cancel_work_sync(&ser->ser_hdl_work);
694 clear_bit(RTW89_SER_DRV_STOP_RUN, ser->flags);
695 return 0;
696 }
697
rtw89_ser_recfg_done(struct rtw89_dev * rtwdev)698 void rtw89_ser_recfg_done(struct rtw89_dev *rtwdev)
699 {
700 ser_send_msg(&rtwdev->ser, SER_EV_L2_RECFG_DONE);
701 }
702
rtw89_ser_notify(struct rtw89_dev * rtwdev,u32 err)703 int rtw89_ser_notify(struct rtw89_dev *rtwdev, u32 err)
704 {
705 u8 event = SER_EV_NONE;
706
707 rtw89_info(rtwdev, "SER catches error: 0x%x\n", err);
708
709 switch (err) {
710 case MAC_AX_ERR_L1_ERR_DMAC:
711 case MAC_AX_ERR_L0_PROMOTE_TO_L1:
712 event = SER_EV_L1_RESET; /* M1 */
713 break;
714 case MAC_AX_ERR_L1_RESET_DISABLE_DMAC_DONE:
715 event = SER_EV_DO_RECOVERY; /* M3 */
716 break;
717 case MAC_AX_ERR_L1_RESET_RECOVERY_DONE:
718 event = SER_EV_MAC_RESET_DONE; /* M5 */
719 break;
720 case MAC_AX_ERR_L0_ERR_CMAC0:
721 case MAC_AX_ERR_L0_ERR_CMAC1:
722 case MAC_AX_ERR_L0_RESET_DONE:
723 event = SER_EV_L0_RESET;
724 break;
725 default:
726 if (err == MAC_AX_ERR_L1_PROMOTE_TO_L2 ||
727 (err >= MAC_AX_ERR_L2_ERR_AH_DMA &&
728 err <= MAC_AX_GET_ERR_MAX))
729 event = SER_EV_L2_RESET;
730 break;
731 }
732
733 if (event == SER_EV_NONE) {
734 rtw89_warn(rtwdev, "SER cannot recognize error: 0x%x\n", err);
735 return -EINVAL;
736 }
737
738 ser_send_msg(&rtwdev->ser, event);
739 return 0;
740 }
741 EXPORT_SYMBOL(rtw89_ser_notify);
742