1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_PLATFORM_H
3 #define _ASM_X86_PLATFORM_H
4 
5 #include <asm/bootparam.h>
6 
7 struct mpc_bus;
8 struct mpc_cpu;
9 struct mpc_table;
10 struct cpuinfo_x86;
11 
12 /**
13  * struct x86_init_mpparse - platform specific mpparse ops
14  * @mpc_record:			platform specific mpc record accounting
15  * @setup_ioapic_ids:		platform specific ioapic id override
16  * @mpc_apic_id:		platform specific mpc apic id assignment
17  * @smp_read_mpc_oem:		platform specific oem mpc table setup
18  * @mpc_oem_pci_bus:		platform specific pci bus setup (default NULL)
19  * @mpc_oem_bus_info:		platform specific mpc bus info
20  * @find_smp_config:		find the smp configuration
21  * @get_smp_config:		get the smp configuration
22  */
23 struct x86_init_mpparse {
24 	void (*mpc_record)(unsigned int mode);
25 	void (*setup_ioapic_ids)(void);
26 	int (*mpc_apic_id)(struct mpc_cpu *m);
27 	void (*smp_read_mpc_oem)(struct mpc_table *mpc);
28 	void (*mpc_oem_pci_bus)(struct mpc_bus *m);
29 	void (*mpc_oem_bus_info)(struct mpc_bus *m, char *name);
30 	void (*find_smp_config)(void);
31 	void (*get_smp_config)(unsigned int early);
32 };
33 
34 /**
35  * struct x86_init_resources - platform specific resource related ops
36  * @probe_roms:			probe BIOS roms
37  * @reserve_resources:		reserve the standard resources for the
38  *				platform
39  * @memory_setup:		platform specific memory setup
40  *
41  */
42 struct x86_init_resources {
43 	void (*probe_roms)(void);
44 	void (*reserve_resources)(void);
45 	char *(*memory_setup)(void);
46 };
47 
48 /**
49  * struct x86_init_irqs - platform specific interrupt setup
50  * @pre_vector_init:		init code to run before interrupt vectors
51  *				are set up.
52  * @intr_init:			interrupt init code
53  * @trap_init:			platform specific trap setup
54  * @intr_mode_init:		interrupt delivery mode setup
55  */
56 struct x86_init_irqs {
57 	void (*pre_vector_init)(void);
58 	void (*intr_init)(void);
59 	void (*trap_init)(void);
60 	void (*intr_mode_init)(void);
61 };
62 
63 /**
64  * struct x86_init_oem - oem platform specific customizing functions
65  * @arch_setup:			platform specific architecture setup
66  * @banner:			print a platform specific banner
67  */
68 struct x86_init_oem {
69 	void (*arch_setup)(void);
70 	void (*banner)(void);
71 };
72 
73 /**
74  * struct x86_init_paging - platform specific paging functions
75  * @pagetable_init:	platform specific paging initialization call to setup
76  *			the kernel pagetables and prepare accessors functions.
77  *			Callback must call paging_init(). Called once after the
78  *			direct mapping for phys memory is available.
79  */
80 struct x86_init_paging {
81 	void (*pagetable_init)(void);
82 };
83 
84 /**
85  * struct x86_init_timers - platform specific timer setup
86  * @setup_perpcu_clockev:	set up the per cpu clock event device for the
87  *				boot cpu
88  * @timer_init:			initialize the platform timer (default PIT/HPET)
89  * @wallclock_init:		init the wallclock device
90  */
91 struct x86_init_timers {
92 	void (*setup_percpu_clockev)(void);
93 	void (*timer_init)(void);
94 	void (*wallclock_init)(void);
95 };
96 
97 /**
98  * struct x86_init_iommu - platform specific iommu setup
99  * @iommu_init:			platform specific iommu setup
100  */
101 struct x86_init_iommu {
102 	int (*iommu_init)(void);
103 };
104 
105 /**
106  * struct x86_init_pci - platform specific pci init functions
107  * @arch_init:			platform specific pci arch init call
108  * @init:			platform specific pci subsystem init
109  * @init_irq:			platform specific pci irq init
110  * @fixup_irqs:			platform specific pci irq fixup
111  */
112 struct x86_init_pci {
113 	int (*arch_init)(void);
114 	int (*init)(void);
115 	void (*init_irq)(void);
116 	void (*fixup_irqs)(void);
117 };
118 
119 /**
120  * struct x86_hyper_init - x86 hypervisor init functions
121  * @init_platform:		platform setup
122  * @guest_late_init:		guest late init
123  * @x2apic_available:		X2APIC detection
124  * @init_mem_mapping:		setup early mappings during init_mem_mapping()
125  * @init_after_bootmem:		guest init after boot allocator is finished
126  */
127 struct x86_hyper_init {
128 	void (*init_platform)(void);
129 	void (*guest_late_init)(void);
130 	bool (*x2apic_available)(void);
131 	void (*init_mem_mapping)(void);
132 	void (*init_after_bootmem)(void);
133 };
134 
135 /**
136  * struct x86_init_acpi - x86 ACPI init functions
137  * @set_root_poitner:		set RSDP address
138  * @get_root_pointer:		get RSDP address
139  * @reduced_hw_early_init:	hardware reduced platform early init
140  */
141 struct x86_init_acpi {
142 	void (*set_root_pointer)(u64 addr);
143 	u64 (*get_root_pointer)(void);
144 	void (*reduced_hw_early_init)(void);
145 };
146 
147 /**
148  * struct x86_init_ops - functions for platform specific setup
149  *
150  */
151 struct x86_init_ops {
152 	struct x86_init_resources	resources;
153 	struct x86_init_mpparse		mpparse;
154 	struct x86_init_irqs		irqs;
155 	struct x86_init_oem		oem;
156 	struct x86_init_paging		paging;
157 	struct x86_init_timers		timers;
158 	struct x86_init_iommu		iommu;
159 	struct x86_init_pci		pci;
160 	struct x86_hyper_init		hyper;
161 	struct x86_init_acpi		acpi;
162 };
163 
164 /**
165  * struct x86_cpuinit_ops - platform specific cpu hotplug setups
166  * @setup_percpu_clockev:	set up the per cpu clock event device
167  * @early_percpu_clock_init:	early init of the per cpu clock event device
168  */
169 struct x86_cpuinit_ops {
170 	void (*setup_percpu_clockev)(void);
171 	void (*early_percpu_clock_init)(void);
172 	void (*fixup_cpu_id)(struct cpuinfo_x86 *c, int node);
173 };
174 
175 struct timespec64;
176 
177 /**
178  * struct x86_legacy_devices - legacy x86 devices
179  *
180  * @pnpbios: this platform can have a PNPBIOS. If this is disabled the platform
181  * 	is known to never have a PNPBIOS.
182  *
183  * These are devices known to require LPC or ISA bus. The definition of legacy
184  * devices adheres to the ACPI 5.2.9.3 IA-PC Boot Architecture flag
185  * ACPI_FADT_LEGACY_DEVICES. These devices consist of user visible devices on
186  * the LPC or ISA bus. User visible devices are devices that have end-user
187  * accessible connectors (for example, LPT parallel port). Legacy devices on
188  * the LPC bus consist for example of serial and parallel ports, PS/2 keyboard
189  * / mouse, and the floppy disk controller. A system that lacks all known
190  * legacy devices can assume all devices can be detected exclusively via
191  * standard device enumeration mechanisms including the ACPI namespace.
192  *
193  * A system which has does not have ACPI_FADT_LEGACY_DEVICES enabled must not
194  * have any of the legacy devices enumerated below present.
195  */
196 struct x86_legacy_devices {
197 	int pnpbios;
198 };
199 
200 /**
201  * enum x86_legacy_i8042_state - i8042 keyboard controller state
202  * @X86_LEGACY_I8042_PLATFORM_ABSENT: the controller is always absent on
203  *	given platform/subarch.
204  * @X86_LEGACY_I8042_FIRMWARE_ABSENT: firmware reports that the controller
205  *	is absent.
206  * @X86_LEGACY_i8042_EXPECTED_PRESENT: the controller is likely to be
207  *	present, the i8042 driver should probe for controller existence.
208  */
209 enum x86_legacy_i8042_state {
210 	X86_LEGACY_I8042_PLATFORM_ABSENT,
211 	X86_LEGACY_I8042_FIRMWARE_ABSENT,
212 	X86_LEGACY_I8042_EXPECTED_PRESENT,
213 };
214 
215 /**
216  * struct x86_legacy_features - legacy x86 features
217  *
218  * @i8042: indicated if we expect the device to have i8042 controller
219  *	present.
220  * @rtc: this device has a CMOS real-time clock present
221  * @reserve_bios_regions: boot code will search for the EBDA address and the
222  * 	start of the 640k - 1M BIOS region.  If false, the platform must
223  * 	ensure that its memory map correctly reserves sub-1MB regions as needed.
224  * @devices: legacy x86 devices, refer to struct x86_legacy_devices
225  * 	documentation for further details.
226  */
227 struct x86_legacy_features {
228 	enum x86_legacy_i8042_state i8042;
229 	int rtc;
230 	int warm_reset;
231 	int no_vga;
232 	int reserve_bios_regions;
233 	struct x86_legacy_devices devices;
234 };
235 
236 /**
237  * struct x86_hyper_runtime - x86 hypervisor specific runtime callbacks
238  *
239  * @pin_vcpu:		pin current vcpu to specified physical cpu (run rarely)
240  */
241 struct x86_hyper_runtime {
242 	void (*pin_vcpu)(int cpu);
243 };
244 
245 /**
246  * struct x86_platform_ops - platform specific runtime functions
247  * @calibrate_cpu:		calibrate CPU
248  * @calibrate_tsc:		calibrate TSC, if different from CPU
249  * @get_wallclock:		get time from HW clock like RTC etc.
250  * @set_wallclock:		set time back to HW clock
251  * @is_untracked_pat_range	exclude from PAT logic
252  * @nmi_init			enable NMI on cpus
253  * @save_sched_clock_state:	save state for sched_clock() on suspend
254  * @restore_sched_clock_state:	restore state for sched_clock() on resume
255  * @apic_post_init:		adjust apic if needed
256  * @legacy:			legacy features
257  * @set_legacy_features:	override legacy features. Use of this callback
258  * 				is highly discouraged. You should only need
259  * 				this if your hardware platform requires further
260  * 				custom fine tuning far beyond what may be
261  * 				possible in x86_early_init_platform_quirks() by
262  * 				only using the current x86_hardware_subarch
263  * 				semantics.
264  * @hyper:			x86 hypervisor specific runtime callbacks
265  */
266 struct x86_platform_ops {
267 	unsigned long (*calibrate_cpu)(void);
268 	unsigned long (*calibrate_tsc)(void);
269 	void (*get_wallclock)(struct timespec64 *ts);
270 	int (*set_wallclock)(const struct timespec64 *ts);
271 	void (*iommu_shutdown)(void);
272 	bool (*is_untracked_pat_range)(u64 start, u64 end);
273 	void (*nmi_init)(void);
274 	unsigned char (*get_nmi_reason)(void);
275 	void (*save_sched_clock_state)(void);
276 	void (*restore_sched_clock_state)(void);
277 	void (*apic_post_init)(void);
278 	struct x86_legacy_features legacy;
279 	void (*set_legacy_features)(void);
280 	struct x86_hyper_runtime hyper;
281 };
282 
283 struct pci_dev;
284 
285 struct x86_msi_ops {
286 	int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);
287 	void (*teardown_msi_irq)(unsigned int irq);
288 	void (*teardown_msi_irqs)(struct pci_dev *dev);
289 	void (*restore_msi_irqs)(struct pci_dev *dev);
290 };
291 
292 struct x86_apic_ops {
293 	unsigned int	(*io_apic_read)   (unsigned int apic, unsigned int reg);
294 	void		(*restore)(void);
295 };
296 
297 extern struct x86_init_ops x86_init;
298 extern struct x86_cpuinit_ops x86_cpuinit;
299 extern struct x86_platform_ops x86_platform;
300 extern struct x86_msi_ops x86_msi;
301 extern struct x86_apic_ops x86_apic_ops;
302 
303 extern void x86_early_init_platform_quirks(void);
304 extern void x86_init_noop(void);
305 extern void x86_init_uint_noop(unsigned int unused);
306 extern bool bool_x86_init_noop(void);
307 extern void x86_op_int_noop(int cpu);
308 extern bool x86_pnpbios_disabled(void);
309 
310 #endif
311