1 /*
2  * Copyright (C) 2006-2010 Texas Instruments Inc
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation version 2..
7  *
8  * This program is distributed in the hope that it will be useful,
9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11  * GNU General Public License for more details.
12  */
13 #ifndef _VPBE_VENC_REGS_H
14 #define _VPBE_VENC_REGS_H
15 
16 /* VPBE Video Encoder / Digital LCD Subsystem Registers (VENC) */
17 #define VENC_VMOD				0x00
18 #define VENC_VIDCTL				0x04
19 #define VENC_VDPRO				0x08
20 #define VENC_SYNCCTL				0x0C
21 #define VENC_HSPLS				0x10
22 #define VENC_VSPLS				0x14
23 #define VENC_HINT				0x18
24 #define VENC_HSTART				0x1C
25 #define VENC_HVALID				0x20
26 #define VENC_VINT				0x24
27 #define VENC_VSTART				0x28
28 #define VENC_VVALID				0x2C
29 #define VENC_HSDLY				0x30
30 #define VENC_VSDLY				0x34
31 #define VENC_YCCCTL				0x38
32 #define VENC_RGBCTL				0x3C
33 #define VENC_RGBCLP				0x40
34 #define VENC_LINECTL				0x44
35 #define VENC_CULLLINE				0x48
36 #define VENC_LCDOUT				0x4C
37 #define VENC_BRTS				0x50
38 #define VENC_BRTW				0x54
39 #define VENC_ACCTL				0x58
40 #define VENC_PWMP				0x5C
41 #define VENC_PWMW				0x60
42 #define VENC_DCLKCTL				0x64
43 #define VENC_DCLKPTN0				0x68
44 #define VENC_DCLKPTN1				0x6C
45 #define VENC_DCLKPTN2				0x70
46 #define VENC_DCLKPTN3				0x74
47 #define VENC_DCLKPTN0A				0x78
48 #define VENC_DCLKPTN1A				0x7C
49 #define VENC_DCLKPTN2A				0x80
50 #define VENC_DCLKPTN3A				0x84
51 #define VENC_DCLKHS				0x88
52 #define VENC_DCLKHSA				0x8C
53 #define VENC_DCLKHR				0x90
54 #define VENC_DCLKVS				0x94
55 #define VENC_DCLKVR				0x98
56 #define VENC_CAPCTL				0x9C
57 #define VENC_CAPDO				0xA0
58 #define VENC_CAPDE				0xA4
59 #define VENC_ATR0				0xA8
60 #define VENC_ATR1				0xAC
61 #define VENC_ATR2				0xB0
62 #define VENC_VSTAT				0xB8
63 #define VENC_RAMADR				0xBC
64 #define VENC_RAMPORT				0xC0
65 #define VENC_DACTST				0xC4
66 #define VENC_YCOLVL				0xC8
67 #define VENC_SCPROG				0xCC
68 #define VENC_CVBS				0xDC
69 #define VENC_CMPNT				0xE0
70 #define VENC_ETMG0				0xE4
71 #define VENC_ETMG1				0xE8
72 #define VENC_ETMG2				0xEC
73 #define VENC_ETMG3				0xF0
74 #define VENC_DACSEL				0xF4
75 #define VENC_ARGBX0				0x100
76 #define VENC_ARGBX1				0x104
77 #define VENC_ARGBX2				0x108
78 #define VENC_ARGBX3				0x10C
79 #define VENC_ARGBX4				0x110
80 #define VENC_DRGBX0				0x114
81 #define VENC_DRGBX1				0x118
82 #define VENC_DRGBX2				0x11C
83 #define VENC_DRGBX3				0x120
84 #define VENC_DRGBX4				0x124
85 #define VENC_VSTARTA				0x128
86 #define VENC_OSDCLK0				0x12C
87 #define VENC_OSDCLK1				0x130
88 #define VENC_HVLDCL0				0x134
89 #define VENC_HVLDCL1				0x138
90 #define VENC_OSDHADV				0x13C
91 #define VENC_CLKCTL				0x140
92 #define VENC_GAMCTL				0x144
93 #define VENC_XHINTVL				0x174
94 
95 /* bit definitions */
96 #define VPBE_PCR_VENC_DIV			(1 << 1)
97 #define VPBE_PCR_CLK_OFF			(1 << 0)
98 
99 #define VENC_VMOD_VDMD_SHIFT			12
100 #define VENC_VMOD_VDMD_YCBCR16			0
101 #define VENC_VMOD_VDMD_YCBCR8			1
102 #define VENC_VMOD_VDMD_RGB666			2
103 #define VENC_VMOD_VDMD_RGB8			3
104 #define VENC_VMOD_VDMD_EPSON			4
105 #define VENC_VMOD_VDMD_CASIO			5
106 #define VENC_VMOD_VDMD_UDISPQVGA		6
107 #define VENC_VMOD_VDMD_STNLCD			7
108 #define VENC_VMOD_VIE_SHIFT			1
109 #define VENC_VMOD_VDMD				(7 << 12)
110 #define VENC_VMOD_ITLCL				(1 << 11)
111 #define VENC_VMOD_ITLC				(1 << 10)
112 #define VENC_VMOD_NSIT				(1 << 9)
113 #define VENC_VMOD_HDMD				(1 << 8)
114 #define VENC_VMOD_TVTYP_SHIFT			6
115 #define VENC_VMOD_TVTYP				(3 << 6)
116 #define VENC_VMOD_SLAVE				(1 << 5)
117 #define VENC_VMOD_VMD				(1 << 4)
118 #define VENC_VMOD_BLNK				(1 << 3)
119 #define VENC_VMOD_VIE				(1 << 1)
120 #define VENC_VMOD_VENC				(1 << 0)
121 
122 /* VMOD TVTYP options for HDMD=0 */
123 #define SDTV_NTSC				0
124 #define SDTV_PAL				1
125 /* VMOD TVTYP options for HDMD=1 */
126 #define HDTV_525P				0
127 #define HDTV_625P				1
128 #define HDTV_1080I				2
129 #define HDTV_720P				3
130 
131 #define VENC_VIDCTL_VCLKP			(1 << 14)
132 #define VENC_VIDCTL_VCLKE_SHIFT			13
133 #define VENC_VIDCTL_VCLKE			(1 << 13)
134 #define VENC_VIDCTL_VCLKZ_SHIFT			12
135 #define VENC_VIDCTL_VCLKZ			(1 << 12)
136 #define VENC_VIDCTL_SYDIR_SHIFT			8
137 #define VENC_VIDCTL_SYDIR			(1 << 8)
138 #define VENC_VIDCTL_DOMD_SHIFT			4
139 #define VENC_VIDCTL_DOMD			(3 << 4)
140 #define VENC_VIDCTL_YCDIR_SHIFT			0
141 #define VENC_VIDCTL_YCDIR			(1 << 0)
142 
143 #define VENC_VDPRO_ATYCC_SHIFT			5
144 #define VENC_VDPRO_ATYCC			(1 << 5)
145 #define VENC_VDPRO_ATCOM_SHIFT			4
146 #define VENC_VDPRO_ATCOM			(1 << 4)
147 #define VENC_VDPRO_DAFRQ			(1 << 3)
148 #define VENC_VDPRO_DAUPS			(1 << 2)
149 #define VENC_VDPRO_CUPS				(1 << 1)
150 #define VENC_VDPRO_YUPS				(1 << 0)
151 
152 #define VENC_SYNCCTL_VPL_SHIFT			3
153 #define VENC_SYNCCTL_VPL			(1 << 3)
154 #define VENC_SYNCCTL_HPL_SHIFT			2
155 #define VENC_SYNCCTL_HPL			(1 << 2)
156 #define VENC_SYNCCTL_SYEV_SHIFT			1
157 #define VENC_SYNCCTL_SYEV			(1 << 1)
158 #define VENC_SYNCCTL_SYEH_SHIFT			0
159 #define VENC_SYNCCTL_SYEH			(1 << 0)
160 #define VENC_SYNCCTL_OVD_SHIFT			14
161 #define VENC_SYNCCTL_OVD			(1 << 14)
162 
163 #define VENC_DCLKCTL_DCKEC_SHIFT		11
164 #define VENC_DCLKCTL_DCKEC			(1 << 11)
165 #define VENC_DCLKCTL_DCKPW_SHIFT		0
166 #define VENC_DCLKCTL_DCKPW			(0x3f << 0)
167 
168 #define VENC_VSTAT_FIDST			(1 << 4)
169 
170 #define VENC_CMPNT_MRGB_SHIFT			14
171 #define VENC_CMPNT_MRGB				(1 << 14)
172 
173 #endif				/* _VPBE_VENC_REGS_H */
174