1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Support for periodic interrupts (100 per second) and for getting
4 * the current time from the RTC on Power Macintoshes.
5 *
6 * We use the decrementer register for our periodic interrupts.
7 *
8 * Paul Mackerras August 1996.
9 * Copyright (C) 1996 Paul Mackerras.
10 * Copyright (C) 2003-2005 Benjamin Herrenschmidt.
11 *
12 */
13 #include <linux/errno.h>
14 #include <linux/sched.h>
15 #include <linux/kernel.h>
16 #include <linux/param.h>
17 #include <linux/string.h>
18 #include <linux/mm.h>
19 #include <linux/init.h>
20 #include <linux/time.h>
21 #include <linux/adb.h>
22 #include <linux/cuda.h>
23 #include <linux/pmu.h>
24 #include <linux/interrupt.h>
25 #include <linux/hardirq.h>
26 #include <linux/rtc.h>
27
28 #include <asm/sections.h>
29 #include <asm/prom.h>
30 #include <asm/io.h>
31 #include <asm/pgtable.h>
32 #include <asm/machdep.h>
33 #include <asm/time.h>
34 #include <asm/nvram.h>
35 #include <asm/smu.h>
36
37 #include "pmac.h"
38
39 #undef DEBUG
40
41 #ifdef DEBUG
42 #define DBG(x...) printk(x)
43 #else
44 #define DBG(x...)
45 #endif
46
47 /*
48 * Offset between Unix time (1970-based) and Mac time (1904-based). Cuda and PMU
49 * times wrap in 2040. If we need to handle later times, the read_time functions
50 * need to be changed to interpret wrapped times as post-2040.
51 */
52 #define RTC_OFFSET 2082844800
53
54 /*
55 * Calibrate the decrementer frequency with the VIA timer 1.
56 */
57 #define VIA_TIMER_FREQ_6 4700000 /* time 1 frequency * 6 */
58
59 /* VIA registers */
60 #define RS 0x200 /* skip between registers */
61 #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
62 #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
63 #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
64 #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
65 #define ACR (11*RS) /* Auxiliary control register */
66 #define IFR (13*RS) /* Interrupt flag register */
67
68 /* Bits in ACR */
69 #define T1MODE 0xc0 /* Timer 1 mode */
70 #define T1MODE_CONT 0x40 /* continuous interrupts */
71
72 /* Bits in IFR and IER */
73 #define T1_INT 0x40 /* Timer 1 interrupt */
74
pmac_time_init(void)75 long __init pmac_time_init(void)
76 {
77 s32 delta = 0;
78 #ifdef CONFIG_NVRAM
79 int dst;
80
81 delta = ((s32)pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0x9)) << 16;
82 delta |= ((s32)pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0xa)) << 8;
83 delta |= pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0xb);
84 if (delta & 0x00800000UL)
85 delta |= 0xFF000000UL;
86 dst = ((pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0x8) & 0x80) != 0);
87 printk("GMT Delta read from XPRAM: %d minutes, DST: %s\n", delta/60,
88 dst ? "on" : "off");
89 #endif
90 return delta;
91 }
92
93 #ifdef CONFIG_ADB_CUDA
cuda_get_time(void)94 static time64_t cuda_get_time(void)
95 {
96 struct adb_request req;
97 time64_t now;
98
99 if (cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_GET_TIME) < 0)
100 return 0;
101 while (!req.complete)
102 cuda_poll();
103 if (req.reply_len != 7)
104 printk(KERN_ERR "cuda_get_time: got %d byte reply\n",
105 req.reply_len);
106 now = (u32)((req.reply[3] << 24) + (req.reply[4] << 16) +
107 (req.reply[5] << 8) + req.reply[6]);
108 /* it's either after year 2040, or the RTC has gone backwards */
109 WARN_ON(now < RTC_OFFSET);
110
111 return now - RTC_OFFSET;
112 }
113
114 #define cuda_get_rtc_time(tm) rtc_time64_to_tm(cuda_get_time(), (tm))
115
cuda_set_rtc_time(struct rtc_time * tm)116 static int cuda_set_rtc_time(struct rtc_time *tm)
117 {
118 u32 nowtime;
119 struct adb_request req;
120
121 nowtime = lower_32_bits(rtc_tm_to_time64(tm) + RTC_OFFSET);
122 if (cuda_request(&req, NULL, 6, CUDA_PACKET, CUDA_SET_TIME,
123 nowtime >> 24, nowtime >> 16, nowtime >> 8,
124 nowtime) < 0)
125 return -ENXIO;
126 while (!req.complete)
127 cuda_poll();
128 if ((req.reply_len != 3) && (req.reply_len != 7))
129 printk(KERN_ERR "cuda_set_rtc_time: got %d byte reply\n",
130 req.reply_len);
131 return 0;
132 }
133
134 #else
135 #define cuda_get_time() 0
136 #define cuda_get_rtc_time(tm)
137 #define cuda_set_rtc_time(tm) 0
138 #endif
139
140 #ifdef CONFIG_ADB_PMU
pmu_get_time(void)141 static time64_t pmu_get_time(void)
142 {
143 struct adb_request req;
144 time64_t now;
145
146 if (pmu_request(&req, NULL, 1, PMU_READ_RTC) < 0)
147 return 0;
148 pmu_wait_complete(&req);
149 if (req.reply_len != 4)
150 printk(KERN_ERR "pmu_get_time: got %d byte reply from PMU\n",
151 req.reply_len);
152 now = (u32)((req.reply[0] << 24) + (req.reply[1] << 16) +
153 (req.reply[2] << 8) + req.reply[3]);
154
155 /* it's either after year 2040, or the RTC has gone backwards */
156 WARN_ON(now < RTC_OFFSET);
157
158 return now - RTC_OFFSET;
159 }
160
161 #define pmu_get_rtc_time(tm) rtc_time64_to_tm(pmu_get_time(), (tm))
162
pmu_set_rtc_time(struct rtc_time * tm)163 static int pmu_set_rtc_time(struct rtc_time *tm)
164 {
165 u32 nowtime;
166 struct adb_request req;
167
168 nowtime = lower_32_bits(rtc_tm_to_time64(tm) + RTC_OFFSET);
169 if (pmu_request(&req, NULL, 5, PMU_SET_RTC, nowtime >> 24,
170 nowtime >> 16, nowtime >> 8, nowtime) < 0)
171 return -ENXIO;
172 pmu_wait_complete(&req);
173 if (req.reply_len != 0)
174 printk(KERN_ERR "pmu_set_rtc_time: %d byte reply from PMU\n",
175 req.reply_len);
176 return 0;
177 }
178
179 #else
180 #define pmu_get_time() 0
181 #define pmu_get_rtc_time(tm)
182 #define pmu_set_rtc_time(tm) 0
183 #endif
184
185 #ifdef CONFIG_PMAC_SMU
smu_get_time(void)186 static time64_t smu_get_time(void)
187 {
188 struct rtc_time tm;
189
190 if (smu_get_rtc_time(&tm, 1))
191 return 0;
192 return rtc_tm_to_time64(&tm);
193 }
194
195 #else
196 #define smu_get_time() 0
197 #define smu_get_rtc_time(tm, spin)
198 #define smu_set_rtc_time(tm, spin) 0
199 #endif
200
201 /* Can't be __init, it's called when suspending and resuming */
pmac_get_boot_time(void)202 time64_t pmac_get_boot_time(void)
203 {
204 /* Get the time from the RTC, used only at boot time */
205 switch (sys_ctrler) {
206 case SYS_CTRLER_CUDA:
207 return cuda_get_time();
208 case SYS_CTRLER_PMU:
209 return pmu_get_time();
210 case SYS_CTRLER_SMU:
211 return smu_get_time();
212 default:
213 return 0;
214 }
215 }
216
pmac_get_rtc_time(struct rtc_time * tm)217 void pmac_get_rtc_time(struct rtc_time *tm)
218 {
219 /* Get the time from the RTC, used only at boot time */
220 switch (sys_ctrler) {
221 case SYS_CTRLER_CUDA:
222 cuda_get_rtc_time(tm);
223 break;
224 case SYS_CTRLER_PMU:
225 pmu_get_rtc_time(tm);
226 break;
227 case SYS_CTRLER_SMU:
228 smu_get_rtc_time(tm, 1);
229 break;
230 default:
231 ;
232 }
233 }
234
pmac_set_rtc_time(struct rtc_time * tm)235 int pmac_set_rtc_time(struct rtc_time *tm)
236 {
237 switch (sys_ctrler) {
238 case SYS_CTRLER_CUDA:
239 return cuda_set_rtc_time(tm);
240 case SYS_CTRLER_PMU:
241 return pmu_set_rtc_time(tm);
242 case SYS_CTRLER_SMU:
243 return smu_set_rtc_time(tm, 1);
244 default:
245 return -ENODEV;
246 }
247 }
248
249 #ifdef CONFIG_PPC32
250 /*
251 * Calibrate the decrementer register using VIA timer 1.
252 * This is used both on powermacs and CHRP machines.
253 */
via_calibrate_decr(void)254 static int __init via_calibrate_decr(void)
255 {
256 struct device_node *vias;
257 volatile unsigned char __iomem *via;
258 int count = VIA_TIMER_FREQ_6 / 100;
259 unsigned int dstart, dend;
260 struct resource rsrc;
261
262 vias = of_find_node_by_name(NULL, "via-cuda");
263 if (vias == NULL)
264 vias = of_find_node_by_name(NULL, "via-pmu");
265 if (vias == NULL)
266 vias = of_find_node_by_name(NULL, "via");
267 if (vias == NULL || of_address_to_resource(vias, 0, &rsrc)) {
268 of_node_put(vias);
269 return 0;
270 }
271 of_node_put(vias);
272 via = ioremap(rsrc.start, resource_size(&rsrc));
273 if (via == NULL) {
274 printk(KERN_ERR "Failed to map VIA for timer calibration !\n");
275 return 0;
276 }
277
278 /* set timer 1 for continuous interrupts */
279 out_8(&via[ACR], (via[ACR] & ~T1MODE) | T1MODE_CONT);
280 /* set the counter to a small value */
281 out_8(&via[T1CH], 2);
282 /* set the latch to `count' */
283 out_8(&via[T1LL], count);
284 out_8(&via[T1LH], count >> 8);
285 /* wait until it hits 0 */
286 while ((in_8(&via[IFR]) & T1_INT) == 0)
287 ;
288 dstart = get_dec();
289 /* clear the interrupt & wait until it hits 0 again */
290 in_8(&via[T1CL]);
291 while ((in_8(&via[IFR]) & T1_INT) == 0)
292 ;
293 dend = get_dec();
294
295 ppc_tb_freq = (dstart - dend) * 100 / 6;
296
297 iounmap(via);
298
299 return 1;
300 }
301 #endif
302
303 /*
304 * Query the OF and get the decr frequency.
305 */
pmac_calibrate_decr(void)306 void __init pmac_calibrate_decr(void)
307 {
308 generic_calibrate_decr();
309
310 #ifdef CONFIG_PPC32
311 /* We assume MacRISC2 machines have correct device-tree
312 * calibration. That's better since the VIA itself seems
313 * to be slightly off. --BenH
314 */
315 if (!of_machine_is_compatible("MacRISC2") &&
316 !of_machine_is_compatible("MacRISC3") &&
317 !of_machine_is_compatible("MacRISC4"))
318 if (via_calibrate_decr())
319 return;
320
321 /* Special case: QuickSilver G4s seem to have a badly calibrated
322 * timebase-frequency in OF, VIA is much better on these. We should
323 * probably implement calibration based on the KL timer on these
324 * machines anyway... -BenH
325 */
326 if (of_machine_is_compatible("PowerMac3,5"))
327 if (via_calibrate_decr())
328 return;
329 #endif
330 }
331
