1 /*
2 * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
3 * and RBTX49xx patch from CELF patch archive.
4 *
5 * 2003-2005 (c) MontaVista Software, Inc.
6 * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12 #include <linux/init.h>
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/string.h>
17 #include <linux/export.h>
18 #include <linux/clk-provider.h>
19 #include <linux/clkdev.h>
20 #include <linux/err.h>
21 #include <linux/gpio/driver.h>
22 #include <linux/platform_device.h>
23 #include <linux/platform_data/txx9/ndfmc.h>
24 #include <linux/serial_core.h>
25 #include <linux/mtd/physmap.h>
26 #include <linux/leds.h>
27 #include <linux/device.h>
28 #include <linux/slab.h>
29 #include <linux/irq.h>
30 #include <asm/bootinfo.h>
31 #include <asm/idle.h>
32 #include <asm/time.h>
33 #include <asm/reboot.h>
34 #include <asm/r4kcache.h>
35 #include <asm/sections.h>
36 #include <asm/setup.h>
37 #include <asm/txx9/generic.h>
38 #include <asm/txx9/pci.h>
39 #include <asm/txx9tmr.h>
40 #include <asm/txx9/dmac.h>
41 #ifdef CONFIG_CPU_TX49XX
42 #include <asm/txx9/tx4938.h>
43 #endif
44
45 /* EBUSC settings of TX4927, etc. */
46 struct resource txx9_ce_res[8];
47 static char txx9_ce_res_name[8][4]; /* "CEn" */
48
49 /* pcode, internal register */
50 unsigned int txx9_pcode;
51 char txx9_pcode_str[8];
52 static struct resource txx9_reg_res = {
53 .name = txx9_pcode_str,
54 .flags = IORESOURCE_MEM,
55 };
56 void __init
txx9_reg_res_init(unsigned int pcode,unsigned long base,unsigned long size)57 txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size)
58 {
59 int i;
60
61 for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) {
62 sprintf(txx9_ce_res_name[i], "CE%d", i);
63 txx9_ce_res[i].flags = IORESOURCE_MEM;
64 txx9_ce_res[i].name = txx9_ce_res_name[i];
65 }
66
67 txx9_pcode = pcode;
68 sprintf(txx9_pcode_str, "TX%x", pcode);
69 if (base) {
70 txx9_reg_res.start = base & 0xfffffffffULL;
71 txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1);
72 request_resource(&iomem_resource, &txx9_reg_res);
73 }
74 }
75
76 /* clocks */
77 unsigned int txx9_master_clock;
78 unsigned int txx9_cpu_clock;
79 unsigned int txx9_gbus_clock;
80
81 #ifdef CONFIG_CPU_TX39XX
82 /* don't enable by default - see errata */
83 int txx9_ccfg_toeon __initdata;
84 #else
85 int txx9_ccfg_toeon __initdata = 1;
86 #endif
87
88 #define BOARD_VEC(board) extern struct txx9_board_vec board;
89 #include <asm/txx9/boards.h>
90 #undef BOARD_VEC
91
92 struct txx9_board_vec *txx9_board_vec __initdata;
93 static char txx9_system_type[32];
94
95 static struct txx9_board_vec *board_vecs[] __initdata = {
96 #define BOARD_VEC(board) &board,
97 #include <asm/txx9/boards.h>
98 #undef BOARD_VEC
99 };
100
find_board_byname(const char * name)101 static struct txx9_board_vec *__init find_board_byname(const char *name)
102 {
103 int i;
104
105 /* search board_vecs table */
106 for (i = 0; i < ARRAY_SIZE(board_vecs); i++) {
107 if (strstr(board_vecs[i]->system, name))
108 return board_vecs[i];
109 }
110 return NULL;
111 }
112
prom_init_cmdline(void)113 static void __init prom_init_cmdline(void)
114 {
115 int argc;
116 int *argv32;
117 int i; /* Always ignore the "-c" at argv[0] */
118
119 if (fw_arg0 >= CKSEG0 || fw_arg1 < CKSEG0) {
120 /*
121 * argc is not a valid number, or argv32 is not a valid
122 * pointer
123 */
124 argc = 0;
125 argv32 = NULL;
126 } else {
127 argc = (int)fw_arg0;
128 argv32 = (int *)fw_arg1;
129 }
130
131 arcs_cmdline[0] = '\0';
132
133 for (i = 1; i < argc; i++) {
134 char *str = (char *)(long)argv32[i];
135 if (i != 1)
136 strcat(arcs_cmdline, " ");
137 if (strchr(str, ' ')) {
138 strcat(arcs_cmdline, "\"");
139 strcat(arcs_cmdline, str);
140 strcat(arcs_cmdline, "\"");
141 } else
142 strcat(arcs_cmdline, str);
143 }
144 }
145
146 static int txx9_ic_disable __initdata;
147 static int txx9_dc_disable __initdata;
148
149 #if defined(CONFIG_CPU_TX49XX)
150 /* flush all cache on very early stage (before 4k_cache_init) */
early_flush_dcache(void)151 static void __init early_flush_dcache(void)
152 {
153 unsigned int conf = read_c0_config();
154 unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6));
155 unsigned int linesz = 32;
156 unsigned long addr, end;
157
158 end = INDEX_BASE + dc_size / 4;
159 /* 4way, waybit=0 */
160 for (addr = INDEX_BASE; addr < end; addr += linesz) {
161 cache_op(Index_Writeback_Inv_D, addr | 0);
162 cache_op(Index_Writeback_Inv_D, addr | 1);
163 cache_op(Index_Writeback_Inv_D, addr | 2);
164 cache_op(Index_Writeback_Inv_D, addr | 3);
165 }
166 }
167
txx9_cache_fixup(void)168 static void __init txx9_cache_fixup(void)
169 {
170 unsigned int conf;
171
172 conf = read_c0_config();
173 /* flush and disable */
174 if (txx9_ic_disable) {
175 conf |= TX49_CONF_IC;
176 write_c0_config(conf);
177 }
178 if (txx9_dc_disable) {
179 early_flush_dcache();
180 conf |= TX49_CONF_DC;
181 write_c0_config(conf);
182 }
183
184 /* enable cache */
185 conf = read_c0_config();
186 if (!txx9_ic_disable)
187 conf &= ~TX49_CONF_IC;
188 if (!txx9_dc_disable)
189 conf &= ~TX49_CONF_DC;
190 write_c0_config(conf);
191
192 if (conf & TX49_CONF_IC)
193 pr_info("TX49XX I-Cache disabled.\n");
194 if (conf & TX49_CONF_DC)
195 pr_info("TX49XX D-Cache disabled.\n");
196 }
197 #elif defined(CONFIG_CPU_TX39XX)
198 /* flush all cache on very early stage (before tx39_cache_init) */
early_flush_dcache(void)199 static void __init early_flush_dcache(void)
200 {
201 unsigned int conf = read_c0_config();
202 unsigned int dc_size = 1 << (10 + ((conf & TX39_CONF_DCS_MASK) >>
203 TX39_CONF_DCS_SHIFT));
204 unsigned int linesz = 16;
205 unsigned long addr, end;
206
207 end = INDEX_BASE + dc_size / 2;
208 /* 2way, waybit=0 */
209 for (addr = INDEX_BASE; addr < end; addr += linesz) {
210 cache_op(Index_Writeback_Inv_D, addr | 0);
211 cache_op(Index_Writeback_Inv_D, addr | 1);
212 }
213 }
214
txx9_cache_fixup(void)215 static void __init txx9_cache_fixup(void)
216 {
217 unsigned int conf;
218
219 conf = read_c0_config();
220 /* flush and disable */
221 if (txx9_ic_disable) {
222 conf &= ~TX39_CONF_ICE;
223 write_c0_config(conf);
224 }
225 if (txx9_dc_disable) {
226 early_flush_dcache();
227 conf &= ~TX39_CONF_DCE;
228 write_c0_config(conf);
229 }
230
231 /* enable cache */
232 conf = read_c0_config();
233 if (!txx9_ic_disable)
234 conf |= TX39_CONF_ICE;
235 if (!txx9_dc_disable)
236 conf |= TX39_CONF_DCE;
237 write_c0_config(conf);
238
239 if (!(conf & TX39_CONF_ICE))
240 pr_info("TX39XX I-Cache disabled.\n");
241 if (!(conf & TX39_CONF_DCE))
242 pr_info("TX39XX D-Cache disabled.\n");
243 }
244 #else
txx9_cache_fixup(void)245 static inline void txx9_cache_fixup(void)
246 {
247 }
248 #endif
249
preprocess_cmdline(void)250 static void __init preprocess_cmdline(void)
251 {
252 static char cmdline[COMMAND_LINE_SIZE] __initdata;
253 char *s;
254
255 strcpy(cmdline, arcs_cmdline);
256 s = cmdline;
257 arcs_cmdline[0] = '\0';
258 while (s && *s) {
259 char *str = strsep(&s, " ");
260 if (strncmp(str, "board=", 6) == 0) {
261 txx9_board_vec = find_board_byname(str + 6);
262 continue;
263 } else if (strncmp(str, "masterclk=", 10) == 0) {
264 unsigned int val;
265 if (kstrtouint(str + 10, 10, &val) == 0)
266 txx9_master_clock = val;
267 continue;
268 } else if (strcmp(str, "icdisable") == 0) {
269 txx9_ic_disable = 1;
270 continue;
271 } else if (strcmp(str, "dcdisable") == 0) {
272 txx9_dc_disable = 1;
273 continue;
274 } else if (strcmp(str, "toeoff") == 0) {
275 txx9_ccfg_toeon = 0;
276 continue;
277 } else if (strcmp(str, "toeon") == 0) {
278 txx9_ccfg_toeon = 1;
279 continue;
280 }
281 if (arcs_cmdline[0])
282 strcat(arcs_cmdline, " ");
283 strcat(arcs_cmdline, str);
284 }
285
286 txx9_cache_fixup();
287 }
288
select_board(void)289 static void __init select_board(void)
290 {
291 const char *envstr;
292
293 /* first, determine by "board=" argument in preprocess_cmdline() */
294 if (txx9_board_vec)
295 return;
296 /* next, determine by "board" envvar */
297 envstr = prom_getenv("board");
298 if (envstr) {
299 txx9_board_vec = find_board_byname(envstr);
300 if (txx9_board_vec)
301 return;
302 }
303
304 /* select "default" board */
305 #ifdef CONFIG_TOSHIBA_JMR3927
306 txx9_board_vec = &jmr3927_vec;
307 #endif
308 #ifdef CONFIG_CPU_TX49XX
309 switch (TX4938_REV_PCODE()) {
310 #ifdef CONFIG_TOSHIBA_RBTX4927
311 case 0x4927:
312 txx9_board_vec = &rbtx4927_vec;
313 break;
314 case 0x4937:
315 txx9_board_vec = &rbtx4937_vec;
316 break;
317 #endif
318 #ifdef CONFIG_TOSHIBA_RBTX4938
319 case 0x4938:
320 txx9_board_vec = &rbtx4938_vec;
321 break;
322 #endif
323 #ifdef CONFIG_TOSHIBA_RBTX4939
324 case 0x4939:
325 txx9_board_vec = &rbtx4939_vec;
326 break;
327 #endif
328 }
329 #endif
330 }
331
prom_init(void)332 void __init prom_init(void)
333 {
334 prom_init_cmdline();
335 preprocess_cmdline();
336 select_board();
337
338 strcpy(txx9_system_type, txx9_board_vec->system);
339
340 txx9_board_vec->prom_init();
341 }
342
prom_free_prom_memory(void)343 void __init prom_free_prom_memory(void)
344 {
345 unsigned long saddr = PAGE_SIZE;
346 unsigned long eaddr = __pa_symbol(&_text);
347
348 if (saddr < eaddr)
349 free_init_pages("prom memory", saddr, eaddr);
350 }
351
get_system_type(void)352 const char *get_system_type(void)
353 {
354 return txx9_system_type;
355 }
356
prom_getenv(const char * name)357 const char *__init prom_getenv(const char *name)
358 {
359 const s32 *str;
360
361 if (fw_arg2 < CKSEG0)
362 return NULL;
363
364 str = (const s32 *)fw_arg2;
365 /* YAMON style ("name", "value" pairs) */
366 while (str[0] && str[1]) {
367 if (!strcmp((const char *)(unsigned long)str[0], name))
368 return (const char *)(unsigned long)str[1];
369 str += 2;
370 }
371 return NULL;
372 }
373
txx9_machine_halt(void)374 static void __noreturn txx9_machine_halt(void)
375 {
376 local_irq_disable();
377 clear_c0_status(ST0_IM);
378 while (1) {
379 if (cpu_wait) {
380 (*cpu_wait)();
381 if (cpu_has_counter) {
382 /*
383 * Clear counter interrupt while it
384 * breaks WAIT instruction even if
385 * masked.
386 */
387 write_c0_compare(0);
388 }
389 }
390 }
391 }
392
393 /* Watchdog support */
txx9_wdt_init(unsigned long base)394 void __init txx9_wdt_init(unsigned long base)
395 {
396 struct resource res = {
397 .start = base,
398 .end = base + 0x100 - 1,
399 .flags = IORESOURCE_MEM,
400 };
401 platform_device_register_simple("txx9wdt", -1, &res, 1);
402 }
403
txx9_wdt_now(unsigned long base)404 void txx9_wdt_now(unsigned long base)
405 {
406 struct txx9_tmr_reg __iomem *tmrptr =
407 ioremap(base, sizeof(struct txx9_tmr_reg));
408 /* disable watch dog timer */
409 __raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr);
410 __raw_writel(0, &tmrptr->tcr);
411 /* kick watchdog */
412 __raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr);
413 __raw_writel(1, &tmrptr->cpra); /* immediate */
414 __raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG,
415 &tmrptr->tcr);
416 }
417
418 /* SPI support */
txx9_spi_init(int busid,unsigned long base,int irq)419 void __init txx9_spi_init(int busid, unsigned long base, int irq)
420 {
421 struct resource res[] = {
422 {
423 .start = base,
424 .end = base + 0x20 - 1,
425 .flags = IORESOURCE_MEM,
426 }, {
427 .start = irq,
428 .flags = IORESOURCE_IRQ,
429 },
430 };
431 platform_device_register_simple("spi_txx9", busid,
432 res, ARRAY_SIZE(res));
433 }
434
txx9_ethaddr_init(unsigned int id,unsigned char * ethaddr)435 void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr)
436 {
437 struct platform_device *pdev =
438 platform_device_alloc("tc35815-mac", id);
439 if (!pdev ||
440 platform_device_add_data(pdev, ethaddr, 6) ||
441 platform_device_add(pdev))
442 platform_device_put(pdev);
443 }
444
txx9_sio_init(unsigned long baseaddr,int irq,unsigned int line,unsigned int sclk,int nocts)445 void __init txx9_sio_init(unsigned long baseaddr, int irq,
446 unsigned int line, unsigned int sclk, int nocts)
447 {
448 #ifdef CONFIG_SERIAL_TXX9
449 struct uart_port req;
450
451 memset(&req, 0, sizeof(req));
452 req.line = line;
453 req.iotype = UPIO_MEM;
454 req.membase = ioremap(baseaddr, 0x24);
455 req.mapbase = baseaddr;
456 req.irq = irq;
457 if (!nocts)
458 req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
459 if (sclk) {
460 req.flags |= UPF_MAGIC_MULTIPLIER /*USE_SCLK*/;
461 req.uartclk = sclk;
462 } else
463 req.uartclk = TXX9_IMCLK;
464 early_serial_txx9_setup(&req);
465 #endif /* CONFIG_SERIAL_TXX9 */
466 }
467
468 #ifdef CONFIG_EARLY_PRINTK
null_prom_putchar(char c)469 static void null_prom_putchar(char c)
470 {
471 }
472 void (*txx9_prom_putchar)(char c) = null_prom_putchar;
473
prom_putchar(char c)474 void prom_putchar(char c)
475 {
476 txx9_prom_putchar(c);
477 }
478
479 static void __iomem *early_txx9_sio_port;
480
early_txx9_sio_putchar(char c)481 static void early_txx9_sio_putchar(char c)
482 {
483 #define TXX9_SICISR 0x0c
484 #define TXX9_SITFIFO 0x1c
485 #define TXX9_SICISR_TXALS 0x00000002
486 while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) &
487 TXX9_SICISR_TXALS))
488 ;
489 __raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO);
490 }
491
txx9_sio_putchar_init(unsigned long baseaddr)492 void __init txx9_sio_putchar_init(unsigned long baseaddr)
493 {
494 early_txx9_sio_port = ioremap(baseaddr, 0x24);
495 txx9_prom_putchar = early_txx9_sio_putchar;
496 }
497 #endif /* CONFIG_EARLY_PRINTK */
498
499 /* wrappers */
plat_mem_setup(void)500 void __init plat_mem_setup(void)
501 {
502 ioport_resource.start = 0;
503 ioport_resource.end = ~0UL; /* no limit */
504 iomem_resource.start = 0;
505 iomem_resource.end = ~0UL; /* no limit */
506
507 /* fallback restart/halt routines */
508 _machine_restart = (void (*)(char *))txx9_machine_halt;
509 _machine_halt = txx9_machine_halt;
510 pm_power_off = txx9_machine_halt;
511
512 #ifdef CONFIG_PCI
513 pcibios_plat_setup = txx9_pcibios_setup;
514 #endif
515 txx9_board_vec->mem_setup();
516 }
517
arch_init_irq(void)518 void __init arch_init_irq(void)
519 {
520 txx9_board_vec->irq_setup();
521 }
522
plat_time_init(void)523 void __init plat_time_init(void)
524 {
525 #ifdef CONFIG_CPU_TX49XX
526 mips_hpt_frequency = txx9_cpu_clock / 2;
527 #endif
528 txx9_board_vec->time_init();
529 }
530
txx9_clk_init(void)531 static void txx9_clk_init(void)
532 {
533 struct clk_hw *hw;
534 int error;
535
536 hw = clk_hw_register_fixed_rate(NULL, "gbus", NULL, 0, txx9_gbus_clock);
537 if (IS_ERR(hw)) {
538 error = PTR_ERR(hw);
539 goto fail;
540 }
541
542 hw = clk_hw_register_fixed_factor(NULL, "imbus", "gbus", 0, 1, 2);
543 error = clk_hw_register_clkdev(hw, "imbus_clk", NULL);
544 if (error)
545 goto fail;
546
547 #ifdef CONFIG_CPU_TX49XX
548 if (TX4938_REV_PCODE() == 0x4938) {
549 hw = clk_hw_register_fixed_factor(NULL, "spi", "gbus", 0, 1, 4);
550 error = clk_hw_register_clkdev(hw, "spi-baseclk", NULL);
551 if (error)
552 goto fail;
553 }
554 #endif
555
556 return;
557
558 fail:
559 pr_err("Failed to register clocks: %d\n", error);
560 }
561
_txx9_arch_init(void)562 static int __init _txx9_arch_init(void)
563 {
564 txx9_clk_init();
565
566 if (txx9_board_vec->arch_init)
567 txx9_board_vec->arch_init();
568 return 0;
569 }
570 arch_initcall(_txx9_arch_init);
571
_txx9_device_init(void)572 static int __init _txx9_device_init(void)
573 {
574 if (txx9_board_vec->device_init)
575 txx9_board_vec->device_init();
576 return 0;
577 }
578 device_initcall(_txx9_device_init);
579
580 int (*txx9_irq_dispatch)(int pending);
plat_irq_dispatch(void)581 asmlinkage void plat_irq_dispatch(void)
582 {
583 int pending = read_c0_status() & read_c0_cause() & ST0_IM;
584 int irq = txx9_irq_dispatch(pending);
585
586 if (likely(irq >= 0))
587 do_IRQ(irq);
588 else
589 spurious_interrupt();
590 }
591
592 /* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */
593 #ifdef NEEDS_TXX9_SWIZZLE_ADDR_B
__swizzle_addr_none(unsigned long port)594 static unsigned long __swizzle_addr_none(unsigned long port)
595 {
596 return port;
597 }
598 unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none;
599 EXPORT_SYMBOL(__swizzle_addr_b);
600 #endif
601
602 #ifdef NEEDS_TXX9_IOSWABW
ioswabw_default(volatile u16 * a,u16 x)603 static u16 ioswabw_default(volatile u16 *a, u16 x)
604 {
605 return le16_to_cpu(x);
606 }
__mem_ioswabw_default(volatile u16 * a,u16 x)607 static u16 __mem_ioswabw_default(volatile u16 *a, u16 x)
608 {
609 return x;
610 }
611 u16 (*ioswabw)(volatile u16 *a, u16 x) = ioswabw_default;
612 EXPORT_SYMBOL(ioswabw);
613 u16 (*__mem_ioswabw)(volatile u16 *a, u16 x) = __mem_ioswabw_default;
614 EXPORT_SYMBOL(__mem_ioswabw);
615 #endif
616
txx9_physmap_flash_init(int no,unsigned long addr,unsigned long size,const struct physmap_flash_data * pdata)617 void __init txx9_physmap_flash_init(int no, unsigned long addr,
618 unsigned long size,
619 const struct physmap_flash_data *pdata)
620 {
621 #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
622 struct resource res = {
623 .start = addr,
624 .end = addr + size - 1,
625 .flags = IORESOURCE_MEM,
626 };
627 struct platform_device *pdev;
628 static struct mtd_partition parts[2];
629 struct physmap_flash_data pdata_part;
630
631 /* If this area contained boot area, make separate partition */
632 if (pdata->nr_parts == 0 && !pdata->parts &&
633 addr < 0x1fc00000 && addr + size > 0x1fc00000 &&
634 !parts[0].name) {
635 parts[0].name = "boot";
636 parts[0].offset = 0x1fc00000 - addr;
637 parts[0].size = addr + size - 0x1fc00000;
638 parts[1].name = "user";
639 parts[1].offset = 0;
640 parts[1].size = 0x1fc00000 - addr;
641 pdata_part = *pdata;
642 pdata_part.nr_parts = ARRAY_SIZE(parts);
643 pdata_part.parts = parts;
644 pdata = &pdata_part;
645 }
646
647 pdev = platform_device_alloc("physmap-flash", no);
648 if (!pdev ||
649 platform_device_add_resources(pdev, &res, 1) ||
650 platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
651 platform_device_add(pdev))
652 platform_device_put(pdev);
653 #endif
654 }
655
txx9_ndfmc_init(unsigned long baseaddr,const struct txx9ndfmc_platform_data * pdata)656 void __init txx9_ndfmc_init(unsigned long baseaddr,
657 const struct txx9ndfmc_platform_data *pdata)
658 {
659 #if IS_ENABLED(CONFIG_MTD_NAND_TXX9NDFMC)
660 struct resource res = {
661 .start = baseaddr,
662 .end = baseaddr + 0x1000 - 1,
663 .flags = IORESOURCE_MEM,
664 };
665 struct platform_device *pdev = platform_device_alloc("txx9ndfmc", -1);
666
667 if (!pdev ||
668 platform_device_add_resources(pdev, &res, 1) ||
669 platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
670 platform_device_add(pdev))
671 platform_device_put(pdev);
672 #endif
673 }
674
675 #if IS_ENABLED(CONFIG_LEDS_GPIO)
676 static DEFINE_SPINLOCK(txx9_iocled_lock);
677
678 #define TXX9_IOCLED_MAXLEDS 8
679
680 struct txx9_iocled_data {
681 struct gpio_chip chip;
682 u8 cur_val;
683 void __iomem *mmioaddr;
684 struct gpio_led_platform_data pdata;
685 struct gpio_led leds[TXX9_IOCLED_MAXLEDS];
686 char names[TXX9_IOCLED_MAXLEDS][32];
687 };
688
txx9_iocled_get(struct gpio_chip * chip,unsigned int offset)689 static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset)
690 {
691 struct txx9_iocled_data *data = gpiochip_get_data(chip);
692 return !!(data->cur_val & (1 << offset));
693 }
694
txx9_iocled_set(struct gpio_chip * chip,unsigned int offset,int value)695 static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset,
696 int value)
697 {
698 struct txx9_iocled_data *data = gpiochip_get_data(chip);
699 unsigned long flags;
700 spin_lock_irqsave(&txx9_iocled_lock, flags);
701 if (value)
702 data->cur_val |= 1 << offset;
703 else
704 data->cur_val &= ~(1 << offset);
705 writeb(data->cur_val, data->mmioaddr);
706 mmiowb();
707 spin_unlock_irqrestore(&txx9_iocled_lock, flags);
708 }
709
txx9_iocled_dir_in(struct gpio_chip * chip,unsigned int offset)710 static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset)
711 {
712 return 0;
713 }
714
txx9_iocled_dir_out(struct gpio_chip * chip,unsigned int offset,int value)715 static int txx9_iocled_dir_out(struct gpio_chip *chip, unsigned int offset,
716 int value)
717 {
718 txx9_iocled_set(chip, offset, value);
719 return 0;
720 }
721
txx9_iocled_init(unsigned long baseaddr,int basenum,unsigned int num,int lowactive,const char * color,char ** deftriggers)722 void __init txx9_iocled_init(unsigned long baseaddr,
723 int basenum, unsigned int num, int lowactive,
724 const char *color, char **deftriggers)
725 {
726 struct txx9_iocled_data *iocled;
727 struct platform_device *pdev;
728 int i;
729 static char *default_triggers[] __initdata = {
730 "heartbeat",
731 "disk-activity",
732 "nand-disk",
733 NULL,
734 };
735
736 if (!deftriggers)
737 deftriggers = default_triggers;
738 iocled = kzalloc(sizeof(*iocled), GFP_KERNEL);
739 if (!iocled)
740 return;
741 iocled->mmioaddr = ioremap(baseaddr, 1);
742 if (!iocled->mmioaddr)
743 goto out_free;
744 iocled->chip.get = txx9_iocled_get;
745 iocled->chip.set = txx9_iocled_set;
746 iocled->chip.direction_input = txx9_iocled_dir_in;
747 iocled->chip.direction_output = txx9_iocled_dir_out;
748 iocled->chip.label = "iocled";
749 iocled->chip.base = basenum;
750 iocled->chip.ngpio = num;
751 if (gpiochip_add_data(&iocled->chip, iocled))
752 goto out_unmap;
753 if (basenum < 0)
754 basenum = iocled->chip.base;
755
756 pdev = platform_device_alloc("leds-gpio", basenum);
757 if (!pdev)
758 goto out_gpio;
759 iocled->pdata.num_leds = num;
760 iocled->pdata.leds = iocled->leds;
761 for (i = 0; i < num; i++) {
762 struct gpio_led *led = &iocled->leds[i];
763 snprintf(iocled->names[i], sizeof(iocled->names[i]),
764 "iocled:%s:%u", color, i);
765 led->name = iocled->names[i];
766 led->gpio = basenum + i;
767 led->active_low = lowactive;
768 if (deftriggers && *deftriggers)
769 led->default_trigger = *deftriggers++;
770 }
771 pdev->dev.platform_data = &iocled->pdata;
772 if (platform_device_add(pdev))
773 goto out_pdev;
774 return;
775
776 out_pdev:
777 platform_device_put(pdev);
778 out_gpio:
779 gpiochip_remove(&iocled->chip);
780 out_unmap:
781 iounmap(iocled->mmioaddr);
782 out_free:
783 kfree(iocled);
784 }
785 #else /* CONFIG_LEDS_GPIO */
txx9_iocled_init(unsigned long baseaddr,int basenum,unsigned int num,int lowactive,const char * color,char ** deftriggers)786 void __init txx9_iocled_init(unsigned long baseaddr,
787 int basenum, unsigned int num, int lowactive,
788 const char *color, char **deftriggers)
789 {
790 }
791 #endif /* CONFIG_LEDS_GPIO */
792
txx9_dmac_init(int id,unsigned long baseaddr,int irq,const struct txx9dmac_platform_data * pdata)793 void __init txx9_dmac_init(int id, unsigned long baseaddr, int irq,
794 const struct txx9dmac_platform_data *pdata)
795 {
796 #if IS_ENABLED(CONFIG_TXX9_DMAC)
797 struct resource res[] = {
798 {
799 .start = baseaddr,
800 .end = baseaddr + 0x800 - 1,
801 .flags = IORESOURCE_MEM,
802 #ifndef CONFIG_MACH_TX49XX
803 }, {
804 .start = irq,
805 .flags = IORESOURCE_IRQ,
806 #endif
807 }
808 };
809 #ifdef CONFIG_MACH_TX49XX
810 struct resource chan_res[] = {
811 {
812 .flags = IORESOURCE_IRQ,
813 }
814 };
815 #endif
816 struct platform_device *pdev = platform_device_alloc("txx9dmac", id);
817 struct txx9dmac_chan_platform_data cpdata;
818 int i;
819
820 if (!pdev ||
821 platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) ||
822 platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
823 platform_device_add(pdev)) {
824 platform_device_put(pdev);
825 return;
826 }
827 memset(&cpdata, 0, sizeof(cpdata));
828 cpdata.dmac_dev = pdev;
829 for (i = 0; i < TXX9_DMA_MAX_NR_CHANNELS; i++) {
830 #ifdef CONFIG_MACH_TX49XX
831 chan_res[0].start = irq + i;
832 #endif
833 pdev = platform_device_alloc("txx9dmac-chan",
834 id * TXX9_DMA_MAX_NR_CHANNELS + i);
835 if (!pdev ||
836 #ifdef CONFIG_MACH_TX49XX
837 platform_device_add_resources(pdev, chan_res,
838 ARRAY_SIZE(chan_res)) ||
839 #endif
840 platform_device_add_data(pdev, &cpdata, sizeof(cpdata)) ||
841 platform_device_add(pdev))
842 platform_device_put(pdev);
843 }
844 #endif
845 }
846
txx9_aclc_init(unsigned long baseaddr,int irq,unsigned int dmac_id,unsigned int dma_chan_out,unsigned int dma_chan_in)847 void __init txx9_aclc_init(unsigned long baseaddr, int irq,
848 unsigned int dmac_id,
849 unsigned int dma_chan_out,
850 unsigned int dma_chan_in)
851 {
852 #if IS_ENABLED(CONFIG_SND_SOC_TXX9ACLC)
853 unsigned int dma_base = dmac_id * TXX9_DMA_MAX_NR_CHANNELS;
854 struct resource res[] = {
855 {
856 .start = baseaddr,
857 .end = baseaddr + 0x100 - 1,
858 .flags = IORESOURCE_MEM,
859 }, {
860 .start = irq,
861 .flags = IORESOURCE_IRQ,
862 }, {
863 .name = "txx9dmac-chan",
864 .start = dma_base + dma_chan_out,
865 .flags = IORESOURCE_DMA,
866 }, {
867 .name = "txx9dmac-chan",
868 .start = dma_base + dma_chan_in,
869 .flags = IORESOURCE_DMA,
870 }
871 };
872 struct platform_device *pdev =
873 platform_device_alloc("txx9aclc-ac97", -1);
874
875 if (!pdev ||
876 platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) ||
877 platform_device_add(pdev))
878 platform_device_put(pdev);
879 #endif
880 }
881
882 static struct bus_type txx9_sramc_subsys = {
883 .name = "txx9_sram",
884 .dev_name = "txx9_sram",
885 };
886
887 struct txx9_sramc_dev {
888 struct device dev;
889 struct bin_attribute bindata_attr;
890 void __iomem *base;
891 };
892
txx9_sram_read(struct file * filp,struct kobject * kobj,struct bin_attribute * bin_attr,char * buf,loff_t pos,size_t size)893 static ssize_t txx9_sram_read(struct file *filp, struct kobject *kobj,
894 struct bin_attribute *bin_attr,
895 char *buf, loff_t pos, size_t size)
896 {
897 struct txx9_sramc_dev *dev = bin_attr->private;
898 size_t ramsize = bin_attr->size;
899
900 if (pos >= ramsize)
901 return 0;
902 if (pos + size > ramsize)
903 size = ramsize - pos;
904 memcpy_fromio(buf, dev->base + pos, size);
905 return size;
906 }
907
txx9_sram_write(struct file * filp,struct kobject * kobj,struct bin_attribute * bin_attr,char * buf,loff_t pos,size_t size)908 static ssize_t txx9_sram_write(struct file *filp, struct kobject *kobj,
909 struct bin_attribute *bin_attr,
910 char *buf, loff_t pos, size_t size)
911 {
912 struct txx9_sramc_dev *dev = bin_attr->private;
913 size_t ramsize = bin_attr->size;
914
915 if (pos >= ramsize)
916 return 0;
917 if (pos + size > ramsize)
918 size = ramsize - pos;
919 memcpy_toio(dev->base + pos, buf, size);
920 return size;
921 }
922
txx9_device_release(struct device * dev)923 static void txx9_device_release(struct device *dev)
924 {
925 struct txx9_sramc_dev *tdev;
926
927 tdev = container_of(dev, struct txx9_sramc_dev, dev);
928 kfree(tdev);
929 }
930
txx9_sramc_init(struct resource * r)931 void __init txx9_sramc_init(struct resource *r)
932 {
933 struct txx9_sramc_dev *dev;
934 size_t size;
935 int err;
936
937 err = subsys_system_register(&txx9_sramc_subsys, NULL);
938 if (err)
939 return;
940 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
941 if (!dev)
942 return;
943 size = resource_size(r);
944 dev->base = ioremap(r->start, size);
945 if (!dev->base) {
946 kfree(dev);
947 return;
948 }
949 dev->dev.release = &txx9_device_release;
950 dev->dev.bus = &txx9_sramc_subsys;
951 sysfs_bin_attr_init(&dev->bindata_attr);
952 dev->bindata_attr.attr.name = "bindata";
953 dev->bindata_attr.attr.mode = S_IRUSR | S_IWUSR;
954 dev->bindata_attr.read = txx9_sram_read;
955 dev->bindata_attr.write = txx9_sram_write;
956 dev->bindata_attr.size = size;
957 dev->bindata_attr.private = dev;
958 err = device_register(&dev->dev);
959 if (err)
960 goto exit_put;
961 err = sysfs_create_bin_file(&dev->dev.kobj, &dev->bindata_attr);
962 if (err) {
963 device_unregister(&dev->dev);
964 iounmap(dev->base);
965 kfree(dev);
966 }
967 return;
968 exit_put:
969 put_device(&dev->dev);
970 return;
971 }
972
