1 /*
2  * Based on arch/arm/kernel/process.c
3  *
4  * Original Copyright (C) 1995  Linus Torvalds
5  * Copyright (C) 1996-2000 Russell King - Converted to ARM.
6  * Copyright (C) 2012 ARM Ltd.
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
19  */
20 
21 #include <stdarg.h>
22 
23 #include <linux/compat.h>
24 #include <linux/efi.h>
25 #include <linux/export.h>
26 #include <linux/sched.h>
27 #include <linux/sched/debug.h>
28 #include <linux/sched/task.h>
29 #include <linux/sched/task_stack.h>
30 #include <linux/kernel.h>
31 #include <linux/mm.h>
32 #include <linux/stddef.h>
33 #include <linux/unistd.h>
34 #include <linux/user.h>
35 #include <linux/delay.h>
36 #include <linux/reboot.h>
37 #include <linux/interrupt.h>
38 #include <linux/init.h>
39 #include <linux/cpu.h>
40 #include <linux/elfcore.h>
41 #include <linux/pm.h>
42 #include <linux/tick.h>
43 #include <linux/utsname.h>
44 #include <linux/uaccess.h>
45 #include <linux/random.h>
46 #include <linux/hw_breakpoint.h>
47 #include <linux/personality.h>
48 #include <linux/notifier.h>
49 #include <trace/events/power.h>
50 #include <linux/percpu.h>
51 #include <linux/thread_info.h>
52 
53 #include <asm/alternative.h>
54 #include <asm/compat.h>
55 #include <asm/cacheflush.h>
56 #include <asm/exec.h>
57 #include <asm/fpsimd.h>
58 #include <asm/mmu_context.h>
59 #include <asm/processor.h>
60 #include <asm/stacktrace.h>
61 
62 #ifdef CONFIG_STACKPROTECTOR
63 #include <linux/stackprotector.h>
64 unsigned long __stack_chk_guard __read_mostly;
65 EXPORT_SYMBOL(__stack_chk_guard);
66 #endif
67 
68 /*
69  * Function pointers to optional machine specific functions
70  */
71 void (*pm_power_off)(void);
72 EXPORT_SYMBOL_GPL(pm_power_off);
73 
74 void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd);
75 
76 /*
77  * This is our default idle handler.
78  */
arch_cpu_idle(void)79 void arch_cpu_idle(void)
80 {
81 	/*
82 	 * This should do all the clock switching and wait for interrupt
83 	 * tricks
84 	 */
85 	trace_cpu_idle_rcuidle(1, smp_processor_id());
86 	cpu_do_idle();
87 	local_irq_enable();
88 	trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
89 }
90 
91 #ifdef CONFIG_HOTPLUG_CPU
arch_cpu_idle_dead(void)92 void arch_cpu_idle_dead(void)
93 {
94        cpu_die();
95 }
96 #endif
97 
98 /*
99  * Called by kexec, immediately prior to machine_kexec().
100  *
101  * This must completely disable all secondary CPUs; simply causing those CPUs
102  * to execute e.g. a RAM-based pin loop is not sufficient. This allows the
103  * kexec'd kernel to use any and all RAM as it sees fit, without having to
104  * avoid any code or data used by any SW CPU pin loop. The CPU hotplug
105  * functionality embodied in disable_nonboot_cpus() to achieve this.
106  */
machine_shutdown(void)107 void machine_shutdown(void)
108 {
109 	disable_nonboot_cpus();
110 }
111 
112 /*
113  * Halting simply requires that the secondary CPUs stop performing any
114  * activity (executing tasks, handling interrupts). smp_send_stop()
115  * achieves this.
116  */
machine_halt(void)117 void machine_halt(void)
118 {
119 	local_irq_disable();
120 	smp_send_stop();
121 	while (1);
122 }
123 
124 /*
125  * Power-off simply requires that the secondary CPUs stop performing any
126  * activity (executing tasks, handling interrupts). smp_send_stop()
127  * achieves this. When the system power is turned off, it will take all CPUs
128  * with it.
129  */
machine_power_off(void)130 void machine_power_off(void)
131 {
132 	local_irq_disable();
133 	smp_send_stop();
134 	if (pm_power_off)
135 		pm_power_off();
136 }
137 
138 /*
139  * Restart requires that the secondary CPUs stop performing any activity
140  * while the primary CPU resets the system. Systems with multiple CPUs must
141  * provide a HW restart implementation, to ensure that all CPUs reset at once.
142  * This is required so that any code running after reset on the primary CPU
143  * doesn't have to co-ordinate with other CPUs to ensure they aren't still
144  * executing pre-reset code, and using RAM that the primary CPU's code wishes
145  * to use. Implementing such co-ordination would be essentially impossible.
146  */
machine_restart(char * cmd)147 void machine_restart(char *cmd)
148 {
149 	/* Disable interrupts first */
150 	local_irq_disable();
151 	smp_send_stop();
152 
153 	/*
154 	 * UpdateCapsule() depends on the system being reset via
155 	 * ResetSystem().
156 	 */
157 	if (efi_enabled(EFI_RUNTIME_SERVICES))
158 		efi_reboot(reboot_mode, NULL);
159 
160 	/* Now call the architecture specific reboot code. */
161 	if (arm_pm_restart)
162 		arm_pm_restart(reboot_mode, cmd);
163 	else
164 		do_kernel_restart(cmd);
165 
166 	/*
167 	 * Whoops - the architecture was unable to reboot.
168 	 */
169 	printk("Reboot failed -- System halted\n");
170 	while (1);
171 }
172 
print_pstate(struct pt_regs * regs)173 static void print_pstate(struct pt_regs *regs)
174 {
175 	u64 pstate = regs->pstate;
176 
177 	if (compat_user_mode(regs)) {
178 		printk("pstate: %08llx (%c%c%c%c %c %s %s %c%c%c)\n",
179 			pstate,
180 			pstate & PSR_AA32_N_BIT ? 'N' : 'n',
181 			pstate & PSR_AA32_Z_BIT ? 'Z' : 'z',
182 			pstate & PSR_AA32_C_BIT ? 'C' : 'c',
183 			pstate & PSR_AA32_V_BIT ? 'V' : 'v',
184 			pstate & PSR_AA32_Q_BIT ? 'Q' : 'q',
185 			pstate & PSR_AA32_T_BIT ? "T32" : "A32",
186 			pstate & PSR_AA32_E_BIT ? "BE" : "LE",
187 			pstate & PSR_AA32_A_BIT ? 'A' : 'a',
188 			pstate & PSR_AA32_I_BIT ? 'I' : 'i',
189 			pstate & PSR_AA32_F_BIT ? 'F' : 'f');
190 	} else {
191 		printk("pstate: %08llx (%c%c%c%c %c%c%c%c %cPAN %cUAO)\n",
192 			pstate,
193 			pstate & PSR_N_BIT ? 'N' : 'n',
194 			pstate & PSR_Z_BIT ? 'Z' : 'z',
195 			pstate & PSR_C_BIT ? 'C' : 'c',
196 			pstate & PSR_V_BIT ? 'V' : 'v',
197 			pstate & PSR_D_BIT ? 'D' : 'd',
198 			pstate & PSR_A_BIT ? 'A' : 'a',
199 			pstate & PSR_I_BIT ? 'I' : 'i',
200 			pstate & PSR_F_BIT ? 'F' : 'f',
201 			pstate & PSR_PAN_BIT ? '+' : '-',
202 			pstate & PSR_UAO_BIT ? '+' : '-');
203 	}
204 }
205 
__show_regs(struct pt_regs * regs)206 void __show_regs(struct pt_regs *regs)
207 {
208 	int i, top_reg;
209 	u64 lr, sp;
210 
211 	if (compat_user_mode(regs)) {
212 		lr = regs->compat_lr;
213 		sp = regs->compat_sp;
214 		top_reg = 12;
215 	} else {
216 		lr = regs->regs[30];
217 		sp = regs->sp;
218 		top_reg = 29;
219 	}
220 
221 	show_regs_print_info(KERN_DEFAULT);
222 	print_pstate(regs);
223 
224 	if (!user_mode(regs)) {
225 		printk("pc : %pS\n", (void *)regs->pc);
226 		printk("lr : %pS\n", (void *)lr);
227 	} else {
228 		printk("pc : %016llx\n", regs->pc);
229 		printk("lr : %016llx\n", lr);
230 	}
231 
232 	printk("sp : %016llx\n", sp);
233 
234 	i = top_reg;
235 
236 	while (i >= 0) {
237 		printk("x%-2d: %016llx ", i, regs->regs[i]);
238 		i--;
239 
240 		if (i % 2 == 0) {
241 			pr_cont("x%-2d: %016llx ", i, regs->regs[i]);
242 			i--;
243 		}
244 
245 		pr_cont("\n");
246 	}
247 }
248 
show_regs(struct pt_regs * regs)249 void show_regs(struct pt_regs * regs)
250 {
251 	__show_regs(regs);
252 	dump_backtrace(regs, NULL);
253 }
254 
tls_thread_flush(void)255 static void tls_thread_flush(void)
256 {
257 	write_sysreg(0, tpidr_el0);
258 
259 	if (is_compat_task()) {
260 		current->thread.uw.tp_value = 0;
261 
262 		/*
263 		 * We need to ensure ordering between the shadow state and the
264 		 * hardware state, so that we don't corrupt the hardware state
265 		 * with a stale shadow state during context switch.
266 		 */
267 		barrier();
268 		write_sysreg(0, tpidrro_el0);
269 	}
270 }
271 
flush_thread(void)272 void flush_thread(void)
273 {
274 	fpsimd_flush_thread();
275 	tls_thread_flush();
276 	flush_ptrace_hw_breakpoint(current);
277 }
278 
release_thread(struct task_struct * dead_task)279 void release_thread(struct task_struct *dead_task)
280 {
281 }
282 
arch_release_task_struct(struct task_struct * tsk)283 void arch_release_task_struct(struct task_struct *tsk)
284 {
285 	fpsimd_release_task(tsk);
286 }
287 
288 /*
289  * src and dst may temporarily have aliased sve_state after task_struct
290  * is copied.  We cannot fix this properly here, because src may have
291  * live SVE state and dst's thread_info may not exist yet, so tweaking
292  * either src's or dst's TIF_SVE is not safe.
293  *
294  * The unaliasing is done in copy_thread() instead.  This works because
295  * dst is not schedulable or traceable until both of these functions
296  * have been called.
297  */
arch_dup_task_struct(struct task_struct * dst,struct task_struct * src)298 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
299 {
300 	if (current->mm)
301 		fpsimd_preserve_current_state();
302 	*dst = *src;
303 
304 	return 0;
305 }
306 
307 asmlinkage void ret_from_fork(void) asm("ret_from_fork");
308 
copy_thread(unsigned long clone_flags,unsigned long stack_start,unsigned long stk_sz,struct task_struct * p)309 int copy_thread(unsigned long clone_flags, unsigned long stack_start,
310 		unsigned long stk_sz, struct task_struct *p)
311 {
312 	struct pt_regs *childregs = task_pt_regs(p);
313 
314 	memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context));
315 
316 	/*
317 	 * Unalias p->thread.sve_state (if any) from the parent task
318 	 * and disable discard SVE state for p:
319 	 */
320 	clear_tsk_thread_flag(p, TIF_SVE);
321 	p->thread.sve_state = NULL;
322 
323 	/*
324 	 * In case p was allocated the same task_struct pointer as some
325 	 * other recently-exited task, make sure p is disassociated from
326 	 * any cpu that may have run that now-exited task recently.
327 	 * Otherwise we could erroneously skip reloading the FPSIMD
328 	 * registers for p.
329 	 */
330 	fpsimd_flush_task_state(p);
331 
332 	if (likely(!(p->flags & PF_KTHREAD))) {
333 		*childregs = *current_pt_regs();
334 		childregs->regs[0] = 0;
335 
336 		/*
337 		 * Read the current TLS pointer from tpidr_el0 as it may be
338 		 * out-of-sync with the saved value.
339 		 */
340 		*task_user_tls(p) = read_sysreg(tpidr_el0);
341 
342 		if (stack_start) {
343 			if (is_compat_thread(task_thread_info(p)))
344 				childregs->compat_sp = stack_start;
345 			else
346 				childregs->sp = stack_start;
347 		}
348 
349 		/*
350 		 * If a TLS pointer was passed to clone (4th argument), use it
351 		 * for the new thread.
352 		 */
353 		if (clone_flags & CLONE_SETTLS)
354 			p->thread.uw.tp_value = childregs->regs[3];
355 	} else {
356 		memset(childregs, 0, sizeof(struct pt_regs));
357 		childregs->pstate = PSR_MODE_EL1h;
358 		if (IS_ENABLED(CONFIG_ARM64_UAO) &&
359 		    cpus_have_const_cap(ARM64_HAS_UAO))
360 			childregs->pstate |= PSR_UAO_BIT;
361 		p->thread.cpu_context.x19 = stack_start;
362 		p->thread.cpu_context.x20 = stk_sz;
363 	}
364 	p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
365 	p->thread.cpu_context.sp = (unsigned long)childregs;
366 
367 	ptrace_hw_copy_thread(p);
368 
369 	return 0;
370 }
371 
tls_preserve_current_state(void)372 void tls_preserve_current_state(void)
373 {
374 	*task_user_tls(current) = read_sysreg(tpidr_el0);
375 }
376 
tls_thread_switch(struct task_struct * next)377 static void tls_thread_switch(struct task_struct *next)
378 {
379 	tls_preserve_current_state();
380 
381 	if (is_compat_thread(task_thread_info(next)))
382 		write_sysreg(next->thread.uw.tp_value, tpidrro_el0);
383 	else if (!arm64_kernel_unmapped_at_el0())
384 		write_sysreg(0, tpidrro_el0);
385 
386 	write_sysreg(*task_user_tls(next), tpidr_el0);
387 }
388 
389 /* Restore the UAO state depending on next's addr_limit */
uao_thread_switch(struct task_struct * next)390 void uao_thread_switch(struct task_struct *next)
391 {
392 	if (IS_ENABLED(CONFIG_ARM64_UAO)) {
393 		if (task_thread_info(next)->addr_limit == KERNEL_DS)
394 			asm(ALTERNATIVE("nop", SET_PSTATE_UAO(1), ARM64_HAS_UAO));
395 		else
396 			asm(ALTERNATIVE("nop", SET_PSTATE_UAO(0), ARM64_HAS_UAO));
397 	}
398 }
399 
400 /*
401  * We store our current task in sp_el0, which is clobbered by userspace. Keep a
402  * shadow copy so that we can restore this upon entry from userspace.
403  *
404  * This is *only* for exception entry from EL0, and is not valid until we
405  * __switch_to() a user task.
406  */
407 DEFINE_PER_CPU(struct task_struct *, __entry_task);
408 
entry_task_switch(struct task_struct * next)409 static void entry_task_switch(struct task_struct *next)
410 {
411 	__this_cpu_write(__entry_task, next);
412 }
413 
414 /*
415  * Thread switching.
416  */
__switch_to(struct task_struct * prev,struct task_struct * next)417 __notrace_funcgraph struct task_struct *__switch_to(struct task_struct *prev,
418 				struct task_struct *next)
419 {
420 	struct task_struct *last;
421 
422 	fpsimd_thread_switch(next);
423 	tls_thread_switch(next);
424 	hw_breakpoint_thread_switch(next);
425 	contextidr_thread_switch(next);
426 	entry_task_switch(next);
427 	uao_thread_switch(next);
428 
429 	/*
430 	 * Complete any pending TLB or cache maintenance on this CPU in case
431 	 * the thread migrates to a different CPU.
432 	 * This full barrier is also required by the membarrier system
433 	 * call.
434 	 */
435 	dsb(ish);
436 
437 	/* the actual thread switch */
438 	last = cpu_switch_to(prev, next);
439 
440 	return last;
441 }
442 
get_wchan(struct task_struct * p)443 unsigned long get_wchan(struct task_struct *p)
444 {
445 	struct stackframe frame;
446 	unsigned long stack_page, ret = 0;
447 	int count = 0;
448 	if (!p || p == current || p->state == TASK_RUNNING)
449 		return 0;
450 
451 	stack_page = (unsigned long)try_get_task_stack(p);
452 	if (!stack_page)
453 		return 0;
454 
455 	frame.fp = thread_saved_fp(p);
456 	frame.pc = thread_saved_pc(p);
457 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
458 	frame.graph = p->curr_ret_stack;
459 #endif
460 	do {
461 		if (unwind_frame(p, &frame))
462 			goto out;
463 		if (!in_sched_functions(frame.pc)) {
464 			ret = frame.pc;
465 			goto out;
466 		}
467 	} while (count ++ < 16);
468 
469 out:
470 	put_task_stack(p);
471 	return ret;
472 }
473 
arch_align_stack(unsigned long sp)474 unsigned long arch_align_stack(unsigned long sp)
475 {
476 	if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
477 		sp -= get_random_int() & ~PAGE_MASK;
478 	return sp & ~0xf;
479 }
480 
arch_randomize_brk(struct mm_struct * mm)481 unsigned long arch_randomize_brk(struct mm_struct *mm)
482 {
483 	if (is_compat_task())
484 		return randomize_page(mm->brk, SZ_32M);
485 	else
486 		return randomize_page(mm->brk, SZ_1G);
487 }
488 
489 /*
490  * Called from setup_new_exec() after (COMPAT_)SET_PERSONALITY.
491  */
arch_setup_new_exec(void)492 void arch_setup_new_exec(void)
493 {
494 	current->mm->context.flags = is_compat_task() ? MMCF_AARCH32 : 0;
495 }
496 
497 #ifdef CONFIG_GCC_PLUGIN_STACKLEAK
stackleak_check_alloca(unsigned long size)498 void __used stackleak_check_alloca(unsigned long size)
499 {
500 	unsigned long stack_left;
501 	unsigned long current_sp = current_stack_pointer;
502 	struct stack_info info;
503 
504 	BUG_ON(!on_accessible_stack(current, current_sp, &info));
505 
506 	stack_left = current_sp - info.low;
507 
508 	/*
509 	 * There's a good chance we're almost out of stack space if this
510 	 * is true. Using panic() over BUG() is more likely to give
511 	 * reliable debugging output.
512 	 */
513 	if (size >= stack_left)
514 		panic("alloca() over the kernel stack boundary\n");
515 }
516 EXPORT_SYMBOL(stackleak_check_alloca);
517 #endif
518