Searched refs:target_itr (Results 1 – 8 of 8) sorted by relevance
482 itr = rc->target_itr; in iavf_update_itr()496 (q_vector->tx.target_itr & IAVF_ITR_ADAPTIVE_LATENCY)) { in iavf_update_itr()506 if (rc->target_itr == IAVF_ITR_ADAPTIVE_MAX_USECS && in iavf_update_itr()507 (q_vector->rx.target_itr & IAVF_ITR_MASK) == in iavf_update_itr()514 rc->target_itr &= ~IAVF_ITR_ADAPTIVE_LATENCY; in iavf_update_itr()526 itr = rc->target_itr + IAVF_ITR_ADAPTIVE_MIN_INC; in iavf_update_itr()633 rc->target_itr = itr; in iavf_update_itr()1683 if (q_vector->rx.target_itr < q_vector->rx.current_itr) { in iavf_update_enable_itr()1686 q_vector->rx.target_itr); in iavf_update_enable_itr()1687 q_vector->rx.current_itr = q_vector->rx.target_itr; in iavf_update_enable_itr()[all …]
424 u16 target_itr; /* target ITR setting for ring(s) */ member
482 q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting); in iavf_map_vector_to_rxq()486 q_vector->rx.current_itr = q_vector->rx.target_itr; in iavf_map_vector_to_rxq()508 q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting); in iavf_map_vector_to_txq()511 q_vector->tx.target_itr >> 1); in iavf_map_vector_to_txq()512 q_vector->tx.current_itr = q_vector->tx.target_itr; in iavf_map_vector_to_txq()
806 q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting); in iavf_set_itr_per_queue()809 q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting); in iavf_set_itr_per_queue()
1197 itr = rc->target_itr; in i40e_update_itr()1211 (q_vector->tx.target_itr & I40E_ITR_ADAPTIVE_LATENCY)) { in i40e_update_itr()1221 if (rc->target_itr == I40E_ITR_ADAPTIVE_MAX_USECS && in i40e_update_itr()1222 (q_vector->rx.target_itr & I40E_ITR_MASK) == in i40e_update_itr()1229 rc->target_itr &= ~I40E_ITR_ADAPTIVE_LATENCY; in i40e_update_itr()1241 itr = rc->target_itr + I40E_ITR_ADAPTIVE_MIN_INC; in i40e_update_itr()1347 rc->target_itr = itr; in i40e_update_itr()2720 if (q_vector->rx.target_itr < q_vector->rx.current_itr) { in i40e_update_enable_itr()2723 q_vector->rx.target_itr); in i40e_update_enable_itr()2724 q_vector->rx.current_itr = q_vector->rx.target_itr; in i40e_update_enable_itr()[all …]
439 u16 target_itr; /* target ITR setting for ring(s) */ member
3874 q_vector->rx.target_itr = in i40e_vsi_configure_msix()3877 q_vector->rx.target_itr >> 1); in i40e_vsi_configure_msix()3878 q_vector->rx.current_itr = q_vector->rx.target_itr; in i40e_vsi_configure_msix()3881 q_vector->tx.target_itr = in i40e_vsi_configure_msix()3884 q_vector->tx.target_itr >> 1); in i40e_vsi_configure_msix()3885 q_vector->tx.current_itr = q_vector->tx.target_itr; in i40e_vsi_configure_msix()3988 q_vector->rx.target_itr = ITR_TO_REG(vsi->rx_rings[0]->itr_setting); in i40e_configure_msi_and_legacy()3989 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.target_itr >> 1); in i40e_configure_msi_and_legacy()3990 q_vector->rx.current_itr = q_vector->rx.target_itr; in i40e_configure_msi_and_legacy()3992 q_vector->tx.target_itr = ITR_TO_REG(vsi->tx_rings[0]->itr_setting); in i40e_configure_msi_and_legacy()[all …]
2987 q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting); in i40e_set_itr_per_queue()2990 q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting); in i40e_set_itr_per_queue()
