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/Linux-v6.6/drivers/gpu/drm/msm/
Dmsm_gem_shrinker.c111 } stages[] = { in msm_gem_shrinker_scan() local
122 for (unsigned i = 0; (nr > 0) && (i < ARRAY_SIZE(stages)); i++) { in msm_gem_shrinker_scan()
123 if (!stages[i].cond) in msm_gem_shrinker_scan()
125 stages[i].freed = in msm_gem_shrinker_scan()
126 drm_gem_lru_scan(stages[i].lru, nr, in msm_gem_shrinker_scan()
127 &stages[i].remaining, in msm_gem_shrinker_scan()
128 stages[i].shrink); in msm_gem_shrinker_scan()
129 nr -= stages[i].freed; in msm_gem_shrinker_scan()
130 freed += stages[i].freed; in msm_gem_shrinker_scan()
131 remaining += stages[i].remaining; in msm_gem_shrinker_scan()
[all …]
/Linux-v6.6/drivers/staging/media/atomisp/pci/runtime/pipeline/src/
Dpipeline.c246 s = pipeline->stages; in ia_css_pipeline_clean()
282 last = pipeline->stages; in ia_css_pipeline_create_and_add_stage()
324 pipeline->stages = new_stage; in ia_css_pipeline_create_and_add_stage()
342 for (stage = pipeline->stages; stage; stage = stage->next) { in ia_css_pipeline_finalize_stages()
362 for (s = pipeline->stages; s; s = s->next) { in ia_css_pipeline_get_stage()
381 for (s = pipeline->stages; s; s = s->next) { in ia_css_pipeline_get_stage_from_fw()
401 for (s = pipeline->stages; s; s = s->next) { in ia_css_pipeline_get_fw_from_stage()
424 for (s = pipeline->stages; s; s = s->next) { in ia_css_pipeline_get_output_stage()
676 pipeline->stages = NULL; in pipeline_init_defaults()
/Linux-v6.6/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_ctl.c60 int stages = -EINVAL; in _mixer_stages() local
64 stages = mixer[i].sblk->maxblendstages; in _mixer_stages()
69 return stages; in _mixer_stages()
450 int stages; in dpu_hw_ctl_setup_blendstage() local
453 stages = _mixer_stages(ctx->mixer_hw_caps, ctx->mixer_count, lm); in dpu_hw_ctl_setup_blendstage()
454 if (stages < 0) in dpu_hw_ctl_setup_blendstage()
468 for (i = 0; i <= stages; i++) { in dpu_hw_ctl_setup_blendstage()
/Linux-v6.6/Documentation/ABI/testing/
Dsysfs-bus-iio-health-afe440x6 Get measured values from the ADC for these stages. Y is the
30 stages. The values are expressed in 5-bit sign-magnitude.
Dsysfs-bus-platform-devices-ampere-smpro282 (RO) Contains the boot stages information in hex as format below::
288 - ``AA`` : The boot stages
308 - ``CCCCCCCC``: Boot status information defined for each boot stages
/Linux-v6.6/Documentation/devicetree/bindings/sound/
Dti,tas5086.txt28 stages connected to the PWM output pins work. Not all
29 power stages are compatible to Mid-Z - please refer
/Linux-v6.6/tools/testing/selftests/tc-testing/
DREADME79 A test case has four stages:
86 The setup and teardown stages can run zero or more commands. The setup
89 can be run next. These two stages require any commands run to return
92 The execute and verify stages each run one command. The execute stage
201 adjust-command (runs in all stages and receives the stage name)
213 The stages are identified by the following strings:
/Linux-v6.6/Documentation/arch/arm/sa1100/
Dlart.rst11 is under development, with plenty of others in different stages of
/Linux-v6.6/Documentation/leds/
Dleds-sc27xx.rst11 LED controller, it only supports 4 stages to make a single
/Linux-v6.6/drivers/staging/media/atomisp/pci/runtime/pipeline/interface/
Dia_css_pipeline.h47 struct ia_css_pipeline_stage *stages; member
/Linux-v6.6/Documentation/devicetree/bindings/firmware/
Dnvidia,tegra210-bpmp.txt4 in Tegra210 SoC. It is designed to handle the early stages of the boot
/Linux-v6.6/tools/testing/selftests/resctrl/
DREADME59 A test case has four stages:
/Linux-v6.6/drivers/staging/media/atomisp/pci/
Dsh_css_sp.c1220 if (!me->stages) { in sh_css_sp_init_pipeline()
1226 first_binary = me->stages->binary; in sh_css_sp_init_pipeline()
1244 for (stage = me->stages, num = 0; stage; stage = stage->next, num++) { in sh_css_sp_init_pipeline()
1258 me->stages->sp_func == IA_CSS_PIPELINE_ISYS_COPY) in sh_css_sp_init_pipeline()
1317 for (stage = me->stages, num = 0; stage; stage = stage->next, num++) { in sh_css_sp_init_pipeline()
Dsh_css.c490 if (pipe->pipeline.stages) in sh_css_config_input_network()
491 binary = pipe->pipeline.stages->binary; in sh_css_config_input_network()
1007 if (pipe->pipeline.stages) in sh_css_config_input_network()
1008 if (pipe->pipeline.stages->binary) in sh_css_config_input_network()
1009 binary = pipe->pipeline.stages->binary; in sh_css_config_input_network()
1283 stage = me->pipeline.stages; in start_pipe()
3260 in_frame = me->stages->args.out_frame[0]; in create_host_video_pipeline()
3430 in_frame = me->stages->args.out_frame[0]; in create_host_preview_pipeline()
3725 for (stage = pipeline->stages; stage; stage = stage->next) { in ia_css_pipe_enqueue_buffer()
7504 for (stage = me->stages; stage; stage = stage->next) in ia_css_pipeline_uses_params()
/Linux-v6.6/Documentation/fb/
Ddeferred_io.rst31 the final image rather than the intermediate stages which is why it's okay
/Linux-v6.6/drivers/gpu/drm/msm/disp/mdp4/
Dmdp4_crtc.c158 static const enum mdp_mixer_stage_id stages[] = { in setup_mixer() enum
170 pipe_id, stages[idx]); in setup_mixer()
/Linux-v6.6/Documentation/devicetree/bindings/clock/
Dlpc1850-cgu.txt12 stages. Each output stage provides an independent clock source and
/Linux-v6.6/tools/testing/selftests/tc-testing/creating-plugins/
DAddingPlugins.txt75 The stages are represented by the following strings:
/Linux-v6.6/arch/mips/
DKconfig.debug144 debug information from the early stages of core startup.
/Linux-v6.6/Documentation/arch/arm64/
Dtagged-address-abi.rst43 The AArch64 Tagged Address ABI has two stages of relaxation depending on
/Linux-v6.6/arch/powerpc/platforms/ps3/
DKconfig105 in the repository for later boot stages.
/Linux-v6.6/arch/m68k/q40/
DREADME54 went wrong during earliest setup stages of head.S.
/Linux-v6.6/Documentation/userspace-api/media/dvb/
Dfrontend-property-terrestrial-systems.rst54 DVB-T2 support is currently in the early stages of development, so
/Linux-v6.6/Documentation/virt/coco/
Dsev-guest.rst151 has taken care to make use of the SEV-SNP CPUID throughout all stages of boot.
/Linux-v6.6/Documentation/admin-guide/media/
Dipu3.rst445 IPU3 pipeline has a number of image processing stages, each of which takes a
446 set of parameters as input. The major stages of pipelines are shown here:
577 A few stages of the pipeline will be executed by firmware running on the ISP

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