Home
last modified time | relevance | path

Searched refs:sdhci_writew (Results 1 – 25 of 25) sorted by relevance

/Linux-v6.6/drivers/mmc/host/
Dsdhci-milbeaut.c94 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset()
99 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset()
193 sdhci_writew(host, ctl, F_SDH30_AHB_CONFIG); in sdhci_milbeaut_vendor_init()
220 sdhci_writew(host, ctl, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_init()
Dsdhci-pci-arasan.c111 sdhci_writew(host, data, PHY_DAT_REG); in arasan_phy_write()
112 sdhci_writew(host, (PHY_WRITE | offset), PHY_ADDR_REG); in arasan_phy_write()
120 sdhci_writew(host, 0, PHY_DAT_REG); in arasan_phy_read()
121 sdhci_writew(host, offset, PHY_ADDR_REG); in arasan_phy_read()
Dsdhci-pci-gli.c324 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in gli_set_9750()
344 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in gli_set_9750()
519 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_gl9750_set_clock()
702 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_gl9755_set_clock()
893 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_gl9767_set_clock()
1007 sdhci_writew(host, value, SDHCI_CLOCK_CONTROL); in gl9767_init_sd_express()
1041 sdhci_writew(host, value, SDHCI_CLOCK_CONTROL); in gl9767_init_sd_express()
1178 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_set_gl9763e_signaling()
1200 sdhci_writew(host, GLI_9763E_CQE_TRNS_MODE, SDHCI_TRANSFER_MODE); in sdhci_gl9763e_cqe_enable()
1226 sdhci_writew(host, 0x0, SDHCI_TRANSFER_MODE); in sdhci_gl9763e_cqe_post_disable()
[all …]
Dsdhci-pci-o2micro.c207 sdhci_writew(host, reg, O2_SD_VENDOR_SETTING); in sdhci_o2_set_tuning_mode()
340 sdhci_writew(host, scratch, O2_SD_MISC_CTRL); in sdhci_o2_execute_tuning()
352 sdhci_writew(host, reg_val, SDHCI_CLOCK_CONTROL); in sdhci_o2_execute_tuning()
376 sdhci_writew(host, reg_val, SDHCI_CLOCK_CONTROL); in sdhci_o2_execute_tuning()
422 sdhci_writew(host, scratch, O2_SD_MISC_CTRL); in sdhci_o2_execute_tuning()
569 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_o2_enable_clk()
574 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_o2_enable_clk()
589 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_pci_o2_set_clock()
672 sdhci_writew(host, scratch16, O2_SD_PCIE_SWITCH); in sdhci_pci_o2_init_sd_express()
Dsdhci-sprd.c181 sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_off()
190 sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_on()
236 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in _sdhci_sprd_set_clock()
292 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_sprd_set_clock()
371 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_sprd_set_uhs_signaling()
538 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_sprd_hs400_enhanced_strobe()
Dsdhci.c135 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in sdhci_do_enable_v4_mode()
345 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in sdhci_config_dma()
1097 sdhci_writew(host, in sdhci_set_block_info()
1107 sdhci_writew(host, 0, SDHCI_BLOCK_COUNT); in sdhci_set_block_info()
1108 sdhci_writew(host, data->blocks, SDHCI_32BIT_BLK_CNT); in sdhci_set_block_info()
1110 sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT); in sdhci_set_block_info()
1435 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in sdhci_auto_cmd_select()
1461 sdhci_writew(host, 0x0, SDHCI_TRANSFER_MODE); in sdhci_set_transfer_mode()
1465 sdhci_writew(host, mode & ~(SDHCI_TRNS_AUTO_CMD12 | in sdhci_set_transfer_mode()
1488 sdhci_writew(host, mode, SDHCI_TRANSFER_MODE); in sdhci_set_transfer_mode()
[all …]
Dsdhci-of-at91.c78 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
86 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
97 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
Dsdhci_f_sdh30.c78 sdhci_writew(host, 0xBC01, SDHCI_CLOCK_CONTROL); in sdhci_f_sdh30_reset()
177 sdhci_writew(host, ctrl, F_SDH30_AHB_CONFIG); in sdhci_f_sdh30_probe()
Dsdhci-of-dwcmshc.c187 sdhci_writew(host, ctrl, priv->vendor_specific_area1 + DWCMSHC_EMMC_CONTROL); in dwcmshc_set_uhs_signaling()
192 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in dwcmshc_set_uhs_signaling()
683 sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); in dwcmshc_enable_card_clk()
694 sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); in dwcmshc_disable_card_clk()
Dsdhci-s3c.c379 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
388 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
398 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
414 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
Dsdhci-pci-dwc-mshc.c70 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_snps_set_clock()
Dsdhci-pxav2.c146 sdhci_writew(host, 0, SDHCI_TRANSFER_MODE); in pxav1_request_done()
147 sdhci_writew(host, SDHCI_MAKE_CMD(MMC_GO_IDLE_STATE, SDHCI_CMD_RESP_NONE), in pxav1_request_done()
Dsdhci-brcmstb.c89 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_brcmstb_set_clock()
123 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_brcmstb_set_uhs_signaling()
Dsdhci-xenon.c219 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in xenon_set_uhs_signaling()
299 sdhci_writew(host, reg, SDHCI_HOST_CONTROL2); in xenon_set_ios()
Dsdhci.h683 static inline void sdhci_writew(struct sdhci_host *host, u16 val, int reg) in sdhci_writew() function
730 static inline void sdhci_writew(struct sdhci_host *host, u16 val, int reg) in sdhci_writew() function
Dsdhci-xenon-phy.c611 sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL); in xenon_emmc_phy_set()
635 sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL); in xenon_emmc_phy_set()
Dsdhci-acpi.c552 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_set_ios()
556 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_set_ios()
Dsdhci-tegra.c267 sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL); in tegra_sdhci_configure_card_clk()
1202 sdhci_writew(host, SDHCI_TEGRA_CQE_TRNS_MODE, SDHCI_TRANSFER_MODE); in tegra_cqhci_writel()
1252 sdhci_writew(host, SDHCI_TEGRA_CQE_TRNS_MODE, SDHCI_TRANSFER_MODE); in sdhci_tegra_cqe_enable()
1335 sdhci_writew(host, 0x0, SDHCI_TRANSFER_MODE); in sdhci_tegra_cqe_post_disable()
Dsdhci-of-arasan.c413 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_arasan_set_clock()
418 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_arasan_set_clock()
1090 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in arasan_zynqmp_dll_reset()
Dsdhci-st.c304 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_st_set_uhs_signaling()
Dsdhci-of-aspeed.c249 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in aspeed_sdhci_set_clock()
Dsdhci-pxav3.c292 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in pxav3_set_uhs_signaling()
Dsdhci-msm.c1387 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_msm_set_uhs_signaling()
1770 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in __sdhci_msm_set_clock()
2231 sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); in sdhci_msm_start_signal_voltage_switch()
Dsdhci-pci-core.c1639 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_tuning_reset()
1643 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_tuning_reset()
Dsdhci-esdhc-imx.c1564 sdhci_writew(host, mode, SDHCI_TRANSFER_MODE); in esdhc_cqe_enable()