| /Linux-v6.6/drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v6_0.c | 2971 … amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) in gfx_v6_0_read_wave_data() argument
2974 dst[(*no_fields)++] = 0; in gfx_v6_0_read_wave_data()
2975 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v6_0_read_wave_data()
2976 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v6_0_read_wave_data()
2977 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v6_0_read_wave_data()
2978 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v6_0_read_wave_data()
2979 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v6_0_read_wave_data()
2980 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID); in gfx_v6_0_read_wave_data()
2981 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0); in gfx_v6_0_read_wave_data()
2982 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW1); in gfx_v6_0_read_wave_data()
[all …]
|
| D | gfx_v7_0.c | 4112 … amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) in gfx_v7_0_read_wave_data() argument
4115 dst[(*no_fields)++] = 0; in gfx_v7_0_read_wave_data()
4116 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v7_0_read_wave_data()
4117 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v7_0_read_wave_data()
4118 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v7_0_read_wave_data()
4119 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v7_0_read_wave_data()
4120 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v7_0_read_wave_data()
4121 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID); in gfx_v7_0_read_wave_data()
4122 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0); in gfx_v7_0_read_wave_data()
4123 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW1); in gfx_v7_0_read_wave_data()
[all …]
|
| D | gfx_v9_4_3.c | 577 uint32_t *dst, int *no_fields) in gfx_v9_4_3_read_wave_data() argument
580 dst[(*no_fields)++] = 1; in gfx_v9_4_3_read_wave_data()
581 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_STATUS); in gfx_v9_4_3_read_wave_data()
582 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v9_4_3_read_wave_data()
583 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v9_4_3_read_wave_data()
584 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v9_4_3_read_wave_data()
585 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v9_4_3_read_wave_data()
586 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_HW_ID); in gfx_v9_4_3_read_wave_data()
587 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_INST_DW0); in gfx_v9_4_3_read_wave_data()
588 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_INST_DW1); in gfx_v9_4_3_read_wave_data()
[all …]
|
| D | gfx_v8_0.c | 5218 … amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) in gfx_v8_0_read_wave_data() argument
5221 dst[(*no_fields)++] = 0; in gfx_v8_0_read_wave_data()
5222 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v8_0_read_wave_data()
5223 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v8_0_read_wave_data()
5224 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v8_0_read_wave_data()
5225 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v8_0_read_wave_data()
5226 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v8_0_read_wave_data()
5227 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID); in gfx_v8_0_read_wave_data()
5228 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0); in gfx_v8_0_read_wave_data()
5229 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW1); in gfx_v8_0_read_wave_data()
[all …]
|
| D | gfx_v11_0.c | 772 … amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) in gfx_v11_0_read_wave_data() argument
780 dst[(*no_fields)++] = 3; in gfx_v11_0_read_wave_data()
781 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_STATUS); in gfx_v11_0_read_wave_data()
782 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_LO); in gfx_v11_0_read_wave_data()
783 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_HI); in gfx_v11_0_read_wave_data()
784 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_LO); in gfx_v11_0_read_wave_data()
785 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_HI); in gfx_v11_0_read_wave_data()
786 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_HW_ID1); in gfx_v11_0_read_wave_data()
787 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_HW_ID2); in gfx_v11_0_read_wave_data()
788 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_GPR_ALLOC); in gfx_v11_0_read_wave_data()
[all …]
|
| D | gfx_v9_0.c | 1767 … amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) in gfx_v9_0_read_wave_data() argument
1770 dst[(*no_fields)++] = 1; in gfx_v9_0_read_wave_data()
1771 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v9_0_read_wave_data()
1772 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v9_0_read_wave_data()
1773 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v9_0_read_wave_data()
1774 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v9_0_read_wave_data()
1775 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v9_0_read_wave_data()
1776 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID); in gfx_v9_0_read_wave_data()
1777 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0); in gfx_v9_0_read_wave_data()
1778 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW1); in gfx_v9_0_read_wave_data()
[all …]
|
| D | gfx_v10_0.c | 4275 … amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) in gfx_v10_0_read_wave_data() argument
4284 dst[(*no_fields)++] = 2; in gfx_v10_0_read_wave_data()
4285 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_STATUS); in gfx_v10_0_read_wave_data()
4286 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_LO); in gfx_v10_0_read_wave_data()
4287 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_HI); in gfx_v10_0_read_wave_data()
4288 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_LO); in gfx_v10_0_read_wave_data()
4289 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_HI); in gfx_v10_0_read_wave_data()
4290 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_HW_ID1); in gfx_v10_0_read_wave_data()
4291 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_HW_ID2); in gfx_v10_0_read_wave_data()
4292 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_INST_DW0); in gfx_v10_0_read_wave_data()
[all …]
|
| D | amdgpu_gfx.h | 288 uint32_t wave, uint32_t *dst, int *no_fields);
|
