Searched refs:hw_ctl (Results 1 – 5 of 5) sorted by relevance
190 ctl = phys_enc->hw_ctl; in dpu_encoder_phys_wb_setup_cdp()193 (phys_enc->hw_ctl && in dpu_encoder_phys_wb_setup_cdp()194 phys_enc->hw_ctl->ops.setup_intf_cfg)) { in dpu_encoder_phys_wb_setup_cdp()216 phys_enc->hw_ctl->ops.setup_intf_cfg(phys_enc->hw_ctl, &intf_cfg); in dpu_encoder_phys_wb_setup_cdp()217 } else if (phys_enc->hw_ctl && phys_enc->hw_ctl->ops.setup_intf_cfg) { in dpu_encoder_phys_wb_setup_cdp()224 phys_enc->hw_ctl->ops.setup_intf_cfg(phys_enc->hw_ctl, &intf_cfg); in dpu_encoder_phys_wb_setup_cdp()288 struct dpu_hw_ctl *hw_ctl; in _dpu_encoder_phys_wb_update_flush() local297 hw_ctl = phys_enc->hw_ctl; in _dpu_encoder_phys_wb_update_flush()301 if (!hw_ctl) { in _dpu_encoder_phys_wb_update_flush()306 if (hw_ctl->ops.update_pending_flush_wb) in _dpu_encoder_phys_wb_update_flush()[all …]
242 if (!phys_enc->hw_ctl->ops.setup_intf_cfg) { in dpu_encoder_phys_vid_setup_timing_engine()284 phys_enc->hw_ctl->ops.setup_intf_cfg(phys_enc->hw_ctl, &intf_cfg); in dpu_encoder_phys_vid_setup_timing_engine()303 struct dpu_hw_ctl *hw_ctl; in dpu_encoder_phys_vid_vblank_irq() local307 hw_ctl = phys_enc->hw_ctl; in dpu_encoder_phys_vid_vblank_irq()321 if (hw_ctl->ops.get_flush_register) in dpu_encoder_phys_vid_vblank_irq()322 flush_register = hw_ctl->ops.get_flush_register(hw_ctl); in dpu_encoder_phys_vid_vblank_irq()324 if (!(flush_register & hw_ctl->ops.get_pending_flush(hw_ctl))) in dpu_encoder_phys_vid_vblank_irq()405 ctl = phys_enc->hw_ctl; in dpu_encoder_phys_vid_enable()477 struct dpu_hw_ctl *hw_ctl = phys_enc->hw_ctl; in dpu_encoder_phys_vid_wait_for_commit_done() local480 if (!hw_ctl) in dpu_encoder_phys_vid_wait_for_commit_done()[all …]
1044 struct dpu_hw_blk *hw_ctl[MAX_CHANNELS_PER_ENC]; in dpu_encoder_virt_atomic_mode_set() local1076 drm_enc->base.id, DPU_HW_BLK_CTL, hw_ctl, ARRAY_SIZE(hw_ctl)); in dpu_encoder_virt_atomic_mode_set()1103 cstate->mixers[i].lm_ctl = to_dpu_hw_ctl(hw_ctl[ctl_idx]); in dpu_encoder_virt_atomic_mode_set()1120 if (!hw_ctl[i]) { in dpu_encoder_virt_atomic_mode_set()1127 phys->hw_ctl = to_dpu_hw_ctl(hw_ctl[i]); in dpu_encoder_virt_atomic_mode_set()1483 ctl = phys->hw_ctl; in _dpu_encoder_trigger_flush()1531 ctl = phys_enc->hw_ctl; in dpu_encoder_helper_trigger_start()1571 ctl = phys_enc->hw_ctl; in dpu_encoder_helper_hw_reset()1616 ctl = phys->hw_ctl; in _dpu_encoder_kickoff_phys()1664 ctl = phys->hw_ctl; in dpu_encoder_trigger_kickoff_pending()[all …]
55 ctl = phys_enc->hw_ctl; in _dpu_encoder_phys_cmd_update_intf_cfg()154 phys_enc->irq[INTR_IDX_CTL_START] = phys_enc->hw_ctl->caps->intr_start; in dpu_encoder_phys_cmd_atomic_mode_set()199 phys_enc->hw_ctl->idx - CTL_0, in _dpu_encoder_phys_cmd_handle_ppdone_timeout()415 if (!phys_enc->hw_pp || !phys_enc->hw_ctl->ops.setup_intf_cfg) { in _dpu_encoder_phys_cmd_pingpong_config()455 ctl = phys_enc->hw_ctl; in dpu_encoder_phys_cmd_enable_helper()563 ctl = phys_enc->hw_ctl; in dpu_encoder_phys_cmd_disable()687 if (phys_enc->hw_ctl->ops.is_started(phys_enc->hw_ctl)) in dpu_encoder_phys_cmd_wait_for_commit_done()
180 struct dpu_hw_ctl *hw_ctl; member
