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Searched refs:bADClkPhase (Results 1 – 3 of 3) sorted by relevance

/Linux-v6.6/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_phyreg.h321 #define bADClkPhase 0x4000000 macro
/Linux-v6.6/drivers/staging/rtl8712/
Drtl871x_mp_phy_regdef.h523 #define bADClkPhase 0x4000000 macro
/Linux-v6.6/drivers/staging/rtl8723bs/include/
DHal8192CPhyReg.h614 #define bADClkPhase 0x4000000 /* Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40… macro