Searched refs:XUSBIO_PLL_CFG0_PADPLL_RESET_SWCTL (Results 1 – 2 of 2) sorted by relevance
104 #define XUSBIO_PLL_CFG0_PADPLL_RESET_SWCTL BIT(0) macro1694 XUSBIO_PLL_CFG0_PADPLL_RESET_SWCTL); in clk_plle_tegra114_enable()
191 #define XUSBIO_PLL_CFG0_PADPLL_RESET_SWCTL BIT(0) macro549 XUSBIO_PLL_CFG0_PADPLL_RESET_SWCTL); in tegra210_xusb_pll_hw_control_enable()
