Searched refs:XUSBIO_PLL_CFG0 (Results 1 – 2 of 2) sorted by relevance
190 #define XUSBIO_PLL_CFG0 0x51c macro547 val = readl_relaxed(clk_base + XUSBIO_PLL_CFG0); in tegra210_xusb_pll_hw_control_enable()552 writel_relaxed(val, clk_base + XUSBIO_PLL_CFG0); in tegra210_xusb_pll_hw_control_enable()560 val = readl_relaxed(clk_base + XUSBIO_PLL_CFG0); in tegra210_xusb_pll_hw_sequence_start()562 writel_relaxed(val, clk_base + XUSBIO_PLL_CFG0); in tegra210_xusb_pll_hw_sequence_start()
103 #define XUSBIO_PLL_CFG0 0x51c macro1690 val = pll_readl(XUSBIO_PLL_CFG0, pll); in clk_plle_tegra114_enable()1695 pll_writel(val, XUSBIO_PLL_CFG0, pll); in clk_plle_tegra114_enable()1698 pll_writel(val, XUSBIO_PLL_CFG0, pll); in clk_plle_tegra114_enable()
