Home
last modified time | relevance | path

Searched refs:REG_TEST_FLD (Results 1 – 4 of 4) sorted by relevance

/Linux-v6.6/drivers/accel/ivpu/
Divpu_hw_40xx.c700 if (!REG_TEST_FLD(VPU_40XX_BUTTRESS_TILE_FUSE, VALID, fuse)) { in ivpu_hw_40xx_info_init()
890 return REG_TEST_FLD(VPU_40XX_BUTTRESS_VPU_STATUS, READY, val) && in ivpu_hw_40xx_is_idle()
891 REG_TEST_FLD(VPU_40XX_BUTTRESS_VPU_STATUS, IDLE, val); in ivpu_hw_40xx_is_idle()
1029 if (REG_TEST_FLD(VPU_40XX_HOST_SS_ICB_STATUS_0, MMU_IRQ_0_INT, status)) in ivpu_hw_40xx_irqv_handler()
1032 if (REG_TEST_FLD(VPU_40XX_HOST_SS_ICB_STATUS_0, HOST_IPC_FIFO_INT, status)) in ivpu_hw_40xx_irqv_handler()
1035 if (REG_TEST_FLD(VPU_40XX_HOST_SS_ICB_STATUS_0, MMU_IRQ_1_INT, status)) in ivpu_hw_40xx_irqv_handler()
1038 if (REG_TEST_FLD(VPU_40XX_HOST_SS_ICB_STATUS_0, MMU_IRQ_2_INT, status)) in ivpu_hw_40xx_irqv_handler()
1041 if (REG_TEST_FLD(VPU_40XX_HOST_SS_ICB_STATUS_0, CPU_INT_REDIRECT_0_INT, status)) in ivpu_hw_40xx_irqv_handler()
1044 if (REG_TEST_FLD(VPU_40XX_HOST_SS_ICB_STATUS_0, CPU_INT_REDIRECT_1_INT, status)) in ivpu_hw_40xx_irqv_handler()
1047 if (REG_TEST_FLD(VPU_40XX_HOST_SS_ICB_STATUS_0, NOC_FIREWALL_INT, status)) in ivpu_hw_40xx_irqv_handler()
[all …]
Divpu_hw_37xx.c751 return REG_TEST_FLD(VPU_37XX_BUTTRESS_VPU_STATUS, READY, val) && in ivpu_hw_37xx_is_idle()
752 REG_TEST_FLD(VPU_37XX_BUTTRESS_VPU_STATUS, IDLE, val); in ivpu_hw_37xx_is_idle()
910 if (REG_TEST_FLD(VPU_37XX_HOST_SS_ICB_STATUS_0, MMU_IRQ_0_INT, status)) in ivpu_hw_37xx_irqv_handler()
913 if (REG_TEST_FLD(VPU_37XX_HOST_SS_ICB_STATUS_0, HOST_IPC_FIFO_INT, status)) in ivpu_hw_37xx_irqv_handler()
916 if (REG_TEST_FLD(VPU_37XX_HOST_SS_ICB_STATUS_0, MMU_IRQ_1_INT, status)) in ivpu_hw_37xx_irqv_handler()
919 if (REG_TEST_FLD(VPU_37XX_HOST_SS_ICB_STATUS_0, MMU_IRQ_2_INT, status)) in ivpu_hw_37xx_irqv_handler()
922 if (REG_TEST_FLD(VPU_37XX_HOST_SS_ICB_STATUS_0, CPU_INT_REDIRECT_0_INT, status)) in ivpu_hw_37xx_irqv_handler()
925 if (REG_TEST_FLD(VPU_37XX_HOST_SS_ICB_STATUS_0, CPU_INT_REDIRECT_1_INT, status)) in ivpu_hw_37xx_irqv_handler()
928 if (REG_TEST_FLD(VPU_37XX_HOST_SS_ICB_STATUS_0, NOC_FIREWALL_INT, status)) in ivpu_hw_37xx_irqv_handler()
943 if (REG_TEST_FLD(VPU_37XX_BUTTRESS_INTERRUPT_STAT, FREQ_CHANGE, status)) in ivpu_hw_37xx_irqb_handler()
[all …]
Divpu_mmu.c851 if (REG_TEST_FLD(VPU_37XX_HOST_MMU_GERROR, MSI_ABT, active)) in ivpu_mmu_irq_gerr_handler()
854 if (REG_TEST_FLD(VPU_37XX_HOST_MMU_GERROR, MSI_PRIQ_ABT, active)) in ivpu_mmu_irq_gerr_handler()
857 if (REG_TEST_FLD(VPU_37XX_HOST_MMU_GERROR, MSI_EVTQ_ABT, active)) in ivpu_mmu_irq_gerr_handler()
860 if (REG_TEST_FLD(VPU_37XX_HOST_MMU_GERROR, MSI_CMDQ_ABT, active)) in ivpu_mmu_irq_gerr_handler()
863 if (REG_TEST_FLD(VPU_37XX_HOST_MMU_GERROR, PRIQ_ABT, active)) in ivpu_mmu_irq_gerr_handler()
866 if (REG_TEST_FLD(VPU_37XX_HOST_MMU_GERROR, EVTQ_ABT, active)) in ivpu_mmu_irq_gerr_handler()
869 if (REG_TEST_FLD(VPU_37XX_HOST_MMU_GERROR, CMDQ, active)) in ivpu_mmu_irq_gerr_handler()
Divpu_hw_reg_io.h45 #define REG_TEST_FLD(REG, FLD, val) \ macro