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Searched refs:KHz (Results 1 – 25 of 92) sorted by relevance

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/Linux-v6.6/drivers/cpufreq/
Dcppc_cpufreq.c511 unsigned long *power, unsigned long *KHz) in cppc_get_cpu_power() argument
515 unsigned long prev_freq = *KHz; in cppc_get_cpu_power()
533 perf_prev = cppc_cpufreq_khz_to_perf(cpu_data, *KHz); in cppc_get_cpu_power()
553 *KHz = cppc_cpufreq_perf_to_khz(cpu_data, perf); in cppc_get_cpu_power()
554 perf_check = cppc_cpufreq_khz_to_perf(cpu_data, *KHz); in cppc_get_cpu_power()
562 while ((*KHz == prev_freq) || (step_check != step)) { in cppc_get_cpu_power()
564 *KHz = cppc_cpufreq_perf_to_khz(cpu_data, perf); in cppc_get_cpu_power()
565 perf_check = cppc_cpufreq_khz_to_perf(cpu_data, *KHz); in cppc_get_cpu_power()
579 static int cppc_get_cpu_cost(struct device *cpu_dev, unsigned long KHz, in cppc_get_cpu_cost() argument
594 perf_prev = cppc_cpufreq_khz_to_perf(cpu_data, KHz); in cppc_get_cpu_cost()
Dscmi-cpufreq.c101 unsigned long *KHz) in scmi_get_cpu_power() argument
112 Hz = *KHz * 1000; in scmi_get_cpu_power()
122 *KHz = Hz / 1000; in scmi_get_cpu_power()
Dmediatek-cpufreq-hw.c56 unsigned long *KHz) in mtk_cpufreq_get_cpu_power() argument
69 if (data->table[i].frequency < *KHz) in mtk_cpufreq_get_cpu_power()
74 *KHz = data->table[i].frequency; in mtk_cpufreq_get_cpu_power()
/Linux-v6.6/Documentation/ABI/testing/
Dsysfs-class-rtc-rtc0-device-rtc_calibration7 calibrate the AB8500.s 32KHz Real Time Clock.
12 30.5 micro-seconds (half-parts-per-million of the 32KHz clock)
/Linux-v6.6/Documentation/translations/zh_CN/power/
Denergy-model.rst171 02 unsigned long *KHz)
176 07 freq = foo_get_freq_ceil(dev, *KHz);
187 18 *KHz = freq;
/Linux-v6.6/arch/arm/mach-omap1/
DKconfig67 bool "Use 32KHz timer"
71 Select this option if you want to enable the OMAP 32KHz timer.
73 support for no tick during idle. The 32KHz timer provides less
74 intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is
87 timer provides more intra-tick resolution than the 32KHz timer,
/Linux-v6.6/Documentation/devicetree/bindings/clock/
Dclk-palmas-clk32kg-clocks.txt1 * Palmas 32KHz clocks *
3 Palmas device has two clock output pins for 32KHz, KG and KG_AUDIO.
Dvf610-clock.txt16 - sxosc (external crystal oscillator 32KHz, recommended)
/Linux-v6.6/drivers/media/dvb-frontends/
Ds5h1411.c376 static int s5h1411_set_if_freq(struct dvb_frontend *fe, int KHz) in s5h1411_set_if_freq() argument
380 dprintk("%s(%d KHz)\n", __func__, KHz); in s5h1411_set_if_freq()
382 switch (KHz) { in s5h1411_set_if_freq()
400 __func__, KHz); in s5h1411_set_if_freq()
410 state->if_freq = KHz; in s5h1411_set_if_freq()
Ds5h1409.c353 static int s5h1409_set_if_freq(struct dvb_frontend *fe, int KHz) in s5h1409_set_if_freq() argument
357 dprintk("%s(%d KHz)\n", __func__, KHz); in s5h1409_set_if_freq()
359 switch (KHz) { in s5h1409_set_if_freq()
373 state->if_freq = KHz; in s5h1409_set_if_freq()
/Linux-v6.6/arch/arm/boot/dts/allwinner/
Dsun5i-reference-design-tablet.dtsi88 * The gsl1680 is rated at 400KHz and it will not work reliable at
89 * 100KHz, this has been confirmed on multiple different q8 tablets.
90 * All other devices on this bus are also rated for 400KHz.
Dsun8i-reference-design-tablet.dtsi67 * The gsl1680 is rated at 400KHz and it will not work reliable at
68 * 100KHz, this has been confirmed on multiple different q8 tablets.
/Linux-v6.6/Documentation/devicetree/bindings/mfd/
Dmax77620.txt36 with internal regulators. 32KHz clock can be programmed to be part of a
46 Each regulator, GPIO1, GPIO2, GPIO3, and 32KHz clock has a flexible power
54 When FPS event cleared (set to LOW), regulators, GPIOs and 32KHz
58 and 32KHz clock get disabled at
/Linux-v6.6/drivers/clk/pxa/
Dclk-pxa27x.c21 #define KHz 1000 macro
100 return (unsigned int)clks[0] / KHz; in pxa27x_get_clk_frequency_khz()
294 32768 * KHz)); in pxa27x_register_plls()
Dclk-pxa25x.c25 #define KHz 1000 macro
97 return (unsigned int)clks[0] / KHz; in pxa25x_get_clk_frequency_khz()
Dclk-pxa3xx.c24 #define KHz 1000 macro
157 return (unsigned int)clks[0] / KHz; in pxa3xx_get_clk_frequency_khz()
/Linux-v6.6/Documentation/devicetree/bindings/timer/
Dspreadtrum,sprd-timer.txt12 - clocks: The phandle to the source clock (usually a 32.768 KHz fixed clock).
/Linux-v6.6/Documentation/devicetree/bindings/media/
Dimg-ir-rev1.txt16 1st: Core clock (defaults to 32.768KHz if omitted).
/Linux-v6.6/Documentation/userspace-api/media/dvb/
Dfe-diseqc-send-burst.rst13 FE_DISEQC_SEND_BURST - Sends a 22KHz tone burst for 2x1 mini DiSEqC satellite selection.
/Linux-v6.6/Documentation/misc-devices/
Dics932s401.rst27 All frequencies are reported in KHz.
/Linux-v6.6/drivers/gpu/drm/i915/
Di915_utils.h354 #define KHz(x) (1000 * (x)) macro
355 #define MHz(x) KHz(1000 * (x))
/Linux-v6.6/arch/arm/boot/dts/nxp/imx/
Dimx6ull.dtsi25 /* KHz uV */
/Linux-v6.6/Documentation/i2c/busses/
Di2c-sis630.rst25 high_clock = [1|0] Forcibly set Host Master Clock to 56KHz (default,
/Linux-v6.6/drivers/gpu/drm/i915/display/
Dintel_backlight.c1013 return DIV_ROUND_CLOSEST(KHz(RUNTIME_INFO(i915)->rawclk_freq), in cnp_hz_to_pwm()
1022 return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz); in bxt_hz_to_pwm()
1075 return DIV_ROUND_CLOSEST(KHz(RUNTIME_INFO(i915)->rawclk_freq), in pch_hz_to_pwm()
1093 clock = KHz(RUNTIME_INFO(i915)->rawclk_freq); in i9xx_hz_to_pwm()
1095 clock = KHz(i915->display.cdclk.hw.cdclk); in i9xx_hz_to_pwm()
1111 clock = KHz(RUNTIME_INFO(i915)->rawclk_freq); in i965_hz_to_pwm()
1113 clock = KHz(i915->display.cdclk.hw.cdclk); in i965_hz_to_pwm()
1130 clock = KHz(19200); in vlv_hz_to_pwm()
1135 clock = KHz(RUNTIME_INFO(i915)->rawclk_freq); in vlv_hz_to_pwm()
/Linux-v6.6/arch/arm64/boot/dts/rockchip/
Drk3399-nanopc-t4.dts59 * With 20KHz PWM and an EVERCOOL EC4007H12SA fan, these levels

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