Searched refs:IS_G4X (Results 1 – 25 of 34) sorted by relevance
12
399 if (IS_G4X(i915)) in g4x_dpfc_ctl()703 if (DISPLAY_VER(i915) >= 5 || IS_G4X(i915)) in intel_fbc_cfb_base_max()734 if (IS_G4X(i915)) in intel_fbc_max_limit()780 if (DISPLAY_VER(i915) < 5 && !IS_G4X(i915)) { in intel_fbc_alloc_cfb()868 if (DISPLAY_VER(i915) == 4 && !IS_G4X(i915) && stride < 2048) in stride_is_valid()897 if (IS_G4X(i915)) in pixel_format_is_valid()914 else if (DISPLAY_VER(i915) <= 4 && !IS_G4X(i915) && in rotation_is_valid()938 } else if (IS_G4X(i915) || DISPLAY_VER(i915) >= 5) { in intel_fbc_hw_tracking_covers_screen()1697 else if (IS_G4X(i915)) in intel_fbc_create()
139 if (IS_G4X(i915)) in g4x_hdmi_compute_config()614 if (!IS_G4X(i915)) in g4x_hdmi_connector_atomic_check()664 if (IS_G4X(i915) || IS_VALLEYVIEW(i915)) in is_hdmi_port_valid()769 if (IS_G4X(dev_priv)) in g4x_hdmi_init()
201 IS_G4X(dev_priv)) in wm_latency_show()262 if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) in pri_wm_latency_open()
139 if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in intel_hpd_init_pins()420 if (IS_G4X(dev_priv) || in i9xx_hpd_irq_ack()458 if (IS_G4X(dev_priv) || in i9xx_hpd_irq_handler()473 if ((IS_G4X(dev_priv) || in i9xx_hpd_irq_handler()1368 if (IS_G4X(dev_priv)) in i915_hpd_irq_setup()
114 if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv)) in intel_crtc_max_vblank_count()348 IS_VALLEYVIEW(dev_priv) || IS_G4X(dev_priv)) in intel_crtc_init()
142 else if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv)) in i9xx_plane_has_windowing()162 if (IS_G4X(dev_priv) || IS_IRONLAKE(dev_priv) || in i9xx_plane_ctl()891 if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv)) in intel_primary_plane_create()
531 if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) in intel_plane_atomic_calc_changes()534 if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) in intel_plane_atomic_calc_changes()537 if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) { in intel_plane_atomic_calc_changes()
348 if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) in i9xx_cursor_ctl_crtc()587 if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv)) in i9xx_cursor_get_hw_state()
63 if (IS_G4X(dev_priv)) { in g4x_dp_set_clock()147 if (IS_G4X(dev_priv) && pipe_config->limited_color_range) in intel_dp_prepare()377 if (IS_G4X(dev_priv) && tmp & DP_COLOR_RANGE_16_235) in intel_dp_get_config()
268 IS_G4X(dev_priv) || DISPLAY_VER(dev_priv) == 2 || in i915_get_crtc_scanoutpos()
2704 if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in i9xx_set_pipeconf()2915 if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in i9xx_get_pipe_config()4268 if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv) && in intel_crtc_atomic_check()4398 if ((IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in compute_baseline_pipe_bpp()4630 if (IS_G4X(dev_priv) || in intel_crtc_prepare_cleared_state()5352 if (IS_G4X(dev_priv) || DISPLAY_VER(dev_priv) >= 5) in intel_pipe_config_compare()7520 if (!found && IS_G4X(dev_priv)) { in intel_setup_outputs()7526 if (!found && IS_G4X(dev_priv)) in intel_setup_outputs()7539 if (IS_G4X(dev_priv)) { in intel_setup_outputs()7544 if (IS_G4X(dev_priv)) in intel_setup_outputs()[all …]
934 if (ret || !IS_G4X(dev_priv)) in intel_crt_get_modes()
926 } else if (DISPLAY_VER(i915) >= 5 || IS_G4X(i915)) { in intel_display_device_info_runtime_init()
837 if (IS_G4X(dev_priv)) { in i9xx_compute_dpll()1563 else if (IS_G4X(dev_priv)) in intel_dpll_init_clock_hook()
1015 if (IS_G4X(dev_priv) || !crtc_state->has_infoframe) in intel_hdmi_compute_gcp_infoframe()2981 } else if (IS_G4X(dev_priv)) { in intel_infoframe_init()
167 else if (IS_G4X(uncore->i915)) in read_clock_frequency()
46 if (GRAPHICS_VER(i915) == 5 || IS_G4X(i915)) in read_timestamp()
79 if (IS_G4X(rq->i915) || GRAPHICS_VER(rq->i915) == 5) in gen4_emit_flush_rcs()
46 if (GRAPHICS_VER(i915) == 5 || IS_G4X(i915)) in timestamp_reg()
688 else if (IS_G4X(i915)) in intel_get_gpu_reset()
101 !IS_G33(i915) && !IS_PINEVIEW(i915) && !IS_G4X(i915)) { in adjust_stolen()455 } else if (GRAPHICS_VER(i915) >= 5 || IS_G4X(i915)) { in init_reserved_stolen()
401 DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) in intel_device_info_runtime_init()
1167 if (IS_G4X(i915)) in i965_error_mask()1200 if (IS_G4X(dev_priv)) in i965_irq_postinstall()
884 else if (IS_G4X(i915)) in intel_clock_gating_hooks_init()
543 #define IS_G4X(i915) (IS_G45(i915) || IS_GM45(i915)) macro