Searched refs:sdma_v5_2_get_reg_offset (Results 1 – 1 of 1) sorted by relevance
| /Linux-v6.1/drivers/gpu/drm/amd/amdgpu/ |
| D | sdma_v5_2.c | 68 static u32 sdma_v5_2_get_reg_offset(struct amdgpu_device *adev, u32 instance, u32 internal_offset) in sdma_v5_2_get_reg_offset() function
209 wptr = RREG32(sdma_v5_2_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR_HI)); in sdma_v5_2_ring_get_wptr()
211 wptr |= RREG32(sdma_v5_2_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR)); in sdma_v5_2_ring_get_wptr()
252 WREG32(sdma_v5_2_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR), in sdma_v5_2_ring_set_wptr()
254 WREG32(sdma_v5_2_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR_HI), in sdma_v5_2_ring_set_wptr()
423 rb_cntl = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL)); in sdma_v5_2_gfx_stop()
425 WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL), rb_cntl); in sdma_v5_2_gfx_stop()
426 ib_cntl = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL)); in sdma_v5_2_gfx_stop()
428 WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl); in sdma_v5_2_gfx_stop()
483 WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_PHASE0_QUANTUM), in sdma_v5_2_ctx_switch_enable()
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