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Searched refs:regUVD_MPC_SET_MUX (Results 1 – 3 of 3) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_2_6_0_offset.h1050 #define regUVD_MPC_SET_MUX … macro
Dvcn_4_0_0_offset.h466 #define regUVD_MPC_SET_MUX … macro
/Linux-v6.1/drivers/gpu/drm/amd/amdgpu/
Dvcn_v4_0.c926 VCN, inst_idx, regUVD_MPC_SET_MUX), in vcn_v4_0_start_dpg_mode()
1065 WREG32_SOC15(VCN, i, regUVD_MPC_SET_MUX, in vcn_v4_0_start()