Home
last modified time | relevance | path

Searched refs:regBIFPLR3_0_PCIE_PORT_VC_CAP_REG1 (Results 1 – 2 of 2) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_7_7_0_offset.h13168 #define regBIFPLR3_0_PCIE_PORT_VC_CAP_REG1 macro
Dnbio_7_2_0_offset.h15638 #define regBIFPLR3_0_PCIE_PORT_VC_CAP_REG1 macro