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Searched refs:ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL7_ENABLE (Results 1 – 19 of 19) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h159 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL7_ENABLE 0x3788 macro
Ddce_8_0_d.h5417 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL7_ENABLE 0x3788 macro
Ddce_11_0_d.h6813 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL7_ENABLE 0x3788 macro
Ddce_10_0_d.h6651 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL7_ENABLE 0x3788 macro
Ddce_11_2_d.h8158 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL7_ENABLE 0x3788 macro
Ddce_12_0_offset.h17980 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL7_ENABLE … macro
/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h7295 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL7_ENABLE … macro
Ddcn_3_0_1_offset.h12138 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL7_ENABLE … macro
Ddcn_1_0_offset.h12982 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL7_ENABLE … macro
Ddcn_2_1_0_offset.h12742 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL7_ENABLE … macro
Ddcn_3_2_0_offset.h13449 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL7_ENABLE … macro
Ddcn_3_1_5_offset.h14058 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL7_ENABLE … macro
Ddcn_3_2_1_offset.h13428 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL7_ENABLE … macro
Ddcn_3_1_4_offset.h1609 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL7_ENABLE … macro
Ddcn_3_1_2_offset.h13952 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL7_ENABLE … macro
Ddcn_3_1_6_offset.h14549 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL7_ENABLE … macro
Ddcn_3_0_2_offset.h15027 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL7_ENABLE … macro
Ddcn_2_0_0_offset.h16406 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL7_ENABLE … macro
Ddcn_3_0_0_offset.h16749 #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL7_ENABLE … macro