Searched refs:dram_info (Results 1 – 7 of 7) sorted by relevance
187 struct dram_info *dram_info = &i915->dram_info; in skl_dram_get_channels_info() local196 dram_info->num_channels++; in skl_dram_get_channels_info()202 dram_info->num_channels++; in skl_dram_get_channels_info()204 if (dram_info->num_channels == 0) { in skl_dram_get_channels_info()214 dram_info->wm_lv_0_adjust_needed = ch0.is_16gb_dimm || ch1.is_16gb_dimm; in skl_dram_get_channels_info()216 dram_info->symmetric_memory = intel_is_dram_symmetric(&ch0, &ch1); in skl_dram_get_channels_info()219 str_yes_no(dram_info->symmetric_memory)); in skl_dram_get_channels_info()250 struct dram_info *dram_info = &i915->dram_info; in skl_get_dram_info() local253 dram_info->type = skl_get_dram_type(i915); in skl_get_dram_info()255 intel_dram_type_str(dram_info->type)); in skl_get_dram_info()[all …]
335 struct dram_info { struct350 } dram_info; member
182 const struct dram_info *dram_info = &dev_priv->dram_info; in icl_get_qgv_points() local185 qi->num_points = dram_info->num_qgv_points; in icl_get_qgv_points()186 qi->num_psf_points = dram_info->num_psf_gv_points; in icl_get_qgv_points()189 switch (dram_info->type) { in icl_get_qgv_points()210 MISSING_CASE(dram_info->type); in icl_get_qgv_points()214 switch (dram_info->type) { in icl_get_qgv_points()248 qi->t_bl = dev_priv->dram_info.type == INTEL_DRAM_DDR4 ? 4 : 8; in icl_get_qgv_points()357 int num_channels = max_t(u8, 1, dev_priv->dram_info.num_channels); in icl_get_bw_info()425 const struct dram_info *dram_info = &dev_priv->dram_info; in tgl_get_bw_info() local427 int num_channels = max_t(u8, 1, dev_priv->dram_info.num_channels); in tgl_get_bw_info()[all …]
1563 enum intel_dram_type type = dev_priv->dram_info.type; in tgl_bw_buddy_init()1564 u8 num_channels = dev_priv->dram_info.num_channels; in tgl_bw_buddy_init()
3159 return i915->dram_info.symmetric_memory; in skl_watermark_ipc_can_enable()3178 bool wm_lv_0_adjust_needed = i915->dram_info.wm_lv_0_adjust_needed; in adjust_wm_latency()
723 struct iwl_dram_info *dram_info) in iwl_dbg_tlv_update_dram() argument749 data = &dram_info->dram_frags[alloc_id - 1]; in iwl_dbg_tlv_update_dram()777 struct iwl_dram_info *dram_info; in iwl_dbg_tlv_update_drams() local782 dram_info = frags->block; in iwl_dbg_tlv_update_drams()788 dram_info->first_word = cpu_to_le32(DRAM_INFO_FIRST_MAGIC_WORD); in iwl_dbg_tlv_update_drams()789 dram_info->second_word = cpu_to_le32(DRAM_INFO_SECOND_MAGIC_WORD); in iwl_dbg_tlv_update_drams()793 ret = iwl_dbg_tlv_update_dram(fwrt, i, dram_info); in iwl_dbg_tlv_update_drams()804 dram_info->first_word); in iwl_dbg_tlv_update_drams()806 memset(frags->block, 0, sizeof(*dram_info)); in iwl_dbg_tlv_update_drams()877 struct iwl_dbgc1_info dram_info = {}; in iwl_dbg_tlv_apply_config() local[all …]
284 struct iwl_dram_sec_info dram_info; member306 struct iwl_dram_sec_info dram_info; member
