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Searched refs:div_l (Results 1 – 4 of 4) sorted by relevance

/Linux-v6.1/drivers/clk/bcm/
Dclk-iproc-asiu.c74 unsigned int div_h, div_l; in iproc_asiu_clk_recalc_rate() local
91 div_l = (val >> clk->div.low_shift) & bit_mask(clk->div.low_width); in iproc_asiu_clk_recalc_rate()
92 div_l++; in iproc_asiu_clk_recalc_rate()
94 clk->rate = parent_rate / (div_h + div_l); in iproc_asiu_clk_recalc_rate()
96 __func__, clk->rate, parent_rate, div_h, div_l); in iproc_asiu_clk_recalc_rate()
124 unsigned int div, div_h, div_l; in iproc_asiu_clk_set_rate() local
142 div_h = div_l = div >> 1; in iproc_asiu_clk_set_rate()
144 div_l--; in iproc_asiu_clk_set_rate()
156 if (div_l) { in iproc_asiu_clk_set_rate()
158 val |= div_l << clk->div.low_shift; in iproc_asiu_clk_set_rate()
/Linux-v6.1/drivers/i2c/busses/
Di2c-meson.c143 unsigned int div_h, div_l; in meson_gxbb_axg_i2c_set_clk_div() local
154 div_l = DIV_ROUND_UP(div_h, 4); in meson_gxbb_axg_i2c_set_clk_div()
158 div_l = DIV_ROUND_UP(clk_rate * 3, freq * 5 * 2); in meson_gxbb_axg_i2c_set_clk_div()
166 if (div_l > GENMASK(11, 0)) { in meson_gxbb_axg_i2c_set_clk_div()
168 div_l = GENMASK(11, 0); in meson_gxbb_axg_i2c_set_clk_div()
179 FIELD_PREP(REG_SLV_SCL_LOW_MASK, div_l)); in meson_gxbb_axg_i2c_set_clk_div()
185 clk_rate, freq, div_h, div_l); in meson_gxbb_axg_i2c_set_clk_div()
/Linux-v6.1/drivers/hwmon/
Daspeed-pwm-tacho.c505 u8 clk_unit, div_h, div_l, tacho_div; in aspeed_get_fan_tach_ch_measure_period() local
511 div_l = priv->type_pwm_clock_division_l[type]; in aspeed_get_fan_tach_ch_measure_period()
512 if (div_l == 0) in aspeed_get_fan_tach_ch_measure_period()
513 div_l = 1; in aspeed_get_fan_tach_ch_measure_period()
515 div_l = div_l * 2; in aspeed_get_fan_tach_ch_measure_period()
521 return clk / (clk_unit * div_h * div_l * tacho_div * tacho_unit); in aspeed_get_fan_tach_ch_measure_period()
/Linux-v6.1/drivers/tty/serial/
Dsunplus-uart.c338 u32 ext, div, div_l, div_h, baud, lcr; in sunplus_set_termios() local
349 div_l = (div & 0xFF) | (ext << 12); in sunplus_set_termios()
409 writel(div_l, port->membase + SUP_UART_DIV_L); in sunplus_set_termios()