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Searched refs:PA_CL_UCP_0_X__DATA_REGISTER_MASK (Results 1 – 12 of 12) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h5672 #define PA_CL_UCP_0_X__DATA_REGISTER_MASK 0xffffffffL macro
Dgfx_7_2_sh_mask.h5611 #define PA_CL_UCP_0_X__DATA_REGISTER_MASK 0xffffffff macro
Dgfx_8_0_sh_mask.h6399 #define PA_CL_UCP_0_X__DATA_REGISTER_MASK 0xffffffff macro
Dgfx_8_1_sh_mask.h6933 #define PA_CL_UCP_0_X__DATA_REGISTER_MASK 0xffffffff macro
/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h15460 #define PA_CL_UCP_0_X__DATA_REGISTER_MASK … macro
Dgc_9_1_sh_mask.h16769 #define PA_CL_UCP_0_X__DATA_REGISTER_MASK … macro
Dgc_9_2_1_sh_mask.h16641 #define PA_CL_UCP_0_X__DATA_REGISTER_MASK … macro
Dgc_9_4_2_sh_mask.h8890 #define PA_CL_UCP_0_X__DATA_REGISTER_MASK … macro
Dgc_11_0_0_sh_mask.h20554 #define PA_CL_UCP_0_X__DATA_REGISTER_MASK … macro
Dgc_10_1_0_sh_mask.h22839 #define PA_CL_UCP_0_X__DATA_REGISTER_MASK … macro
Dgc_11_0_3_sh_mask.h22888 #define PA_CL_UCP_0_X__DATA_REGISTER_MASK … macro
Dgc_10_3_0_sh_mask.h21016 #define PA_CL_UCP_0_X__DATA_REGISTER_MASK … macro