Home
last modified time | relevance | path

Searched refs:GCC_PCIE_0_PHY_BCR (Results 1 – 25 of 31) sorted by relevance

12

/Linux-v6.1/include/dt-bindings/reset/
Dqcom,gcc-apq8084.h91 #define GCC_PCIE_0_PHY_BCR 82 macro
/Linux-v6.1/include/dt-bindings/clock/
Dqcom,gcc-sm6350.h166 #define GCC_PCIE_0_PHY_BCR 7 macro
Dqcom,gcc-qcs404.h166 #define GCC_PCIE_0_PHY_BCR 10 macro
Dqcom,gcc-sc7280.h210 #define GCC_PCIE_0_PHY_BCR 1 macro
Dqcom,gcc-sm8450.h207 #define GCC_PCIE_0_PHY_BCR 7 macro
Dqcom,gcc-sdm845.h229 #define GCC_PCIE_0_PHY_BCR 24 macro
Dqcom,gcc-sm8150.h218 #define GCC_PCIE_0_PHY_BCR 5 macro
Dqcom,gcc-sm8350.h222 #define GCC_PCIE_0_PHY_BCR 7 macro
Dqcom,gcc-sm8250.h219 #define GCC_PCIE_0_PHY_BCR 7 macro
Dqcom,gcc-msm8998.h274 #define GCC_PCIE_0_PHY_BCR 76 macro
Dqcom,gcc-sc8180x.h255 #define GCC_PCIE_0_PHY_BCR 5 macro
Dqcom,gcc-msm8996.h320 #define GCC_PCIE_0_PHY_BCR 80 macro
Dqcom,gcc-sc8280xp.h406 #define GCC_PCIE_0_PHY_BCR 4 macro
/Linux-v6.1/drivers/clk/qcom/
Dgcc-qcs404.c2795 [GCC_PCIE_0_PHY_BCR] = { 0x3e004 },
Dgcc-apq8084.c3563 [GCC_PCIE_0_PHY_BCR] = { 0x1b00 },
Dgcc-sm8450.c3138 [GCC_PCIE_0_PHY_BCR] = { 0x7c01c },
Dgcc-msm8998.c3182 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
Dgcc-sc7280.c3389 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
Dgcc-sm8250.c3544 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
Dgcc-sm8150.c3735 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
Dgcc-sm8350.c3754 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
Dgcc-msm8996.c3784 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
Dgcc-sdm845.c3898 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
Dgcc-sc8180x.c4495 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
/Linux-v6.1/arch/arm64/boot/dts/qcom/
Dmsm8998.dtsi956 resets = <&gcc GCC_PCIE_0_PHY_BCR>, <&gcc GCC_PCIE_PHY_BCR>;

12