Searched refs:v2_1 (Results 1 – 5 of 5) sorted by relevance
175 const struct rlc_firmware_header_v2_1 *v2_1 = in amdgpu_ucode_print_rlc_hdr() local178 le32_to_cpu(v2_1->reg_list_format_direct_reg_list_length)); in amdgpu_ucode_print_rlc_hdr()180 le32_to_cpu(v2_1->save_restore_list_cntl_ucode_ver)); in amdgpu_ucode_print_rlc_hdr()182 le32_to_cpu(v2_1->save_restore_list_cntl_feature_ver)); in amdgpu_ucode_print_rlc_hdr()184 le32_to_cpu(v2_1->save_restore_list_cntl_size_bytes)); in amdgpu_ucode_print_rlc_hdr()186 le32_to_cpu(v2_1->save_restore_list_cntl_offset_bytes)); in amdgpu_ucode_print_rlc_hdr()188 le32_to_cpu(v2_1->save_restore_list_gpm_ucode_ver)); in amdgpu_ucode_print_rlc_hdr()190 le32_to_cpu(v2_1->save_restore_list_gpm_feature_ver)); in amdgpu_ucode_print_rlc_hdr()192 le32_to_cpu(v2_1->save_restore_list_gpm_size_bytes)); in amdgpu_ucode_print_rlc_hdr()194 le32_to_cpu(v2_1->save_restore_list_gpm_offset_bytes)); in amdgpu_ucode_print_rlc_hdr()[all …]
523 SET_DCE_CLOCK_PS_ALLOCATION_V2_1 v2_1; member545 args.v2_1.asParam.ulDCEClkFreq = cpu_to_le32(freq); /* 10kHz units */ in amdgpu_atombios_crtc_set_dce_clock()546 args.v2_1.asParam.ucDCEClkType = clk_type; in amdgpu_atombios_crtc_set_dce_clock()547 args.v2_1.asParam.ucDCEClkSrc = clk_src; in amdgpu_atombios_crtc_set_dce_clock()549 ret_freq = le32_to_cpu(args.v2_1.asParam.ulDCEClkFreq) * 10; in amdgpu_atombios_crtc_set_dce_clock()
1572 struct _ATOM_VRAM_INFO_HEADER_V2_1 v2_1; member1606 if (module_index < vram_info->v2_1.ucNumOfVRAMModule) { in amdgpu_atombios_init_mc_reg_table()1609 ((u8 *)vram_info + le16_to_cpu(vram_info->v2_1.usMemClkPatchTblOffset)); in amdgpu_atombios_init_mc_reg_table()
334 const struct smc_firmware_header_v2_1 *v2_1; in smu_v11_0_set_pptable_v2_1() local339 v2_1 = (const struct smc_firmware_header_v2_1 *) adev->pm.fw->data; in smu_v11_0_set_pptable_v2_1()341 ((uint8_t *)v2_1 + le32_to_cpu(v2_1->pptable_entry_offset)); in smu_v11_0_set_pptable_v2_1()342 pptable_count = le32_to_cpu(v2_1->pptable_count); in smu_v11_0_set_pptable_v2_1()345 *table = ((uint8_t *)v2_1 + le32_to_cpu(entries[i].ppt_offset_bytes)); in smu_v11_0_set_pptable_v2_1()
3820 struct _ATOM_VRAM_INFO_HEADER_V2_1 v2_1; member3883 if (module_index < vram_info->v2_1.ucNumOfVRAMModule) { in radeon_atom_get_memory_info()3885 (ATOM_VRAM_MODULE_V7 *)vram_info->v2_1.aVramInfo; in radeon_atom_get_memory_info()4008 if (module_index < vram_info->v2_1.ucNumOfVRAMModule) { in radeon_atom_init_mc_reg_table()4011 ((u8 *)vram_info + le16_to_cpu(vram_info->v2_1.usMemClkPatchTblOffset)); in radeon_atom_init_mc_reg_table()
